From 4c5b167eb363a0629f14d7998533237e4da0f21f Mon Sep 17 00:00:00 2001 From: Matt DeVillier Date: Fri, 19 Jun 2015 22:53:15 -0500 Subject: [PATCH 001/137] submodules: use absolute URLs so cloned repos work properly Change-Id: I9e7537181fed24ce8136e1d16db514bc3cc7070d Signed-off-by: Matt DeVillier --- .gitmodules | 34 +++++++++++++++++----------------- 1 file changed, 17 insertions(+), 17 deletions(-) diff --git a/.gitmodules b/.gitmodules index 6f62952f435..391c71b794a 100644 --- a/.gitmodules +++ b/.gitmodules @@ -1,67 +1,67 @@ [submodule "3rdparty/blobs"] path = 3rdparty/blobs - url = ../blobs.git + url = https://review.coreboot.org/blobs.git update = none ignore = dirty [submodule "util/nvidia-cbootimage"] path = util/nvidia/cbootimage - url = ../nvidia-cbootimage.git + url = https://review.coreboot.org/nvidia-cbootimage.git [submodule "vboot"] path = 3rdparty/vboot - url = ../vboot.git + url = https://review.coreboot.org/vboot.git branch = main [submodule "arm-trusted-firmware"] path = 3rdparty/arm-trusted-firmware - url = ../arm-trusted-firmware.git + url = https://review.coreboot.org/arm-trusted-firmware.git [submodule "3rdparty/chromeec"] path = 3rdparty/chromeec - url = ../chrome-ec.git + url = https://review.coreboot.org/chrome-ec.git [submodule "libhwbase"] path = 3rdparty/libhwbase - url = ../libhwbase.git + url = https://review.coreboot.org/libhwbase.git [submodule "libgfxinit"] path = 3rdparty/libgfxinit - url = ../libgfxinit.git + url = https://review.coreboot.org/libgfxinit.git [submodule "3rdparty/fsp"] path = 3rdparty/fsp - url = ../fsp.git + url = https://review.coreboot.org/fsp.git update = none ignore = dirty [submodule "opensbi"] path = 3rdparty/opensbi - url = ../opensbi.git + url = https://review.coreboot.org/opensbi.git [submodule "intel-microcode"] path = 3rdparty/intel-microcode - url = ../intel-microcode.git + url = https://review.coreboot.org/intel-microcode.git update = none ignore = dirty branch = main [submodule "3rdparty/ffs"] path = 3rdparty/ffs - url = ../ffs.git + url = https://review.coreboot.org/ffs.git [submodule "3rdparty/amd_blobs"] path = 3rdparty/amd_blobs - url = ../amd_blobs + url = https://review.coreboot.org/amd_blobs update = none ignore = dirty [submodule "3rdparty/cmocka"] path = 3rdparty/cmocka - url = ../cmocka.git + url = https://review.coreboot.org/cmocka.git update = none branch = stable-1.1 [submodule "3rdparty/qc_blobs"] path = 3rdparty/qc_blobs - url = ../qc_blobs.git + url = https://review.coreboot.org/qc_blobs.git update = none ignore = dirty [submodule "3rdparty/intel-sec-tools"] path = 3rdparty/intel-sec-tools - url = ../9esec-security-tooling.git + url = https://review.coreboot.org/9esec-security-tooling.git [submodule "3rdparty/stm"] path = 3rdparty/stm - url = ../STM + url = https://review.coreboot.org/STM branch = stmpe [submodule "util/goswid"] path = util/goswid - url = ../goswid + url = https://review.coreboot.org/goswid branch = trunk From 2ffc5300de86a24900b2aa3667ba46639b4258ab Mon Sep 17 00:00:00 2001 From: Matt DeVillier Date: Tue, 25 Feb 2020 16:10:56 -0600 Subject: [PATCH 002/137] Add purism-blobs submodule Signed-off-by: Matt DeVillier Change-Id: I449f4c6f4abcf3d8dcea12f62ca19215098dd29d --- .gitmodules | 3 +++ 3rdparty/purism-blobs | 1 + 2 files changed, 4 insertions(+) create mode 160000 3rdparty/purism-blobs diff --git a/.gitmodules b/.gitmodules index 391c71b794a..8f2fabda30e 100644 --- a/.gitmodules +++ b/.gitmodules @@ -65,3 +65,6 @@ path = util/goswid url = https://review.coreboot.org/goswid branch = trunk +[submodule "3rdparty/purism-blobs"] + path = 3rdparty/purism-blobs + url = https://source.puri.sm/coreboot/purism-blobs.git diff --git a/3rdparty/purism-blobs b/3rdparty/purism-blobs new file mode 160000 index 00000000000..51227164fe6 --- /dev/null +++ b/3rdparty/purism-blobs @@ -0,0 +1 @@ +Subproject commit 51227164fe693042b66c7372f54057d8082dff08 From e982da2f5406af0f4543232765619dc096cae37b Mon Sep 17 00:00:00 2001 From: Matt DeVillier Date: Tue, 16 Nov 2021 11:32:00 -0600 Subject: [PATCH 003/137] .gitmodules: use personal fork of blobs repo Change-Id: Ia95041edfd731dc115826788f3090e10a2f48fb4 Signed-off-by: Matt DeVillier --- .gitmodules | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/.gitmodules b/.gitmodules index 8f2fabda30e..4f229afbe12 100644 --- a/.gitmodules +++ b/.gitmodules @@ -1,6 +1,6 @@ [submodule "3rdparty/blobs"] path = 3rdparty/blobs - url = https://review.coreboot.org/blobs.git + url = https://github.com/MrChromebox/blobs.git update = none ignore = dirty [submodule "util/nvidia-cbootimage"] From 638de0576ddb60dccb78d632fd3669fdadb6113b Mon Sep 17 00:00:00 2001 From: Matt DeVillier Date: Sat, 15 Oct 2022 12:47:31 -0500 Subject: [PATCH 004/137] Update personal blobs repo to master/HEAD Change-Id: Ida586141a21d3179ffeebaa0ed6cb5bd5c740c22 Signed-off-by: Matt DeVillier --- 3rdparty/blobs | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/3rdparty/blobs b/3rdparty/blobs index 01ba15667f3..0b5d0e63178 160000 --- a/3rdparty/blobs +++ b/3rdparty/blobs @@ -1 +1 @@ -Subproject commit 01ba15667f34793580f5edd0de1e26b7a542cac6 +Subproject commit 0b5d0e63178d6a5a05d13a85b28a6f4d7ccf7c2b From 3ff85bb780c16c6d42fb5daea4451176b2de0a50 Mon Sep 17 00:00:00 2001 From: Matt DeVillier Date: Mon, 20 Feb 2017 17:26:44 -0600 Subject: [PATCH 005/137] ec/chromeec: don't compress ecrw image Signed-off-by: Matt DeVillier --- src/ec/google/chromeec/Makefile.inc | 1 - 1 file changed, 1 deletion(-) diff --git a/src/ec/google/chromeec/Makefile.inc b/src/ec/google/chromeec/Makefile.inc index 1cf88f260b6..2ea5cb48a85 100644 --- a/src/ec/google/chromeec/Makefile.inc +++ b/src/ec/google/chromeec/Makefile.inc @@ -63,7 +63,6 @@ cbfs-files-y += ecrw ecrw-file := $(obj)/mainboard/$(MAINBOARDDIR)/ecrw ecrw-name := ecrw ecrw-type := raw -ecrw-compression := $(CBFS_COMPRESS_FLAG) cbfs-files-y += ecrw.hash ecrw.hash-file := $(obj)/mainboard/$(MAINBOARDDIR)/ecrw.hash ecrw.hash-name := ecrw.hash From ef8d117edd77582851c431ffa1b07c4f4c952ae7 Mon Sep 17 00:00:00 2001 From: Matt DeVillier Date: Wed, 21 Dec 2016 22:01:56 -0600 Subject: [PATCH 006/137] ec/chromeec: implement EC software sync If an updated EC firmware image is present in CBFS, compare to existing and update if needed. Switch to EC-RW firmware unless software sync fails. Change-Id: I08ab4255e6515a69a5bc7929765c062a9bbea404 Signed-off-by: Matt DeVillier --- src/ec/google/chromeec/Makefile.inc | 2 +- src/ec/google/chromeec/ec.c | 480 ++++++++++++++++++++++++++-- src/ec/google/chromeec/ec.h | 15 + src/ec/google/chromeec/utility.c | 35 ++ src/ec/google/chromeec/utility.h | 15 + 5 files changed, 517 insertions(+), 30 deletions(-) create mode 100644 src/ec/google/chromeec/utility.c create mode 100644 src/ec/google/chromeec/utility.h diff --git a/src/ec/google/chromeec/Makefile.inc b/src/ec/google/chromeec/Makefile.inc index 2ea5cb48a85..3651217bf6a 100644 --- a/src/ec/google/chromeec/Makefile.inc +++ b/src/ec/google/chromeec/Makefile.inc @@ -22,7 +22,7 @@ endif bootblock-y += ec.c bootblock-$(CONFIG_EC_GOOGLE_CHROMEEC_LPC) += ec_lpc.c -ramstage-y += ec.c crosec_proto.c vstore.c usbc_mux.c +ramstage-y += ec.c crosec_proto.c vstore.c usbc_mux.c utility.c ramstage-$(CONFIG_EC_GOOGLE_CHROMEEC_I2C) += ec_i2c.c ramstage-$(CONFIG_EC_GOOGLE_CHROMEEC_LPC) += ec_lpc.c ramstage-$(CONFIG_EC_GOOGLE_CHROMEEC_SPI) += ec_spi.c diff --git a/src/ec/google/chromeec/ec.c b/src/ec/google/chromeec/ec.c index 646dd29848f..25e00e69955 100644 --- a/src/ec/google/chromeec/ec.c +++ b/src/ec/google/chromeec/ec.c @@ -2,18 +2,25 @@ #include #include +#include #include +#include +#include #include #include #include #include #include +#include +#include #include #include #include #include #include "ec.h" +#include "ec_commands.h" +#include "utility.h" #define INVALID_HCMD 0xFF @@ -1339,43 +1346,67 @@ static void google_chromeec_log_uptimeinfo(void) printk(BIOS_DEBUG, "\n"); } -/* Cache and retrieve the EC image type (ro or rw) */ -enum ec_image google_chromeec_get_current_image(void) +static enum ec_current_image google_chromeec_get_version(void) { - static enum ec_image ec_image_type = EC_IMAGE_UNKNOWN; + struct chromeec_command cec_cmd; + struct ec_response_get_version cec_resp; + cec_cmd.cmd_code = EC_CMD_GET_VERSION; + cec_cmd.cmd_version = 0; + cec_cmd.cmd_data_in = 0; + cec_cmd.cmd_data_out = &cec_resp; + cec_cmd.cmd_size_in = 0; + cec_cmd.cmd_size_out = sizeof(cec_resp); + cec_cmd.cmd_dev_index = 0; + google_chromeec_command(&cec_cmd); - if (ec_image_type != EC_IMAGE_UNKNOWN) - return ec_image_type; - - struct ec_response_get_version resp = {}; - struct chromeec_command cmd = { - .cmd_code = EC_CMD_GET_VERSION, - .cmd_version = 0, - .cmd_data_out = &resp, - .cmd_size_in = 0, - .cmd_size_out = sizeof(resp), - .cmd_dev_index = 0, - }; - int rv; - - rv = google_chromeec_command(&cmd); - - if (rv != 0) { + if (cec_cmd.cmd_code) { printk(BIOS_DEBUG, "Google Chrome EC: version command failed!\n"); + return EC_IMAGE_UNKNOWN; } else { printk(BIOS_DEBUG, "Google Chrome EC: version:\n"); - printk(BIOS_DEBUG, " ro: %s\n", resp.version_string_ro); - printk(BIOS_DEBUG, " rw: %s\n", resp.version_string_rw); + printk(BIOS_DEBUG, " ro: %s\n", cec_resp.version_string_ro); + printk(BIOS_DEBUG, " rw: %s\n", cec_resp.version_string_rw); printk(BIOS_DEBUG, " running image: %d\n", - resp.current_image); - ec_image_type = resp.current_image; + cec_resp.current_image); + return cec_resp.current_image; } +} + +/* Cached EC image type (ro or rw). */ +enum ec_current_image google_chromeec_get_current_image(void) +{ + static enum ec_current_image ec_image_type = EC_IMAGE_UNKNOWN; + + if (ec_image_type == EC_IMAGE_UNKNOWN) + ec_image_type = google_chromeec_get_version(); - /* Will still be UNKNOWN if command failed */ return ec_image_type; } +void google_chromeec_init(void) +{ + printk(BIOS_DEBUG, "Google Chrome EC: Initializing\n"); + + google_chromeec_log_uptimeinfo(); + + /* Check which EC image is active */ + google_chromeec_get_current_image(); + + /* Check/update EC RW image if needed */ + if (google_chromeec_swsync() != 0) { + printk(BIOS_ERR, "ChromeEC: EC SW SYNC FAILED\n"); + } else if (google_chromeec_get_current_image() != EC_IMAGE_RW) { + /* EC RW image is up to date, switch to it if not already*/ + google_chromeec_reboot(EC_REBOOT_JUMP_RW, 0); + mdelay(100); + /* Use Hello cmd to "reset" EC now in RW mode */ + google_chromeec_hello(); + /* re-run version command & print */ + google_chromeec_get_version(); + } +} + int google_chromeec_get_num_pd_ports(unsigned int *num_ports) { struct ec_response_usb_pd_ports resp = {}; @@ -1427,14 +1458,405 @@ int google_chromeec_get_pd_port_caps(int port, return 0; } -void google_chromeec_init(void) +int google_ec_running_ro(void) { - google_chromeec_log_uptimeinfo(); + return (google_chromeec_get_current_image() == EC_IMAGE_RO); } -int google_ec_running_ro(void) +void google_chromeec_reboot_ro(void) { - return (google_chromeec_get_current_image() == EC_IMAGE_RO); + /* Reboot the EC and make it come back in RO mode */ + printk(BIOS_DEBUG, "Rebooting with EC in RO mode:\n"); + post_code(0); /* clear current post code */ + google_chromeec_reboot(EC_REBOOT_COLD, 0); + udelay(1000); + board_reset(); + halt(); +} + +/* Timeout waiting for EC hash calculation completion */ +static const int CROS_EC_HASH_TIMEOUT_MS = 2000; + +/* Time to delay between polling status of EC hash calculation */ +static const int CROS_EC_HASH_CHECK_DELAY_MS = 10; + +int google_chromeec_swsync(void) +{ + static struct ec_response_vboot_hash resp; + uint8_t *ec_hash; + int ec_hash_size; + uint8_t *ecrw_hash, *ecrw; + int need_update = 0, i; + size_t ecrw_size; + + /* skip if on S3 resume path */ + if (acpi_is_wakeup_s3()) + return 0; + + /* Get EC_RW hash from CBFS */ + ecrw_hash = cbfs_map("ecrw.hash", NULL); + + if (!ecrw_hash) { + /* Assume no EC update file for this board */ + printk(BIOS_DEBUG, "ChromeEC SW Sync: no EC_RW update available\n"); + return 0; + } + + /* Got an expected hash */ + printk(BIOS_DEBUG, "ChromeEC SW Sync: Expected hash: "); + for (i = 0; i < SHA256_DIGEST_SIZE; i++) + printk(BIOS_DEBUG, "%02x", ecrw_hash[i]); + printk(BIOS_DEBUG, "\n"); + + /* Get hash of current EC-RW */ + if (google_chromeec_read_hash(&resp)) { + printk(BIOS_ERR, "Failed to read current EC_RW hash.\n"); + return -1; + } + ec_hash = resp.hash_digest; + ec_hash_size = resp.digest_size; + /* Check hash size */ + if (ec_hash_size != SHA256_DIGEST_SIZE) { + printk(BIOS_ERR, "ChromeEC SW Sync: - " + "read_hash says size %d, not %d\n", + ec_hash_size, SHA256_DIGEST_SIZE); + return -1; + } + + /* We got a proper hash */ + printk(BIOS_DEBUG, "ChromeEC SW Sync: current EC_RW hash: "); + for (i = 0; i < SHA256_DIGEST_SIZE; i++) + printk(BIOS_DEBUG, "%02x", ec_hash[i]); + printk(BIOS_DEBUG, "\n"); + + /* compare hashes */ + need_update = SafeMemcmp(ec_hash, ecrw_hash, SHA256_DIGEST_SIZE); + + /* If in RW and need to update, return/reboot to RO */ + if (need_update && google_chromeec_get_current_image() == EC_IMAGE_RW + && !CONFIG(SOC_INTEL_CSE_LITE_SKU) && !CONFIG(BOARD_GOOGLE_BASEBOARD_FIZZ)) { + printk(BIOS_DEBUG, "ChromeEC SW Sync: EC_RW needs update but in RW; rebooting to RO\n"); + google_chromeec_reboot_ro(); + return -1; + } + + /* Update EC if necessary */ + if (need_update) { + printk(BIOS_DEBUG, "ChromeEC SW Sync: updating EC_RW...\n"); + + /* Get ecrw image from CBFS */ + ecrw = cbfs_map("ecrw", &ecrw_size); + if (!ecrw) { + printk(BIOS_ERR, "ChromeEC SW Sync: no ecrw image found in CBFS; cannot update\n"); + return -1; + } + + if (google_chromeec_flash_update_rw(ecrw, ecrw_size)) { + printk(BIOS_ERR, "ChromeEC SW Sync: Failed to update EC_RW.\n"); + return -1; + } + + /* Boards which jump to EC-RW early need a full reset here */ + if (CONFIG(SOC_INTEL_CSE_LITE_SKU)) { + google_chromeec_reboot_ro(); + } + + /* Have EC recompute hash for new EC_RW block */ + if (google_chromeec_read_hash(&resp) ) { + printk(BIOS_ERR, "ChromeEC SW Sync: Failed to read new EC_RW hash.\n"); + return -1; + } + + /* Compare new EC_RW hash to value from CBFS */ + ec_hash = resp.hash_digest; + if(SafeMemcmp(ec_hash, ecrw_hash, SHA256_DIGEST_SIZE)) { + /* hash mismatch! */ + printk(BIOS_DEBUG, "ChromeEC SW Sync: Expected hash: "); + for (i = 0; i < SHA256_DIGEST_SIZE; i++) + printk(BIOS_DEBUG, "%02x", ecrw_hash[i]); + printk(BIOS_DEBUG, "\n"); + printk(BIOS_DEBUG, "ChromeEC SW Sync: EC hash: "); + for (i = 0; i < SHA256_DIGEST_SIZE; i++) + printk(BIOS_DEBUG, "%02x", ec_hash[i]); + printk(BIOS_DEBUG, "\n"); + return -1; + } + printk(BIOS_DEBUG, "ChromeEC SW Sync: EC_RW hashes match\n"); + printk(BIOS_DEBUG, "ChromeEC SW Sync: done\n"); + } else { + printk(BIOS_DEBUG, "ChromeEC SW Sync: EC_RW is up to date\n"); + } + + return 0; +} + +int google_chromeec_read_hash(struct ec_response_vboot_hash *hash) +{ + struct chromeec_command cec_cmd; + struct ec_params_vboot_hash p; + int recalc_requested = 0; + uint64_t start = timer_us(0); + + do { + /* Get hash if available. */ + p.cmd = EC_VBOOT_HASH_GET; + cec_cmd.cmd_code = EC_CMD_VBOOT_HASH; + cec_cmd.cmd_version = 0; + cec_cmd.cmd_data_in = &p; + cec_cmd.cmd_data_out = hash; + cec_cmd.cmd_size_in = sizeof(p); + cec_cmd.cmd_size_out = sizeof(*hash); + cec_cmd.cmd_dev_index = 0; + printk(BIOS_DEBUG, "ChromeEC: Getting hash:\n"); + if (google_chromeec_command(&cec_cmd)) + return -1; + + switch (hash->status) { + case EC_VBOOT_HASH_STATUS_NONE: + /* We have no valid hash - let's request a recalc + * if we haven't done so yet. */ + if (recalc_requested != 0) { + mdelay(CROS_EC_HASH_CHECK_DELAY_MS); + break; + } + printk(BIOS_DEBUG, "ChromeEC: No valid hash (status=%d size=%d). " + "Compute one...\n", hash->status, hash->size); + p.cmd = EC_VBOOT_HASH_RECALC; + p.hash_type = EC_VBOOT_HASH_TYPE_SHA256; + p.nonce_size = 0; + if (CONFIG(SOC_INTEL_CSE_LITE_SKU)) { + p.offset = EC_VBOOT_HASH_OFFSET_UPDATE; + } else { + p.offset = EC_VBOOT_HASH_OFFSET_RW; + } + p.size = 0; + cec_cmd.cmd_code = EC_CMD_VBOOT_HASH; + cec_cmd.cmd_version = 0; + cec_cmd.cmd_data_in = &p; + cec_cmd.cmd_data_out = hash; + cec_cmd.cmd_size_in = sizeof(p); + cec_cmd.cmd_size_out = sizeof(*hash); + cec_cmd.cmd_dev_index = 0; + printk(BIOS_DEBUG, "ChromeEC: Starting EC hash:\n"); + if (google_chromeec_command(&cec_cmd)) + return -1; + recalc_requested = 1; + /* Command will wait to return until hash is done/ready */ + break; + case EC_VBOOT_HASH_STATUS_BUSY: + /* Hash is still calculating. */ + mdelay(CROS_EC_HASH_CHECK_DELAY_MS); + break; + case EC_VBOOT_HASH_STATUS_DONE: + default: + /* We have a valid hash. */ + break; + } + } while (hash->status != EC_VBOOT_HASH_STATUS_DONE && + timer_us(start) < CROS_EC_HASH_TIMEOUT_MS * 1000); + if (hash->status != EC_VBOOT_HASH_STATUS_DONE) { + printk(BIOS_DEBUG, "ChromeEC: Hash status not done: %d\n", hash->status); + return -1; + } + return 0; +} + +int google_chromeec_flash_update_rw(const uint8_t *image, int image_size) +{ + uint32_t rw_offset, rw_size; + int ret; + enum ec_flash_region region; + + if (CONFIG(SOC_INTEL_CSE_LITE_SKU)) { + region = EC_FLASH_REGION_UPDATE; + } else { + region = EC_FLASH_REGION_RW; + } + + /* get max size that can be written, offset to write */ + if (google_chromeec_flash_offset(region, &rw_offset, &rw_size)) + return -1; + if (image_size > rw_size) { + printk(BIOS_ERR, "Image size (%d) greater than flash region size (%d)\n", + image_size, rw_size); + return -1; + } + + /* + * Erase the entire RW section, so that the EC doesn't see any garbage + * past the new image if it's smaller than the current image. + * + */ + ret = google_chromeec_flash_erase(rw_offset, rw_size); + if (ret) + return ret; + /* Write the image */ + return(google_chromeec_flash_write(image, rw_offset, image_size)); +} + +int google_chromeec_flash_offset(enum ec_flash_region region, + uint32_t *offset, uint32_t *size) +{ + struct chromeec_command cec_cmd; + struct ec_params_flash_region_info p; + struct ec_response_flash_region_info r; + p.region = region; + + /* Get offset and size */ + cec_cmd.cmd_code = EC_CMD_FLASH_REGION_INFO; + cec_cmd.cmd_version = EC_VER_FLASH_REGION_INFO; + cec_cmd.cmd_data_in = &p; + cec_cmd.cmd_data_out = &r; + cec_cmd.cmd_size_in = sizeof(p); + cec_cmd.cmd_size_out = sizeof(r); + cec_cmd.cmd_dev_index = 0; + printk(BIOS_DEBUG, "Getting EC region info\n"); + if (google_chromeec_command(&cec_cmd)) + return -1; + + if (offset) + *offset = r.offset; + if (size) + *size = r.size; + return 0; +} + +static uint32_t burst = 0; + +int google_chromeec_flash_write(const uint8_t *data, uint32_t offset, uint32_t size) +{ + //printk(BIOS_DEBUG, "google_chromeec_flash_write(): 0x%x bytes at 0x%x\n", size, offset); + burst = google_chromeec_flash_write_burst_size(); + uint32_t end, off; + int ret; + if (!burst) + return -1; + end = offset + size; + printk(BIOS_DEBUG, "Writing EC RW region\n"); + for (off = offset; off < end; off += burst, data += burst) { + uint32_t todo = MIN(end - off, burst); + if (todo < burst) { + uint8_t *buf = malloc(burst); + memcpy(buf, data, todo); + // Pad the buffer with a decent guess for erased data + // value. + memset(buf + todo, 0xff, burst - todo); + ret = google_chromeec_flash_write_block_old(buf, + off, burst); + free(buf); + } else { + ret = google_chromeec_flash_write_block_old(data, + off, burst); + } + if (ret) + return ret; + } + return 0; +} + +/** + * Return optimal flash write burst size + */ +int google_chromeec_flash_write_burst_size(void) +{ + struct chromeec_command cec_cmd; + struct ec_response_flash_info info; + uint32_t pdata_max_size = EC_LPC_HOST_PACKET_SIZE - sizeof(struct ec_host_request) - + sizeof(struct ec_params_flash_write); + + /* + * Determine whether we can use version 1 of the command with more + * data, or only version 0. + */ + if (!google_chromeec_cmd_version_supported(EC_CMD_FLASH_WRITE, EC_VER_FLASH_WRITE)) + return EC_FLASH_WRITE_VER0_SIZE; + + /* + * Determine step size. This must be a multiple of the write block + * size, and must also fit into the host parameter buffer. + */ + cec_cmd.cmd_code = EC_CMD_FLASH_INFO; + cec_cmd.cmd_version = 0; + cec_cmd.cmd_data_in = NULL; + cec_cmd.cmd_data_out = &info; + cec_cmd.cmd_size_in = 0; + cec_cmd.cmd_size_out = sizeof(info); + cec_cmd.cmd_dev_index = 0; + if (google_chromeec_command(&cec_cmd)) + return -1; + + return (pdata_max_size / info.write_block_size) * + info.write_block_size; +} + +static uint8_t *buf = NULL; +static uint32_t bufsize = 0; + +/** + * Write a single block to the flash + * + * Write a block of data to the EC flash. The size must not exceed the flash + * write block size which you can obtain from cros_ec_flash_write_burst_size(). + * + * The offset starts at 0. You can obtain the region information from + * cros_ec_flash_offset() to find out where to write for a particular region. + * + * Attempting to write to the region where the EC is currently running from + * will result in an error. + * + * @param data Pointer to data buffer to write + * @param offset Offset within flash to write to. + * @param size Number of bytes to write + * @return 0 if ok, -1 on error + */ +int google_chromeec_flash_write_block_old(const uint8_t *data, + uint32_t offset, uint32_t size) +{ + struct chromeec_command cec_cmd; + struct ec_params_flash_write *p; + + assert(data); + /* Make sure request fits in the allowed packet size */ + if (bufsize == 0) { + bufsize = sizeof(*p) + size; + buf = malloc(bufsize); + } else if (bufsize != sizeof(*p) + size) { + free(buf); + bufsize = sizeof(*p) + size; + buf = malloc(bufsize); + } + if (bufsize > EC_LPC_HOST_PACKET_SIZE) + return -1; + + p = (struct ec_params_flash_write *)buf; + p->offset = offset; + p->size = size; + memcpy(p + 1, data, size); + + cec_cmd.cmd_code = EC_CMD_FLASH_WRITE; + cec_cmd.cmd_version = burst == EC_FLASH_WRITE_VER0_SIZE ? 0 : EC_VER_FLASH_WRITE; + cec_cmd.cmd_data_in = buf; + cec_cmd.cmd_data_out = NULL; + cec_cmd.cmd_size_in = bufsize; + cec_cmd.cmd_size_out = 0; + cec_cmd.cmd_dev_index = 0; + + return google_chromeec_command(&cec_cmd); +} + +/** + * Return non-zero if the EC supports the command and version + * + * @param cmd Command to check + * @param ver Version to check + * @return non-zero if command version supported; 0 if not. + */ +int google_chromeec_cmd_version_supported(int cmd, int ver) +{ + uint32_t mask = 0; + if (google_chromeec_get_cmd_versions(cmd, &mask)) + return 0; + return (mask & EC_VER_MASK(ver)) ? 1 : 0; } /* Returns data role and type of device connected */ diff --git a/src/ec/google/chromeec/ec.h b/src/ec/google/chromeec/ec.h index 42326601e8a..964cca25f00 100644 --- a/src/ec/google/chromeec/ec.h +++ b/src/ec/google/chromeec/ec.h @@ -353,6 +353,21 @@ struct usb_pd_port_caps { */ int google_chromeec_get_pd_port_caps(int port, struct usb_pd_port_caps *port_caps); +#define SHA256_DIGEST_SIZE 32 + +void google_chromeec_reboot_ro(void); +void google_chromeec_reboot_rw(void); + +int google_chromeec_swsync(void); +int google_chromeec_read_hash(struct ec_response_vboot_hash *hash); +int google_chromeec_flash_update_rw(const uint8_t *image, int image_size); +int google_chromeec_flash_offset(enum ec_flash_region region, + uint32_t *offset, uint32_t *size); +int google_chromeec_flash_write(const uint8_t *data, uint32_t offset, uint32_t size); +int google_chromeec_flash_write_burst_size(void); +int google_chromeec_flash_write_block_old(const uint8_t *data, + uint32_t offset, uint32_t size); +int google_chromeec_cmd_version_supported(int cmd, int ver); /** * Get the keyboard configuration / layout information from EC diff --git a/src/ec/google/chromeec/utility.c b/src/ec/google/chromeec/utility.c new file mode 100644 index 00000000000..3448265d993 --- /dev/null +++ b/src/ec/google/chromeec/utility.c @@ -0,0 +1,35 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#include +#include +#include +#include +#include +#include +#include "utility.h" + +int SafeMemcmp(const void *s1, const void *s2, size_t n) +{ + const unsigned char *us1 = s1; + const unsigned char *us2 = s2; + int result = 0; + + if (0 == n) + return 0; + + /* + * Code snippet without data-dependent branch due to Nate Lawson + * (nate@root.org) of Root Labs. + */ + while (n--) + result |= *us1++ ^ *us2++; + + return result != 0; +} + +long timer_us(long startTime) +{ + struct mono_time now; + timer_monotonic_get(&now); + return (now.microseconds - startTime); +} diff --git a/src/ec/google/chromeec/utility.h b/src/ec/google/chromeec/utility.h new file mode 100644 index 00000000000..d832b6a1c40 --- /dev/null +++ b/src/ec/google/chromeec/utility.h @@ -0,0 +1,15 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +/** + * Compare [n] bytes starting at [s1] with [s2] and return 0 if they + * match, 1 if they don't. Returns 0 if n=0, since no bytes mismatched. + * + * Time taken to perform the comparison is only dependent on [n] and + * not on the relationship of the match between [s1] and [s2]. + * + * Note that unlike Memcmp(), this only indicates inequality, not + * whether s1 is less than or greater than s2. + */ +int SafeMemcmp(const void *s1, const void *s2, size_t n); + +long timer_us(long startTime); From 0dcfd1ccfd2090b707fba95188b2d6c711e40c14 Mon Sep 17 00:00:00 2001 From: Matt DeVillier Date: Mon, 7 Feb 2022 18:59:30 -0600 Subject: [PATCH 007/137] ec/chromeec/ec_lpc: increase cmd timeout to 2s Change-Id: I7f16f17273b4687ada653c3c160879e048f34b4a Signed-off-by: Matt DeVillier --- src/ec/google/chromeec/ec_lpc.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/src/ec/google/chromeec/ec_lpc.c b/src/ec/google/chromeec/ec_lpc.c index 080b95da445..36d3ee29fa8 100644 --- a/src/ec/google/chromeec/ec_lpc.c +++ b/src/ec/google/chromeec/ec_lpc.c @@ -94,8 +94,8 @@ static inline u8 write_byte(u8 val, u16 port) static int google_chromeec_status_check(u16 port, u8 mask, u8 cond) { struct stopwatch timeout_sw; - /* One second is more than plenty for any EC operation to complete */ - const uint64_t ec_status_timeout_us = 1 * USECS_PER_SEC; + /* Two seconds is more than plenty for any EC operation to complete */ + const uint64_t ec_status_timeout_us = 2 * USECS_PER_SEC; /* Wait 1 usec between read attempts */ const uint64_t ec_status_read_period_us = 1; From 080efbbcf951fbecd10c113ff93fcba2091f0391 Mon Sep 17 00:00:00 2001 From: Matt DeVillier Date: Wed, 17 Jan 2018 19:43:47 -0600 Subject: [PATCH 008/137] ec/chromeec: revert keyboard backlight detection Recent changes to allow for dynamic detection of keyboard backlight broke functionality on older/legacy devices, particularly under Windows. Until a better solution found, revert to previous behavior. Change-Id: I30fcffb1cde0310660f1b6f97f55203d14586268 Signed-off-by: Matt DeVillier --- .../chromeec/acpi/keyboard_backlight.asl | 22 +++---------------- 1 file changed, 3 insertions(+), 19 deletions(-) diff --git a/src/ec/google/chromeec/acpi/keyboard_backlight.asl b/src/ec/google/chromeec/acpi/keyboard_backlight.asl index 87be075db08..b6f9e6da84b 100644 --- a/src/ec/google/chromeec/acpi/keyboard_backlight.asl +++ b/src/ec/google/chromeec/acpi/keyboard_backlight.asl @@ -10,28 +10,12 @@ Scope (\_SB) Name (_HID, "GOOG0002") Name (_UID, 1) - /* Ask EC if we even have a backlight - * Return 0xf (present, enabled, show in UI, functioning) or 0 - * - * With older EC codebases that don't support the Device - * Features bitfield, this reports the keyboard backlight as - * enabled since reads to undefined addresses in EC address - * space return 0xff and so KBLE will be 1. - */ Method (_STA, 0, NotSerialized) { - /* If query is unsupported, but this code is compiled - * in, assume the backlight exists physically. + /* If this code is compiled in, assume the backlight + * exists physically. */ - If (\_SB.PCI0.LPCB.EC0.DFUD == 1) { - Return (0xf) - } - /* If EC reports that backlight exists, trust it */ - If (\_SB.PCI0.LPCB.EC0.KBLE == 1) { - Return (0xf) - } - /* Otherwise: no device -> disable */ - Return (0) + Return (0xf) } /* Read current backlight value */ From 50b067faa058310f0c2eb17cae699c2ea61567f3 Mon Sep 17 00:00:00 2001 From: Matt DeVillier Date: Fri, 4 Jan 2019 01:14:28 -0600 Subject: [PATCH 009/137] Revert "chromeec: Disable battery remaining capacity workaround" This reverts commit 55a972236ee93d36bd3df4e8e5680ba447242bd7. --- src/ec/google/chromeec/acpi/battery.asl | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/src/ec/google/chromeec/acpi/battery.asl b/src/ec/google/chromeec/acpi/battery.asl index 53441111677..9291e7780b8 100644 --- a/src/ec/google/chromeec/acpi/battery.asl +++ b/src/ec/google/chromeec/acpi/battery.asl @@ -279,8 +279,8 @@ Device (BAT0) }) Name (BSTP, 0) - // Workaround for full battery status, disabled by default - Name (BFWK, 0) + // Workaround for full battery status, enabled by default + Name (BFWK, 1) // Method to enable full battery workaround Method (BFWE) @@ -369,8 +369,8 @@ Device (BAT1) }) Name (BSTP, 0) - // Workaround for full battery status, disabled by default - Name (BFWK, 0) + // Workaround for full battery status, enabled by default + Name (BFWK, 1) // Method to enable full battery workaround Method (BFWE) From cc95bd766e23fc339e2e3e5768c9d46bc7288c3f Mon Sep 17 00:00:00 2001 From: Matt DeVillier Date: Thu, 20 Feb 2020 19:28:31 -0600 Subject: [PATCH 010/137] ec/chromeec: set auto fan control on startup Several devices had issues with fan control on cold boot and/or on S3 resume, so ensure auto control enabled on devices which have a fan. Devices without a fan will simply return an unsupported error. Change-Id: I08a8562531f8af0c71230477d0221d536443f096 Signed-off-by: Matt DeVillier --- src/ec/google/chromeec/ec.c | 11 +++++++++++ 1 file changed, 11 insertions(+) diff --git a/src/ec/google/chromeec/ec.c b/src/ec/google/chromeec/ec.c index 25e00e69955..f75f2c0ae9f 100644 --- a/src/ec/google/chromeec/ec.c +++ b/src/ec/google/chromeec/ec.c @@ -1405,6 +1405,17 @@ void google_chromeec_init(void) /* re-run version command & print */ google_chromeec_get_version(); } + + /* Enable auto fan control if applicable */ + struct chromeec_command cec_cmd; + cec_cmd.cmd_code = EC_CMD_THERMAL_AUTO_FAN_CTRL; + cec_cmd.cmd_version = 0; + cec_cmd.cmd_data_in = NULL; + cec_cmd.cmd_data_out = NULL; + cec_cmd.cmd_size_in = 0; + cec_cmd.cmd_size_out = 0; + cec_cmd.cmd_dev_index = 0; + google_chromeec_command(&cec_cmd); } int google_chromeec_get_num_pd_ports(unsigned int *num_ports) From 547512e726db50be50b8309818bb3debcfa58b86 Mon Sep 17 00:00:00 2001 From: Matt DeVillier Date: Mon, 17 Apr 2017 18:58:13 -0500 Subject: [PATCH 011/137] nb/sandybridge: hide DPTF ACPI device Signed-off-by: Matt DeVillier --- src/northbridge/intel/sandybridge/acpi/sandybridge.asl | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/src/northbridge/intel/sandybridge/acpi/sandybridge.asl b/src/northbridge/intel/sandybridge/acpi/sandybridge.asl index cf1d61ce9fe..980a31babf4 100644 --- a/src/northbridge/intel/sandybridge/acpi/sandybridge.asl +++ b/src/northbridge/intel/sandybridge/acpi/sandybridge.asl @@ -49,3 +49,12 @@ Device (PDRC) /* Integrated graphics 0:2.0 */ #include + +Device (DPTF) +{ + Name (_ADR, 0x00040000) // _ADR: Address + Method (_STA, 0, NotSerialized) // _STA: Status + { + Return (0x0B) + } +} From a08426b01ef7c6c85119eee044402d1e0961967c Mon Sep 17 00:00:00 2001 From: Matt DeVillier Date: Sun, 18 Sep 2016 22:50:52 -0500 Subject: [PATCH 012/137] sb/intel/bd82x6x: don't hide ME PCI device from OS The ME needs to be visible for proper operation in Windows/OSX Signed-off-by: Matt DeVillier --- src/southbridge/intel/bd82x6x/me.c | 1 - src/southbridge/intel/bd82x6x/me_8.x.c | 1 - 2 files changed, 2 deletions(-) diff --git a/src/southbridge/intel/bd82x6x/me.c b/src/southbridge/intel/bd82x6x/me.c index 66c7dd2997b..caf485412a7 100644 --- a/src/southbridge/intel/bd82x6x/me.c +++ b/src/southbridge/intel/bd82x6x/me.c @@ -192,7 +192,6 @@ static void intel_me_init(struct device *dev) #if CONFIG(HIDE_MEI_ON_ERROR) case ME_ERROR_BIOS_PATH: #endif - intel_me_hide(dev); break; case ME_NORMAL_BIOS_PATH: diff --git a/src/southbridge/intel/bd82x6x/me_8.x.c b/src/southbridge/intel/bd82x6x/me_8.x.c index 2a6caa67db4..15510ff65d4 100644 --- a/src/southbridge/intel/bd82x6x/me_8.x.c +++ b/src/southbridge/intel/bd82x6x/me_8.x.c @@ -191,7 +191,6 @@ static void intel_me_init(struct device *dev) #if CONFIG(HIDE_MEI_ON_ERROR) case ME_ERROR_BIOS_PATH: #endif - intel_me_hide(dev); break; case ME_NORMAL_BIOS_PATH: From 9e7457fc6c81275ed540669ddcf65293184c7475 Mon Sep 17 00:00:00 2001 From: Matt DeVillier Date: Thu, 13 Oct 2016 14:58:10 -0500 Subject: [PATCH 013/137] sb/intel/bd82x6x: set smbus subsystem vendor/ID to avoid conflicts Signed-off-by: Matt DeVillier --- src/southbridge/intel/bd82x6x/smbus.c | 13 ++++++++++++- 1 file changed, 12 insertions(+), 1 deletion(-) diff --git a/src/southbridge/intel/bd82x6x/smbus.c b/src/southbridge/intel/bd82x6x/smbus.c index 3c190757d66..4f560f45757 100644 --- a/src/southbridge/intel/bd82x6x/smbus.c +++ b/src/southbridge/intel/bd82x6x/smbus.c @@ -24,6 +24,17 @@ static void pch_smbus_init(struct device *dev) smbus_set_slave_addr(res->base, SMBUS_SLAVE_ADDR); } +static void smbus_set_subsystem(struct device *dev, unsigned vendor, + unsigned device) +{ + pci_write_config32(dev, PCI_SUBSYSTEM_VENDOR_ID, + ((0x04B4 & 0xffff) << 16) | (0x18D1 & 0xffff)); +} + +static struct pci_operations smbus_pci_ops = { + .set_subsystem = smbus_set_subsystem, +}; + static const char *smbus_acpi_name(const struct device *dev) { return "SBUS"; @@ -36,7 +47,7 @@ static struct device_operations smbus_ops = { .scan_bus = scan_smbus, .init = pch_smbus_init, .ops_smbus_bus = &lops_smbus_bus, - .ops_pci = &pci_dev_ops_pci, + .ops_pci = &smbus_pci_ops, .acpi_name = smbus_acpi_name, }; From c8a5d51810afdcca4a2e52700b251a04407f7581 Mon Sep 17 00:00:00 2001 From: Matt DeVillier Date: Thu, 9 Feb 2017 13:27:23 -0600 Subject: [PATCH 014/137] ec/mec1308: fix SIO/PS2 KB ACPI for Windows driver Change-Id: I7b6b09da1a3fdc34ef43789c699f7fd22b4b655b Signed-off-by: Matt DeVillier --- src/superio/smsc/mec1308/acpi/superio.asl | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/src/superio/smsc/mec1308/acpi/superio.asl b/src/superio/smsc/mec1308/acpi/superio.asl index 117de961db9..3e1a9d38ca0 100644 --- a/src/superio/smsc/mec1308/acpi/superio.asl +++ b/src/superio/smsc/mec1308/acpi/superio.asl @@ -3,7 +3,8 @@ // Scope is \_SB.PCI0.LPCB Device (SIO) { - Name (_ADR, 0x2E) + Name (_HID, EisaId ("PNP0A05")) + OperationRegion (SIOA, SystemIO, 0x2E, 0x02) Field (SIOA, ByteAcc, NoLock, Preserve) { From e04bee926bb2761c4618cb0549f506e3be97c0ad Mon Sep 17 00:00:00 2001 From: Matt DeVillier Date: Thu, 6 Jul 2017 12:55:33 -0500 Subject: [PATCH 015/137] ec/ene_kb3940q: Fix PS2K under Windows Add _HID to parent SIO device so Windows can find the PS2K, and remove _ADR since they cannot coexist. Change-Id: I772ceef1b439cfd4e2740e53362bee9d494fb36d Signed-off-by: Matt DeVillier --- src/ec/quanta/ene_kb3940q/acpi/superio.asl | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/src/ec/quanta/ene_kb3940q/acpi/superio.asl b/src/ec/quanta/ene_kb3940q/acpi/superio.asl index b5962f02670..8ace6dd01e9 100644 --- a/src/ec/quanta/ene_kb3940q/acpi/superio.asl +++ b/src/ec/quanta/ene_kb3940q/acpi/superio.asl @@ -3,9 +3,8 @@ // Scope is \_SB.PCI0.LPCB Device (SIO) { + Name (_HID, EisaId("PNP0A05")) Name (_UID, 0) - Name (_ADR, 0) - #ifdef SIO_EC_ENABLE_PS2K Device (PS2K) // Keyboard From 7fc5c27227542e964e6f15e64824741dcbaa05d2 Mon Sep 17 00:00:00 2001 From: Matt DeVillier Date: Mon, 11 Sep 2017 17:01:25 -0500 Subject: [PATCH 016/137] ec/quanta/it8518: adjust PS2M HID/CID to enable multitouch Signed-off-by: Matt DeVillier --- src/ec/quanta/it8518/acpi/superio.asl | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/src/ec/quanta/it8518/acpi/superio.asl b/src/ec/quanta/it8518/acpi/superio.asl index b91324ded34..9519f35010f 100644 --- a/src/ec/quanta/it8518/acpi/superio.asl +++ b/src/ec/quanta/it8518/acpi/superio.asl @@ -31,7 +31,8 @@ Device (SIO) #ifdef SIO_ENABLE_PS2M Device (PS2M) // Mouse { - Name (_HID, EISAID("PNP0F13")) + Name (_HID, EISAID("LEN2011")) + Name (_CID, EISAID("PNP0F13")) Method (_STA, 0, NotSerialized) { From ad437d1d3bc87f7485a327ef301abc8c0780c873 Mon Sep 17 00:00:00 2001 From: Matt DeVillier Date: Sat, 24 Dec 2016 15:33:29 -0600 Subject: [PATCH 017/137] samsung/stumpy: adjust fan control use same default fan speed, fan control as other IT8772 devices Signed-off-by: Matt DeVillier --- src/mainboard/samsung/stumpy/acpi/thermal.asl | 6 +----- src/mainboard/samsung/stumpy/acpi_tables.c | 2 -- src/mainboard/samsung/stumpy/devicetree.cb | 2 ++ src/mainboard/samsung/stumpy/thermal.h | 12 +++++------- 4 files changed, 8 insertions(+), 14 deletions(-) diff --git a/src/mainboard/samsung/stumpy/acpi/thermal.asl b/src/mainboard/samsung/stumpy/acpi/thermal.asl index 1edaafd84e5..73cb3670f80 100644 --- a/src/mainboard/samsung/stumpy/acpi/thermal.asl +++ b/src/mainboard/samsung/stumpy/acpi/thermal.asl @@ -102,11 +102,7 @@ Scope (\_TZ) } Method (_AC4) { - If (\FLVL <= 4) { - Return (CTOK (\F4OF)) - } Else { - Return (CTOK (\F4ON)) - } + Return (CTOK (0)) } Name (_AL0, Package () { FAN0 }) diff --git a/src/mainboard/samsung/stumpy/acpi_tables.c b/src/mainboard/samsung/stumpy/acpi_tables.c index 6912ca1a76e..bf297d7cf3b 100644 --- a/src/mainboard/samsung/stumpy/acpi_tables.c +++ b/src/mainboard/samsung/stumpy/acpi_tables.c @@ -19,8 +19,6 @@ void mainboard_fill_gnvs(struct global_nvs *gnvs) gnvs->s5u0 = 1; gnvs->s5u1 = 1; - gnvs->f4of = FAN4_THRESHOLD_OFF; - gnvs->f4on = FAN4_THRESHOLD_ON; gnvs->f4pw = FAN4_PWM; gnvs->f3of = FAN3_THRESHOLD_OFF; diff --git a/src/mainboard/samsung/stumpy/devicetree.cb b/src/mainboard/samsung/stumpy/devicetree.cb index b348f140cc6..c1c11b357fd 100644 --- a/src/mainboard/samsung/stumpy/devicetree.cb +++ b/src/mainboard/samsung/stumpy/devicetree.cb @@ -74,6 +74,8 @@ chip northbridge/intel/sandybridge register "peci_tmpin" = "3" # Enable FAN3 register "fan3_enable" = "true" + # Default FAN3 speed + register "fan3_speed" = "0x90" device pnp 2e.0 off end # FDC device pnp 2e.1 on # Serial Port 1 diff --git a/src/mainboard/samsung/stumpy/thermal.h b/src/mainboard/samsung/stumpy/thermal.h index fa8a08ed75d..41327e19bcf 100644 --- a/src/mainboard/samsung/stumpy/thermal.h +++ b/src/mainboard/samsung/stumpy/thermal.h @@ -3,25 +3,23 @@ #ifndef STUMPY_THERMAL_H #define STUMPY_THERMAL_H -/* Fan is OFF */ -#define FAN4_THRESHOLD_OFF 0 -#define FAN4_THRESHOLD_ON 0 -#define FAN4_PWM 0x00 +/* Fan is at default speed */ +#define FAN4_PWM 0x90 /* Fan is at LOW speed */ #define FAN3_THRESHOLD_OFF 48 #define FAN3_THRESHOLD_ON 55 -#define FAN3_PWM 0x40 +#define FAN3_PWM 0xA0 /* Fan is at MEDIUM speed */ #define FAN2_THRESHOLD_OFF 52 #define FAN2_THRESHOLD_ON 64 -#define FAN2_PWM 0x80 +#define FAN2_PWM 0xB0 /* Fan is at HIGH speed */ #define FAN1_THRESHOLD_OFF 60 #define FAN1_THRESHOLD_ON 68 -#define FAN1_PWM 0xb0 +#define FAN1_PWM 0xC0 /* Fan is at FULL speed */ #define FAN0_THRESHOLD_OFF 66 From 5f751ad452f94e04810852fc0db917b370f84f05 Mon Sep 17 00:00:00 2001 From: Matt DeVillier Date: Fri, 17 Feb 2017 13:30:57 -0600 Subject: [PATCH 018/137] mb/google/butterfly: update TP ACPI for coolstar's v3 Windows driver Change-Id: I971795becfb05fb42921ff6f40a20892f4f5654a Signed-off-by: Matt DeVillier --- src/mainboard/google/butterfly/acpi/mainboard.asl | 10 ++++------ 1 file changed, 4 insertions(+), 6 deletions(-) diff --git a/src/mainboard/google/butterfly/acpi/mainboard.asl b/src/mainboard/google/butterfly/acpi/mainboard.asl index 3552e29ad85..f96dc11b009 100644 --- a/src/mainboard/google/butterfly/acpi/mainboard.asl +++ b/src/mainboard/google/butterfly/acpi/mainboard.asl @@ -15,11 +15,9 @@ Scope (\_SB) { Device (TPAD) { - Name (_UID, 1) - - // Report as a Sleep Button device so Linux will - // automatically enable it as a wake source - Name(_HID, EisaId("PNP0C0E")) + Name(_HID, "CYSM0000") + Name(_UID, 1) + Name(_HRV, 2) // Trackpad Wake is GPIO11, wake from S3 Name(_PRW, Package() { BOARD_TRACKPAD_WAKE_GPIO, 0x03 }) @@ -27,7 +25,7 @@ Scope (\_SB) { Name(_CRS, ResourceTemplate() { // PIRQG -> GSI22 - Interrupt (ResourceConsumer, EDGE, ActiveLow) + Interrupt (ResourceConsumer, Level, ActiveLow, Exclusive, ,, ) { BOARD_TRACKPAD_IRQ } From d40ea6779e7065dbdd636f1a6ce0e9b1dc627961 Mon Sep 17 00:00:00 2001 From: ReddestDream Date: Thu, 13 Apr 2017 14:25:34 -0400 Subject: [PATCH 019/137] mb/google/parrot: update TP ACPI for coolstar's v3 Windows driver Change-Id: Ic164244eceb52221653bd60f7217f9a09e38c1b6 Signed-off-by: Matt DeVillier --- src/mainboard/google/parrot/acpi/mainboard.asl | 7 +++---- 1 file changed, 3 insertions(+), 4 deletions(-) diff --git a/src/mainboard/google/parrot/acpi/mainboard.asl b/src/mainboard/google/parrot/acpi/mainboard.asl index 7fc07fa6f13..3f2e43c8f24 100644 --- a/src/mainboard/google/parrot/acpi/mainboard.asl +++ b/src/mainboard/google/parrot/acpi/mainboard.asl @@ -29,11 +29,10 @@ Scope (\_SB) { Device (TPAD) { - Name (_UID, 1) - // Report as a Sleep Button device so Linux will - // automatically enable it as a wake source - Name(_HID, EisaId("PNP0C0E")) + Name(_HID, "CYSM0000") + Name(_UID, 1) + Name(_HRV, 2) // Trackpad Wake is GPIO12, wake from S3 Name(_PRW, Package() { BOARD_TRACKPAD_WAKE_GPIO, 0x03 }) From cf0ebf4e76ff12cb4eb2574448ac6fe6a5e4dbd1 Mon Sep 17 00:00:00 2001 From: ReddestDream Date: Thu, 25 May 2017 10:45:53 -0400 Subject: [PATCH 020/137] mb/samsung/lumpy: update TP ACPI for coolstar's v3 Windows driver Change-Id: Ie4268b4de5779ee148699c7bef8c700a99816f1e Signed-off-by: Matt DeVillier --- src/mainboard/samsung/lumpy/acpi/mainboard.asl | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/src/mainboard/samsung/lumpy/acpi/mainboard.asl b/src/mainboard/samsung/lumpy/acpi/mainboard.asl index d9c9d614a73..972da693c3f 100644 --- a/src/mainboard/samsung/lumpy/acpi/mainboard.asl +++ b/src/mainboard/samsung/lumpy/acpi/mainboard.asl @@ -23,9 +23,9 @@ Scope (\_SB) { Device (TPAD) { - // Report as a Sleep Button device so - // Linux will automatically enable for wake - Name(_HID, EisaId("PNP0C0E")) + Name(_HID, "CYSM0000") + Name(_UID, 1) + Name(_HRV, 2) // Trackpad Wake is GPIO11 Name(_PRW, Package() { BOARD_TRACKPAD_WAKE_GPIO, 0x03 }) @@ -33,7 +33,7 @@ Scope (\_SB) { Name(_CRS, ResourceTemplate() { // PIRQF -> GSI21 - Interrupt (ResourceConsumer, Edge, ActiveLow) + Interrupt (ResourceConsumer, Level, ActiveLow, Exclusive, ,, ) { BOARD_TRACKPAD_IRQ } From fa04acdd664d85659b713768467322d2a3b16f8b Mon Sep 17 00:00:00 2001 From: Matt DeVillier Date: Wed, 10 Nov 2021 11:20:26 -0600 Subject: [PATCH 021/137] SNB: default DVMT to 96MB vs 32MB Change-Id: Ic6e4b8b2385538eaf87082d98e8c26e9b64eb858 Signed-off-by: Matt DeVillier --- src/northbridge/intel/sandybridge/early_init.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/northbridge/intel/sandybridge/early_init.c b/src/northbridge/intel/sandybridge/early_init.c index e35251359ac..d1642d5a23a 100644 --- a/src/northbridge/intel/sandybridge/early_init.c +++ b/src/northbridge/intel/sandybridge/early_init.c @@ -87,7 +87,7 @@ static void sandybridge_setup_graphics(void) printk(BIOS_DEBUG, "Initializing Graphics...\n"); /* Fall back to 32 MiB for IGD memory by setting GGC[7:3] = 1 */ - gfxsize = get_uint_option("gfx_uma_size", 0); + gfxsize = get_uint_option("gfx_uma_size", 2); reg16 = pci_read_config16(HOST_BRIDGE, GGC); reg16 &= ~0x00f8; From c2fad42a793b080f35d18a8fbdaab91f96a06e2b Mon Sep 17 00:00:00 2001 From: Matt DeVillier Date: Fri, 23 Dec 2022 15:39:51 -0600 Subject: [PATCH 022/137] sb/intel/lynxpoint: don't hide ME PCI device The ME needs to be visible for proper operation in Windows/OSX Change-Id: Ief4ac90f9506b8ed1075a7d2cbc23ce5868daa1f Signed-off-by: Matt DeVillier --- src/southbridge/intel/lynxpoint/Kconfig | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/southbridge/intel/lynxpoint/Kconfig b/src/southbridge/intel/lynxpoint/Kconfig index 63058124a56..c58809c6dfe 100644 --- a/src/southbridge/intel/lynxpoint/Kconfig +++ b/src/southbridge/intel/lynxpoint/Kconfig @@ -86,7 +86,7 @@ config CONSOLE_UART_BASE_ADDRESS config DISABLE_ME_PCI bool "Disable Intel ME PCI interface (MEI1)" - default y + default n help Disable and hide the ME PCI interface during finalize stage of boot. This will prevent the OS (and userspace apps) from interacting with From fc2144d59ce41879a5edc2c22771f25672c75c7a Mon Sep 17 00:00:00 2001 From: Matt DeVillier Date: Sun, 4 Sep 2016 15:06:23 -0500 Subject: [PATCH 023/137] sb/intel/lynxpoint: update XHCI init update lynxpoint's XHCI init using soc/broadwell as a model. fixes operation under Windows Change-Id: I02c880cb114edc0725533fec58e0d9f2790745e4 Signed-off-by: Matt DeVillier --- src/southbridge/intel/lynxpoint/usb_xhci.c | 47 +++------------------- 1 file changed, 6 insertions(+), 41 deletions(-) diff --git a/src/southbridge/intel/lynxpoint/usb_xhci.c b/src/southbridge/intel/lynxpoint/usb_xhci.c index 1219bccf8c7..9a8935a479e 100644 --- a/src/southbridge/intel/lynxpoint/usb_xhci.c +++ b/src/southbridge/intel/lynxpoint/usb_xhci.c @@ -273,56 +273,21 @@ static void usb_xhci_clock_gating(struct device *dev) static void usb_xhci_init(struct device *dev) { + struct resource *res = find_resource(dev, PCI_BASE_ADDRESS_0); u32 reg32; - u8 *mem_base = usb_xhci_mem_base(dev); struct southbridge_intel_lynxpoint_config *config = dev->chip_info; /* D20:F0:74h[1:0] = 00b (set D0 state) */ pci_update_config16(dev, XHCI_PWR_CTL_STS, ~PWR_CTL_SET_MASK, PWR_CTL_SET_D0); + /* Disable Compliance Mode Entry */ + reg32 = read32(res2mmio(res, 0x80ec, 0)); + reg32 |= (1 << 0); + write32(res2mmio(res, 0x80ec, 0), reg32); + /* Enable clock gating first */ usb_xhci_clock_gating(dev); - reg32 = read32(mem_base + 0x8144); - if (pch_is_lp()) { - /* XHCIBAR + 8144h[8,7,6] = 111b */ - reg32 |= (1 << 8) | (1 << 7) | (1 << 6); - } else { - /* XHCIBAR + 8144h[8,7,6] = 100b */ - reg32 &= ~((1 << 7) | (1 << 6)); - reg32 |= (1 << 8); - } - write32(mem_base + 0x8144, reg32); - - if (pch_is_lp()) { - /* XHCIBAR + 816Ch[19:0] = 000e0038h */ - reg32 = read32(mem_base + 0x816c); - reg32 &= ~0x000fffff; - reg32 |= 0x000e0038; - write32(mem_base + 0x816c, reg32); - - /* D20:F0:B0h[17,14,13] = 100b */ - pci_update_config32(dev, 0xb0, ~((1 << 14) | (1 << 13)), 1 << 17); - } - - reg32 = pci_read_config32(dev, 0x50); - if (pch_is_lp()) { - /* D20:F0:50h[28:0] = 0FCE2E5Fh */ - reg32 &= ~0x1fffffff; - reg32 |= 0x0fce2e5f; - } else { - /* D20:F0:50h[26:0] = 07886E9Fh */ - reg32 &= ~0x07ffffff; - reg32 |= 0x07886e9f; - } - pci_write_config32(dev, 0x50, reg32); - - /* D20:F0:44h[31] = 1 (Access Control Bit) */ - pci_or_config32(dev, 0x44, 1 << 31); - - /* D20:F0:40h[31,23] = 10b (OC Configuration Done) */ - pci_update_config32(dev, 0x40, ~(1 << 23), 1 << 31); /* unsupported request */ - if (acpi_is_wakeup_s3()) { /* Reset ports that are disabled or * polling before returning to the OS. */ From b6728e8a868684474331e7d25eae90b30cce3161 Mon Sep 17 00:00:00 2001 From: Matt DeVillier Date: Wed, 23 Nov 2016 23:48:47 -0600 Subject: [PATCH 024/137] google/beltino (variants): use sane fan speeds/thermal thresholds Signed-off-by: Matt DeVillier --- src/mainboard/google/beltino/acpi/thermal.asl | 6 +--- src/mainboard/google/beltino/acpi_tables.c | 2 -- src/mainboard/google/beltino/devicetree.cb | 1 + .../mccloud/include/variant/thermal.h | 28 ++++++++--------- .../variants/monroe/include/variant/thermal.h | 30 +++++++++---------- .../panther/include/variant/thermal.h | 24 +++++++-------- .../variants/tricky/include/variant/thermal.h | 26 ++++++++-------- .../variants/zako/include/variant/thermal.h | 24 +++++++-------- 8 files changed, 63 insertions(+), 78 deletions(-) diff --git a/src/mainboard/google/beltino/acpi/thermal.asl b/src/mainboard/google/beltino/acpi/thermal.asl index 3463028bbdf..e71a5e6ea0d 100644 --- a/src/mainboard/google/beltino/acpi/thermal.asl +++ b/src/mainboard/google/beltino/acpi/thermal.asl @@ -141,11 +141,7 @@ Scope (\_TZ) } Method (_AC4) { - If (\FLVL <= 4) { - Return (CTOK (FAN4_THRESHOLD_OFF)) - } Else { - Return (CTOK (FAN4_THRESHOLD_ON)) - } + Return (CTOK (0)) } Name (_AL0, Package () { FAN0 }) diff --git a/src/mainboard/google/beltino/acpi_tables.c b/src/mainboard/google/beltino/acpi_tables.c index 33f4b6bf3d5..0df98bff955 100644 --- a/src/mainboard/google/beltino/acpi_tables.c +++ b/src/mainboard/google/beltino/acpi_tables.c @@ -19,8 +19,6 @@ void mainboard_fill_gnvs(struct global_nvs *gnvs) /* TPM Present */ gnvs->tpmp = 1; - gnvs->f4of = FAN4_THRESHOLD_OFF; - gnvs->f4on = FAN4_THRESHOLD_ON; gnvs->f4pw = FAN4_PWM; gnvs->f3of = FAN3_THRESHOLD_OFF; diff --git a/src/mainboard/google/beltino/devicetree.cb b/src/mainboard/google/beltino/devicetree.cb index cdaab35b54e..15187f38d9c 100644 --- a/src/mainboard/google/beltino/devicetree.cb +++ b/src/mainboard/google/beltino/devicetree.cb @@ -84,6 +84,7 @@ chip northbridge/intel/haswell register "peci_tmpin" = "3" # Enable FAN2 register "fan2_enable" = "true" + register "fan2_speed" = "0x47" device pnp 2e.0 off end # FDC device pnp 2e.1 on # Serial Port 1 diff --git a/src/mainboard/google/beltino/variants/mccloud/include/variant/thermal.h b/src/mainboard/google/beltino/variants/mccloud/include/variant/thermal.h index f4c04743291..3bf0f6aa348 100644 --- a/src/mainboard/google/beltino/variants/mccloud/include/variant/thermal.h +++ b/src/mainboard/google/beltino/variants/mccloud/include/variant/thermal.h @@ -3,29 +3,27 @@ #ifndef THERMAL_H #define THERMAL_H -/* Fan is OFF */ -#define FAN4_THRESHOLD_OFF 0 -#define FAN4_THRESHOLD_ON 0 -#define FAN4_PWM 0x00 +/* Fan is at default speed */ +#define FAN4_PWM 0x47 /* Fan is at LOW speed */ -#define FAN3_THRESHOLD_OFF 35 -#define FAN3_THRESHOLD_ON 40 -#define FAN3_PWM 0x88 +#define FAN3_THRESHOLD_OFF 40 +#define FAN3_THRESHOLD_ON 50 +#define FAN3_PWM 0x68 /* Fan is at MEDIUM speed */ -#define FAN2_THRESHOLD_OFF 44 -#define FAN2_THRESHOLD_ON 48 -#define FAN2_PWM 0x94 +#define FAN2_THRESHOLD_OFF 55 +#define FAN2_THRESHOLD_ON 67 +#define FAN2_PWM 0x84 /* Fan is at HIGH speed */ -#define FAN1_THRESHOLD_OFF 53 -#define FAN1_THRESHOLD_ON 58 -#define FAN1_PWM 0xb5 +#define FAN1_THRESHOLD_OFF 67 +#define FAN1_THRESHOLD_ON 75 +#define FAN1_PWM 0xa5 /* Fan is at FULL speed */ -#define FAN0_THRESHOLD_OFF 65 -#define FAN0_THRESHOLD_ON 70 +#define FAN0_THRESHOLD_OFF 85 +#define FAN0_THRESHOLD_ON 90 #define FAN0_PWM 0xc4 /* Temperature which OS will shutdown at */ diff --git a/src/mainboard/google/beltino/variants/monroe/include/variant/thermal.h b/src/mainboard/google/beltino/variants/monroe/include/variant/thermal.h index c2a2ef09b87..edde804e3b0 100644 --- a/src/mainboard/google/beltino/variants/monroe/include/variant/thermal.h +++ b/src/mainboard/google/beltino/variants/monroe/include/variant/thermal.h @@ -3,30 +3,28 @@ #ifndef THERMAL_H #define THERMAL_H -/* Fan is OFF */ -#define FAN4_THRESHOLD_OFF 0 -#define FAN4_THRESHOLD_ON 0 -#define FAN4_PWM 0x00 +/* Fan is at default speed */ +#define FAN4_PWM 0x47 /* Fan is at LOW speed */ -#define FAN3_THRESHOLD_OFF 45 -#define FAN3_THRESHOLD_ON 58 -#define FAN3_PWM 0x40 +#define FAN3_THRESHOLD_OFF 40 +#define FAN3_THRESHOLD_ON 50 +#define FAN3_PWM 0x68 /* Fan is at MEDIUM speed */ -#define FAN2_THRESHOLD_OFF 52 -#define FAN2_THRESHOLD_ON 64 -#define FAN2_PWM 0x80 +#define FAN2_THRESHOLD_OFF 55 +#define FAN2_THRESHOLD_ON 67 +#define FAN2_PWM 0x84 /* Fan is at HIGH speed */ -#define FAN1_THRESHOLD_OFF 59 -#define FAN1_THRESHOLD_ON 68 -#define FAN1_PWM 0xb3 +#define FAN1_THRESHOLD_OFF 67 +#define FAN1_THRESHOLD_ON 75 +#define FAN1_PWM 0xa3 /* Fan is at FULL speed */ -#define FAN0_THRESHOLD_OFF 66 -#define FAN0_THRESHOLD_ON 79 -#define FAN0_PWM 0xff +#define FAN0_THRESHOLD_OFF 85 +#define FAN0_THRESHOLD_ON 90 +#define FAN0_PWM 0xc4 /* Temperature which OS will shutdown at */ #define CRITICAL_TEMPERATURE 98 diff --git a/src/mainboard/google/beltino/variants/panther/include/variant/thermal.h b/src/mainboard/google/beltino/variants/panther/include/variant/thermal.h index 27c6c337568..e953fd62ffc 100644 --- a/src/mainboard/google/beltino/variants/panther/include/variant/thermal.h +++ b/src/mainboard/google/beltino/variants/panther/include/variant/thermal.h @@ -3,10 +3,8 @@ #ifndef THERMAL_H #define THERMAL_H -/* Fan is OFF */ -#define FAN4_THRESHOLD_OFF 0 -#define FAN4_THRESHOLD_ON 0 -#define FAN4_PWM 0x00 +/* Fan is at default speed */ +#define FAN4_PWM 0x47 /* Fan is at LOW speed */ #define FAN3_THRESHOLD_OFF 40 @@ -14,19 +12,19 @@ #define FAN3_PWM 0x6b /* Fan is at MEDIUM speed */ -#define FAN2_THRESHOLD_OFF 75 -#define FAN2_THRESHOLD_ON 83 -#define FAN2_PWM 0xcc +#define FAN2_THRESHOLD_OFF 55 +#define FAN2_THRESHOLD_ON 67 +#define FAN2_PWM 0x86 /* Fan is at HIGH speed */ -#define FAN1_THRESHOLD_OFF 86 -#define FAN1_THRESHOLD_ON 90 -#define FAN1_PWM 0xe5 +#define FAN1_THRESHOLD_OFF 67 +#define FAN1_THRESHOLD_ON 75 +#define FAN1_PWM 0xa8 /* Fan is at FULL speed */ -#define FAN0_THRESHOLD_OFF 93 -#define FAN0_THRESHOLD_ON 96 -#define FAN0_PWM 0xff +#define FAN0_THRESHOLD_OFF 85 +#define FAN0_THRESHOLD_ON 90 +#define FAN0_PWM 0xdc /* Temperature which OS will shutdown at */ #define CRITICAL_TEMPERATURE 100 diff --git a/src/mainboard/google/beltino/variants/tricky/include/variant/thermal.h b/src/mainboard/google/beltino/variants/tricky/include/variant/thermal.h index 68db6b89e6e..1ca26b0df38 100644 --- a/src/mainboard/google/beltino/variants/tricky/include/variant/thermal.h +++ b/src/mainboard/google/beltino/variants/tricky/include/variant/thermal.h @@ -3,29 +3,27 @@ #ifndef THERMAL_H #define THERMAL_H -/* Fan is OFF */ -#define FAN4_THRESHOLD_OFF 0 -#define FAN4_THRESHOLD_ON 0 -#define FAN4_PWM 0x00 +/* Fan is at default speed */ +#define FAN4_PWM 0x47 /* Fan is at LOW speed */ #define FAN3_THRESHOLD_OFF 50 -#define FAN3_THRESHOLD_ON 55 -#define FAN3_PWM 0x76 +#define FAN3_THRESHOLD_ON 60 +#define FAN3_PWM 0x62 /* Fan is at MEDIUM speed */ -#define FAN2_THRESHOLD_OFF 59 -#define FAN2_THRESHOLD_ON 65 -#define FAN2_PWM 0x98 +#define FAN2_THRESHOLD_OFF 65 +#define FAN2_THRESHOLD_ON 77 +#define FAN2_PWM 0x86 /* Fan is at HIGH speed */ -#define FAN1_THRESHOLD_OFF 68 -#define FAN1_THRESHOLD_ON 75 -#define FAN1_PWM 0xbf +#define FAN1_THRESHOLD_OFF 77 +#define FAN1_THRESHOLD_ON 85 +#define FAN1_PWM 0xa8 /* Fan is at FULL speed */ -#define FAN0_THRESHOLD_OFF 80 -#define FAN0_THRESHOLD_ON 86 +#define FAN0_THRESHOLD_OFF 85 +#define FAN0_THRESHOLD_ON 90 #define FAN0_PWM 0xdc /* Temperature which OS will shutdown at */ diff --git a/src/mainboard/google/beltino/variants/zako/include/variant/thermal.h b/src/mainboard/google/beltino/variants/zako/include/variant/thermal.h index 5006b649832..1d9f021ff14 100644 --- a/src/mainboard/google/beltino/variants/zako/include/variant/thermal.h +++ b/src/mainboard/google/beltino/variants/zako/include/variant/thermal.h @@ -3,30 +3,28 @@ #ifndef THERMAL_H #define THERMAL_H -/* Fan is OFF */ -#define FAN4_THRESHOLD_OFF 0 -#define FAN4_THRESHOLD_ON 0 -#define FAN4_PWM 0x4c +/* Fan is at default speed */ +#define FAN4_PWM 0x47 /* Fan is at LOW speed */ -#define FAN3_THRESHOLD_OFF 48 -#define FAN3_THRESHOLD_ON 52 +#define FAN3_THRESHOLD_OFF 40 +#define FAN3_THRESHOLD_ON 50 #define FAN3_PWM 0x6d /* Fan is at MEDIUM speed */ -#define FAN2_THRESHOLD_OFF 50 -#define FAN2_THRESHOLD_ON 55 +#define FAN2_THRESHOLD_OFF 55 +#define FAN2_THRESHOLD_ON 67 #define FAN2_PWM 0x7c /* Fan is at HIGH speed */ -#define FAN1_THRESHOLD_OFF 52 -#define FAN1_THRESHOLD_ON 58 +#define FAN1_THRESHOLD_OFF 67 +#define FAN1_THRESHOLD_ON 75 #define FAN1_PWM 0xa3 /* Fan is at FULL speed */ -#define FAN0_THRESHOLD_OFF 55 -#define FAN0_THRESHOLD_ON 60 -#define FAN0_PWM 0xba +#define FAN0_THRESHOLD_OFF 85 +#define FAN0_THRESHOLD_ON 90 +#define FAN0_PWM 0xdc /* Temperature which OS will shutdown at */ #define CRITICAL_TEMPERATURE 98 From 246b8e71d009c41f51f02b85683e23314f93acc5 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Nicol=C3=B2=20Veronese?= Date: Fri, 18 Jan 2019 17:38:06 +0100 Subject: [PATCH 025/137] mb/google/slippy: Enable LTE PCIe on NGFF socket and SIM USB MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The Acer C720(P) has been designed to have a LTE modem on a NGFF connector. Unfortunately the final revision of this chromebook doesn't have the connector populated, for this reason on coreboot this functionality is not present. Adding back this feature is not easy, but not impossible. This is a first path to: - Enable the USB port on the SIM tray. (USB #5) - Enable the PCIE_2 to provide a full working M.2 connector. The NGFF connector have the following features: - USB 2.0 - UIM - PCIE 1x On the mainboard there are a few component that are not populated some of those can be easily soldered (Like the NGFF connector) others can be added as daughter board. Most of the work must be done on the Power Gate. Like bypass capacitors. Looks like that all the 10K pullups and 0Ohm links are present in the board. The SIM tray socket is not populated, the part no. is unknown for that reason I have made a custom board with all the required components. This NGFF may be used to add more storage to the chromebook. Change-Id: I9c8392cc1ac7b78ba6f41b04f9457f1580f5aacd Signed-off-by: Nicolò Veronese --- .../google/slippy/variants/peppy/gpio.c | 2 +- .../variants/peppy/include/variant/acpi/usb.asl | 17 +++++++++++++++++ .../slippy/variants/peppy/overridetree.cb | 2 ++ .../google/slippy/variants/peppy/romstage.c | 4 ++-- 4 files changed, 22 insertions(+), 3 deletions(-) diff --git a/src/mainboard/google/slippy/variants/peppy/gpio.c b/src/mainboard/google/slippy/variants/peppy/gpio.c index 2ed92cdb81c..e50e6cd56ad 100644 --- a/src/mainboard/google/slippy/variants/peppy/gpio.c +++ b/src/mainboard/google/slippy/variants/peppy/gpio.c @@ -22,7 +22,7 @@ const struct pch_lp_gpio_map mainboard_lp_gpio_map[] = { LP_GPIO_UNUSED, /* 16: UNUSED */ LP_GPIO_UNUSED, /* 17: UNUSED */ LP_GPIO_NATIVE, /* 18: PCIE_CLKREQ_WLAN# */ - LP_GPIO_UNUSED, /* 19: UNUSED */ + LP_GPIO_NATIVE, /* 19: PCIE_CLKREQ_LTE# */ LP_GPIO_UNUSED, /* 20: UNUSED */ LP_GPIO_UNUSED, /* 21: UNUSED */ LP_GPIO_UNUSED, /* 22: UNUSED */ diff --git a/src/mainboard/google/slippy/variants/peppy/include/variant/acpi/usb.asl b/src/mainboard/google/slippy/variants/peppy/include/variant/acpi/usb.asl index 4f312fa3ca3..ef4263037c6 100644 --- a/src/mainboard/google/slippy/variants/peppy/include/variant/acpi/usb.asl +++ b/src/mainboard/google/slippy/variants/peppy/include/variant/acpi/usb.asl @@ -85,6 +85,23 @@ Scope (\_SB.PCI0.XHCI.HUB7.PRT5) Return (GPLD (1)) } } +Scope (\_SB.PCI0.XHCI.HUB7.PRT6) +{ + // SIM USB 2.0 Slot + Name (_UPC, Package (0x04) + { + 0xFF, // Connectable + 0xFF, // OEM Connector + Zero, // Reserved + Zero // Reserved + }) + + // Visible + Method (_PLD, 0, NotSerialized) + { + Return (GPLD (One)) + } +} Scope (\_SB.PCI0.XHCI.HUB7.PRT7) { // SD Card diff --git a/src/mainboard/google/slippy/variants/peppy/overridetree.cb b/src/mainboard/google/slippy/variants/peppy/overridetree.cb index bb30f763f3a..75a70ee5cdb 100644 --- a/src/mainboard/google/slippy/variants/peppy/overridetree.cb +++ b/src/mainboard/google/slippy/variants/peppy/overridetree.cb @@ -23,6 +23,8 @@ chip northbridge/intel/haswell # Disable PCIe CLKOUT 2-5 and CLKOUT_XDP register "icc_clock_disable" = "0x013c0000" end + + device pci 1c.1 on end # PCIe Port #2 end end end diff --git a/src/mainboard/google/slippy/variants/peppy/romstage.c b/src/mainboard/google/slippy/variants/peppy/romstage.c index 32fdd97e947..2347690baba 100644 --- a/src/mainboard/google/slippy/variants/peppy/romstage.c +++ b/src/mainboard/google/slippy/variants/peppy/romstage.c @@ -43,8 +43,8 @@ const struct usb2_port_config mainboard_usb2_ports[MAX_USB2_PORTS] = { USB_PORT_MINI_PCIE }, { 0x0040, 1, 2, /* P4: Port B, CN6 */ USB_PORT_BACK_PANEL }, - { 0x0000, 0, USB_OC_PIN_SKIP, /* P5: EMPTY */ - USB_PORT_SKIP }, + { 0x0000, 1, USB_OC_PIN_SKIP, /* P5: SIM */ + USB_PORT_INTERNAL }, { 0x0150, 1, USB_OC_PIN_SKIP, /* P6: SD Card */ USB_PORT_FLEX }, { 0x0000, 0, USB_OC_PIN_SKIP, /* P7: EMPTY */ From fbeec58f3fe4e829adf7b9f63b1b5a7040db58ef Mon Sep 17 00:00:00 2001 From: Matt DeVillier Date: Mon, 23 Dec 2019 15:15:51 -0600 Subject: [PATCH 026/137] mb/google/peppy: Add ACPI for ambient light sensor Change-Id: Ie33c0635f4ab983f9831fd8a064f13db75f890cb Signed-off-by: Matt DeVillier --- .../peppy/include/variant/acpi/mainboard.asl | 29 +++++++++++++++++++ 1 file changed, 29 insertions(+) diff --git a/src/mainboard/google/slippy/variants/peppy/include/variant/acpi/mainboard.asl b/src/mainboard/google/slippy/variants/peppy/include/variant/acpi/mainboard.asl index a96ec197dd0..e22087424bc 100644 --- a/src/mainboard/google/slippy/variants/peppy/include/variant/acpi/mainboard.asl +++ b/src/mainboard/google/slippy/variants/peppy/include/variant/acpi/mainboard.asl @@ -142,4 +142,33 @@ Scope (\_SB.PCI0.I2C1) } } } + + Device (ALSI) + { + Name (_HID, "ISL29018") + Name (_DDN, "Intersil 29018 Ambient Light Sensor") + Name (_UID, 6) + Name (_CRS, ResourceTemplate() + { + I2cSerialBus ( + 0x44, // SlaveAddress + ControllerInitiated, // SlaveMode + 400000, // ConnectionSpeed + AddressingMode7Bit, // AddressingMode + "\\_SB.I2C1", // ResourceSource + ) + Interrupt (ResourceConsumer, Edge, ActiveLow) + { + BOARD_LIGHTSENSOR_IRQ + } + }) + Method (_STA) + { + If (LEqual (\S2EN, 1)) { + Return (0xF) + } Else { + Return (0x0) + } + } + } } From 4b3f097724ac24bd9dc222a61d9109f5c549f3db Mon Sep 17 00:00:00 2001 From: CoolStar Date: Fri, 15 Jul 2016 13:30:19 -0700 Subject: [PATCH 027/137] soc/intel/broadwell: don't hide ME PCI device from OS Change-Id: Idc74df3574aa8b1e6cc089e17f5502e5ba79ba6c --- src/soc/intel/broadwell/pch/Kconfig | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/soc/intel/broadwell/pch/Kconfig b/src/soc/intel/broadwell/pch/Kconfig index 5a80d32191f..ac3af30274c 100644 --- a/src/soc/intel/broadwell/pch/Kconfig +++ b/src/soc/intel/broadwell/pch/Kconfig @@ -69,7 +69,7 @@ config CONSOLE_UART_BASE_ADDRESS config DISABLE_ME_PCI bool "Disable Intel ME PCI interface (MEI1)" - default y + default n help Disable and hide the ME PCI interface during finalize stage of boot. This will prevent the OS (and userspace apps) from interacting with From 5b71385145491f4c0e4e0b445cc7ff76c936f4ba Mon Sep 17 00:00:00 2001 From: ReddestDream Date: Wed, 19 Apr 2017 02:13:54 -0400 Subject: [PATCH 028/137] google/auron,slippy: Don't enable EC serial port the EC Serial port on auron and slippy is non-functional, so prevent it from being visible to the OS. Signed-off-by: Matt DeVillier --- src/mainboard/google/auron/acpi/superio.asl | 1 - src/mainboard/google/slippy/acpi/superio.asl | 1 - 2 files changed, 2 deletions(-) diff --git a/src/mainboard/google/auron/acpi/superio.asl b/src/mainboard/google/auron/acpi/superio.asl index e3a31bc657b..42eaba1825c 100644 --- a/src/mainboard/google/auron/acpi/superio.asl +++ b/src/mainboard/google/auron/acpi/superio.asl @@ -6,7 +6,6 @@ #define SIO_EC_MEMMAP_ENABLE // EC Memory Map Resources #define SIO_EC_HOST_ENABLE // EC Host Interface Resources #define SIO_EC_ENABLE_PS2K // Enable PS/2 Keyboard -#define SIO_EC_ENABLE_COM1 // Enable Serial Port 1 /* ACPI code for EC SuperIO functions */ #include diff --git a/src/mainboard/google/slippy/acpi/superio.asl b/src/mainboard/google/slippy/acpi/superio.asl index 587bb8bf0ff..4a1456bb0ed 100644 --- a/src/mainboard/google/slippy/acpi/superio.asl +++ b/src/mainboard/google/slippy/acpi/superio.asl @@ -6,7 +6,6 @@ #define SIO_EC_MEMMAP_ENABLE // EC Memory Map Resources #define SIO_EC_HOST_ENABLE // EC Host Interface Resources #define SIO_EC_ENABLE_PS2K // Enable PS/2 Keyboard -#define SIO_EC_ENABLE_COM1 // Enable Serial Port 1 /* ACPI code for EC SuperIO functions */ #include From 7bcc17b2a7fac2964cac753bb866c39f0cce5c24 Mon Sep 17 00:00:00 2001 From: Matt DeVillier Date: Wed, 23 Nov 2016 22:41:08 -0600 Subject: [PATCH 029/137] guado/rikku: tweak fan speeds/thresholds Change-Id: If14d8f6a8d6069ce5aaf385d7963ec99f545cd1f Signed-off-by: Matt DeVillier --- .../variants/guado/include/variant/thermal.h | 16 ++++++------- .../variants/rikku/include/variant/thermal.h | 24 +++++++++---------- 2 files changed, 20 insertions(+), 20 deletions(-) diff --git a/src/mainboard/google/jecht/variants/guado/include/variant/thermal.h b/src/mainboard/google/jecht/variants/guado/include/variant/thermal.h index 7dc48369824..7a988946637 100644 --- a/src/mainboard/google/jecht/variants/guado/include/variant/thermal.h +++ b/src/mainboard/google/jecht/variants/guado/include/variant/thermal.h @@ -11,22 +11,22 @@ /* Fan is at LOW speed */ #define FAN3_THRESHOLD_OFF 40 #define FAN3_THRESHOLD_ON 50 -#define FAN3_PWM 0x55 +#define FAN3_PWM 0x62 /* Fan is at MEDIUM speed */ #define FAN2_THRESHOLD_OFF 55 #define FAN2_THRESHOLD_ON 67 -#define FAN2_PWM 0xa6 +#define FAN2_PWM 0x86 /* Fan is at HIGH speed */ -#define FAN1_THRESHOLD_OFF 65 -#define FAN1_THRESHOLD_ON 70 -#define FAN1_PWM 0xc0 +#define FAN1_THRESHOLD_OFF 67 +#define FAN1_THRESHOLD_ON 75 +#define FAN1_PWM 0xa8 /* Fan is at FULL speed */ -#define FAN0_THRESHOLD_OFF 90 -#define FAN0_THRESHOLD_ON 100 -#define FAN0_PWM 0xff +#define FAN0_THRESHOLD_OFF 85 +#define FAN0_THRESHOLD_ON 90 +#define FAN0_PWM 0xdc /* Temperature which OS will shutdown at */ #define CRITICAL_TEMPERATURE 104 diff --git a/src/mainboard/google/jecht/variants/rikku/include/variant/thermal.h b/src/mainboard/google/jecht/variants/rikku/include/variant/thermal.h index 58ca2f6d98d..bc46ae39b30 100644 --- a/src/mainboard/google/jecht/variants/rikku/include/variant/thermal.h +++ b/src/mainboard/google/jecht/variants/rikku/include/variant/thermal.h @@ -9,24 +9,24 @@ #define FAN4_PWM 0x4d /* Fan is at LOW speed */ -#define FAN3_THRESHOLD_OFF 42 -#define FAN3_THRESHOLD_ON 47 -#define FAN3_PWM 0xa5 +#define FAN3_THRESHOLD_OFF 40 +#define FAN3_THRESHOLD_ON 50 +#define FAN3_PWM 0x62 /* Fan is at MEDIUM speed */ -#define FAN2_THRESHOLD_OFF 54 -#define FAN2_THRESHOLD_ON 59 -#define FAN2_PWM 0xb2 +#define FAN2_THRESHOLD_OFF 55 +#define FAN2_THRESHOLD_ON 67 +#define FAN2_PWM 0x86 /* Fan is at HIGH speed */ -#define FAN1_THRESHOLD_OFF 66 -#define FAN1_THRESHOLD_ON 71 -#define FAN1_PWM 0xc9 +#define FAN1_THRESHOLD_OFF 67 +#define FAN1_THRESHOLD_ON 75 +#define FAN1_PWM 0xa8 /* Fan is at FULL speed */ -#define FAN0_THRESHOLD_OFF 78 -#define FAN0_THRESHOLD_ON 83 -#define FAN0_PWM 0xd8 +#define FAN0_THRESHOLD_OFF 85 +#define FAN0_THRESHOLD_ON 90 +#define FAN0_PWM 0xdc /* Temperature which OS will shutdown at */ #define CRITICAL_TEMPERATURE 100 From 3ff82b295d703cd87909e0a8ffd4c46da08cd292 Mon Sep 17 00:00:00 2001 From: Matt DeVillier Date: Sun, 19 Nov 2017 17:38:49 -0600 Subject: [PATCH 030/137] hsw/bdw/byt/bsw: use common SMI handler for S4/S5 Signed-off-by: Matt DeVillier --- src/soc/intel/baytrail/smihandler.c | 6 +++--- src/soc/intel/braswell/smihandler.c | 6 +++--- src/soc/intel/broadwell/pch/smihandler.c | 6 +++--- src/southbridge/intel/lynxpoint/smihandler.c | 6 +++--- 4 files changed, 12 insertions(+), 12 deletions(-) diff --git a/src/soc/intel/baytrail/smihandler.c b/src/soc/intel/baytrail/smihandler.c index 9a478437fda..3fff862c5a2 100644 --- a/src/soc/intel/baytrail/smihandler.c +++ b/src/soc/intel/baytrail/smihandler.c @@ -95,10 +95,10 @@ static void southbridge_smi_sleep(void) wbinvd(); break; case ACPI_S4: - printk(BIOS_DEBUG, "SMI#: Entering S4 (Suspend-To-Disk)\n"); - break; case ACPI_S5: - printk(BIOS_DEBUG, "SMI#: Entering S5 (Soft Power off)\n"); + printk(BIOS_DEBUG, (slp_typ == ACPI_S4) ? + "SMI#: Entering S4 (Suspend-To-Disk)\n" : + "SMI#: Entering S5 (Soft Power off)\n"); /* Disable all GPE */ disable_all_gpe(); diff --git a/src/soc/intel/braswell/smihandler.c b/src/soc/intel/braswell/smihandler.c index f34eb6448f2..394f042305e 100644 --- a/src/soc/intel/braswell/smihandler.c +++ b/src/soc/intel/braswell/smihandler.c @@ -119,10 +119,10 @@ static void southbridge_smi_sleep(void) wbinvd(); break; case ACPI_S4: - printk(BIOS_DEBUG, "SMI#: Entering S4 (Suspend-To-Disk)\n"); - break; case ACPI_S5: - printk(BIOS_DEBUG, "SMI#: Entering S5 (Soft Power off)\n"); + printk(BIOS_DEBUG, (slp_typ == ACPI_S4) ? + "SMI#: Entering S4 (Suspend-To-Disk)\n" : + "SMI#: Entering S5 (Soft Power off)\n"); /* Disable all GPE */ disable_all_gpe(); diff --git a/src/soc/intel/broadwell/pch/smihandler.c b/src/soc/intel/broadwell/pch/smihandler.c index 14d08af7af8..5dcaad6dc7b 100644 --- a/src/soc/intel/broadwell/pch/smihandler.c +++ b/src/soc/intel/broadwell/pch/smihandler.c @@ -167,10 +167,10 @@ static void southbridge_smi_sleep(void) wbinvd(); break; case ACPI_S4: - printk(BIOS_DEBUG, "SMI#: Entering S4 (Suspend-To-Disk)\n"); - break; case ACPI_S5: - printk(BIOS_DEBUG, "SMI#: Entering S5 (Soft Power off)\n"); + printk(BIOS_DEBUG, (slp_typ == ACPI_S4) ? + "SMI#: Entering S4 (Suspend-To-Disk)\n" : + "SMI#: Entering S5 (Soft Power off)\n"); /* Turn off backlight if needed */ backlight_off(); diff --git a/src/southbridge/intel/lynxpoint/smihandler.c b/src/southbridge/intel/lynxpoint/smihandler.c index 8caafb716fd..1b05a49396a 100644 --- a/src/southbridge/intel/lynxpoint/smihandler.c +++ b/src/southbridge/intel/lynxpoint/smihandler.c @@ -119,10 +119,10 @@ static void southbridge_smi_sleep(void) wbinvd(); break; case ACPI_S4: - printk(BIOS_DEBUG, "SMI#: Entering S4 (Suspend-To-Disk)\n"); - break; case ACPI_S5: - printk(BIOS_DEBUG, "SMI#: Entering S5 (Soft Power off)\n"); + printk(BIOS_DEBUG, (slp_typ == ACPI_S4) ? + "SMI#: Entering S4 (Suspend-To-Disk)\n" : + "SMI#: Entering S5 (Soft Power off)\n"); /* Disable all GPE */ disable_all_gpe(); From f3bb1573ad86a8ca586f1612d6c75b72cfbcaf06 Mon Sep 17 00:00:00 2001 From: Matt DeVillier Date: Mon, 19 Sep 2016 16:59:49 -0500 Subject: [PATCH 031/137] google/*: set wake events for S4/hibernate Ensure S5 wake events active for S4, ensure USB ports powered down Signed-off-by: Matt DeVillier --- src/mainboard/google/auron/smihandler.c | 1 + src/mainboard/google/cyan/smihandler.c | 1 + src/mainboard/google/jecht/smihandler.c | 1 + src/mainboard/google/link/smihandler.c | 1 + src/mainboard/google/rambi/smihandler.c | 1 + 5 files changed, 5 insertions(+) diff --git a/src/mainboard/google/auron/smihandler.c b/src/mainboard/google/auron/smihandler.c index 6fa95e8dff3..cc10d97a007 100644 --- a/src/mainboard/google/auron/smihandler.c +++ b/src/mainboard/google/auron/smihandler.c @@ -77,6 +77,7 @@ void mainboard_smi_sleep(u8 slp_typ) /* Enable wake events */ google_chromeec_set_wake_mask(MAINBOARD_EC_S3_WAKE_EVENTS); break; + case ACPI_S4: case ACPI_S5: if (gnvs->s5u0 == 0) { google_chromeec_set_usb_charge_mode( diff --git a/src/mainboard/google/cyan/smihandler.c b/src/mainboard/google/cyan/smihandler.c index 7394b78b68c..18d5f91cbd0 100644 --- a/src/mainboard/google/cyan/smihandler.c +++ b/src/mainboard/google/cyan/smihandler.c @@ -76,6 +76,7 @@ void mainboard_smi_sleep(uint8_t slp_typ) /* Enable wake pin in GPE block. */ enable_gpe(WAKE_GPIO_EN); break; + case ACPI_S4: case ACPI_S5: if (gnvs->s5u0 == 0) google_chromeec_set_usb_charge_mode( diff --git a/src/mainboard/google/jecht/smihandler.c b/src/mainboard/google/jecht/smihandler.c index a4feeb496a1..7ee0f34e6c8 100644 --- a/src/mainboard/google/jecht/smihandler.c +++ b/src/mainboard/google/jecht/smihandler.c @@ -26,6 +26,7 @@ void mainboard_smi_sleep(u8 slp_typ) set_gpio(GPIO_USB_CTL_1, 0); } break; + case ACPI_S4: case ACPI_S5: set_power_led(LED_OFF); break; diff --git a/src/mainboard/google/link/smihandler.c b/src/mainboard/google/link/smihandler.c index 2f42b7da181..3ed68b6e2e8 100644 --- a/src/mainboard/google/link/smihandler.c +++ b/src/mainboard/google/link/smihandler.c @@ -54,6 +54,7 @@ void mainboard_smi_sleep(u8 slp_typ) google_chromeec_set_usb_charge_mode( 1, USB_CHARGE_MODE_DISABLED); break; + case ACPI_S4: case ACPI_S5: if (gnvs->s5u0 == 0) google_chromeec_set_usb_charge_mode( diff --git a/src/mainboard/google/rambi/smihandler.c b/src/mainboard/google/rambi/smihandler.c index 358a92f9679..5d73df939a0 100644 --- a/src/mainboard/google/rambi/smihandler.c +++ b/src/mainboard/google/rambi/smihandler.c @@ -66,6 +66,7 @@ void mainboard_smi_sleep(uint8_t slp_typ) /* Enable wake pin in GPE block. */ enable_gpe(WAKE_GPIO_EN); break; + case ACPI_S4: case ACPI_S5: if (gnvs->s5u0 == 0) google_chromeec_set_usb_charge_mode( From 97ec304b7af4bd1d4f15af670d36fc5d5830b435 Mon Sep 17 00:00:00 2001 From: Matt DeVillier Date: Sat, 17 Jun 2017 18:02:04 -0500 Subject: [PATCH 032/137] string.h: add macro to convert 8-bit to 16-bit Signed-off-by: Matt DeVillier --- src/include/string.h | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/src/include/string.h b/src/include/string.h index 92ea5e5f7f7..21c8fdf5765 100644 --- a/src/include/string.h +++ b/src/include/string.h @@ -7,6 +7,10 @@ #include #include /* IWYU pragma: export */ +/* Convert 8-bit char to 16-bit */ +#define STR16_(str) (u ## str) +#define STR16(str) STR16_(str) + void *memcpy(void *dest, const void *src, size_t n); void *memmove(void *dest, const void *src, size_t n); void *memset(void *s, int c, size_t n); From 5ad809f9eb0226a81bcf33498af7a0727d18d55a Mon Sep 17 00:00:00 2001 From: Matt DeVillier Date: Mon, 10 Jul 2017 16:47:44 -0500 Subject: [PATCH 033/137] src/device: add Kconfig option for GOP driver Add Kconfig option to specify GOP driver version for injection into OpRegion ACPI header when VBT data file used. Change-Id: Ic469a17c7710d6bfac4ae5ed0cf1a182201bc937 Signed-off-by: Matt DeVillier --- src/device/Kconfig | 22 ++++++++++++++++++++++ 1 file changed, 22 insertions(+) diff --git a/src/device/Kconfig b/src/device/Kconfig index fdedf46100d..56e7eb07b85 100644 --- a/src/device/Kconfig +++ b/src/device/Kconfig @@ -964,6 +964,28 @@ config INTEL_GMA_VBT_FILE help The path and filename of the VBT binary. +config SET_GOP_DRIVER_VERSION + bool "Set the GOP Driver version" + depends on INTEL_GMA_ADD_VBT + default y if INTEL_GMA_ADD_VBT + help + Inject the GOP driver version into the OpRegion ACPI table. + +config GOP_DRIVER_VERSION + string "GOP Driver version" + depends on SET_GOP_DRIVER_VERSION + default "2.0.1024" if NORTHBRIDGE_INTEL_SANDYBRIDGE + default "5.5.1034" if NORTHBRIDGE_INTEL_HASWELL || SOC_INTEL_BROADWELL + default "7.2.1013" if SOC_INTEL_BAYTRAIL + default "8.0.1041" if SOC_INTEL_BRASWELL + default "9.0.1080" if SOC_INTEL_SKYLAKE || SOC_INTEL_KABYLAKE + default "9.0.1107" if SOC_INTEL_COMETLAKE || SOC_INTEL_WHISKEYLAKE + default "13.0.1018" if SOC_INTEL_GEMINILAKE + default "10.0.1037" if SOC_INTEL_APOLLOLAKE + default "17.0.1064" if SOC_INTEL_TIGERLAKE + help + Must be in the format X.Y.ZZZZ + config SOFTWARE_I2C bool "Enable I2C controller emulation in software" default n From 39eaee3a4135f490a5e5fd6f9a94a5e2c6f52cf4 Mon Sep 17 00:00:00 2001 From: Matt DeVillier Date: Sat, 15 Oct 2016 20:03:47 -0500 Subject: [PATCH 034/137] drivers/intel/gma: prevent Linux from using broken ACPI backlight By default, linux prioritizes the ACPI backlight controls over the Intel driver ones, which causes them to be non-functional on HSW/BDW/BYT devices. This patch strips out just enough so that Linux will use the functional driver controls, while not breaking Windows and OS X functionality Change-Id: I1702aef6b7a196fd755ce9b4c08d0a772ac5d12c Signed-off-by: Matt DeVillier --- src/drivers/intel/gma/acpi.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/src/drivers/intel/gma/acpi.c b/src/drivers/intel/gma/acpi.c index b2086864555..ba81cfec7f4 100644 --- a/src/drivers/intel/gma/acpi.c +++ b/src/drivers/intel/gma/acpi.c @@ -67,7 +67,7 @@ drivers_intel_gma_displays_ssdt_generate(const struct i915_gpu_controller_info * acpigen_emit_byte(RETURN_OP); acpigen_emit_namestring("^^XBCL"); acpigen_pop_len(); - +#if CONFIG(NORTHBRIDGE_INTEL_SANDYBRIDGE) /* Method (_BCM, 1, NotSerialized) { @@ -78,7 +78,7 @@ drivers_intel_gma_displays_ssdt_generate(const struct i915_gpu_controller_info * acpigen_emit_namestring("^^XBCM"); acpigen_emit_byte(ARG0_OP); acpigen_pop_len(); - +#endif /* Method (_BQC, 0, NotSerialized) { From 7de01eeda55c2fa43b0a88f62cf5c7b0a6977268 Mon Sep 17 00:00:00 2001 From: Matt DeVillier Date: Wed, 14 Mar 2018 12:07:40 -0500 Subject: [PATCH 035/137] drivers/intel/gma: Inject GOP driver version into OpRegion ACPI If a GOP driver version is specified, inject that into the OpRegion ACPI DVER (GOP version) field. Change-Id: Ica031f79cb884c0b54e0acca6633694dbfd38311 Signed-off-by: Matt DeVillier --- src/drivers/intel/gma/opregion.c | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/src/drivers/intel/gma/opregion.c b/src/drivers/intel/gma/opregion.c index fe333fa6742..f18cf10983d 100644 --- a/src/drivers/intel/gma/opregion.c +++ b/src/drivers/intel/gma/opregion.c @@ -350,6 +350,12 @@ enum cb_err intel_gma_init_igd_opregion(void) /* Get the opregion version information */ opregion->header.opver = opregion_get_version(); +#if CONFIG(SET_GOP_DRIVER_VERSION) + /* Inject GOP driver version */ + memcpy(opregion->header.dver, STR16(CONFIG_GOP_DRIVER_VERSION), + 2 * strlen(CONFIG_GOP_DRIVER_VERSION)); + +#endif /* Extended VBT support */ if (is_ext_vbt_required(opregion, vbt)) { /* Place extended VBT just after opregion */ From 4bcf0769d16e4988ebf91a4179bb9b25fdb7557a Mon Sep 17 00:00:00 2001 From: Matt DeVillier Date: Mon, 19 Jun 2017 22:52:52 -0500 Subject: [PATCH 036/137] drivers/intel/gma: Set header pcon value Windows drivers require this to be set Change-Id: I80b12f4dcd91529cc8fa3ff780cd13ac7a8045e4 Signed-off-by: Matt DeVillier --- src/drivers/intel/gma/opregion.c | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/src/drivers/intel/gma/opregion.c b/src/drivers/intel/gma/opregion.c index f18cf10983d..ed7bea6f5ca 100644 --- a/src/drivers/intel/gma/opregion.c +++ b/src/drivers/intel/gma/opregion.c @@ -377,7 +377,10 @@ enum cb_err intel_gma_init_igd_opregion(void) // TODO Initialize Mailbox 1 opregion->mailbox1.clid = 1; - // TODO Initialize Mailbox 3 + //From Intel OpRegion reference doc + opregion->header.pcon = 279; + + // Initialize Mailbox 3 opregion->mailbox3.bclp = IGD_BACKLIGHT_BRIGHTNESS; opregion->mailbox3.pfit = IGD_FIELD_VALID | IGD_PFIT_STRETCH; opregion->mailbox3.pcft = 0; // should be (IMON << 1) & 0x3e From baa1ace05850b31cb4524cbd21b3b126d0bd9f71 Mon Sep 17 00:00:00 2001 From: Matt DeVillier Date: Mon, 10 Jul 2017 13:54:16 -0500 Subject: [PATCH 037/137] intel/opregion: kill use of IGD MBOX2 and SWSCI Change-Id: I8f7393111dd967eac94c86f77ea29f5081fcae0b Signed-off-by: Matt DeVillier --- src/drivers/intel/gma/opregion.h | 3 +-- src/northbridge/intel/haswell/gma.c | 16 ---------------- src/northbridge/intel/sandybridge/gma.c | 21 --------------------- 3 files changed, 1 insertion(+), 39 deletions(-) diff --git a/src/drivers/intel/gma/opregion.h b/src/drivers/intel/gma/opregion.h index 1dd177c2db6..69c31a69292 100644 --- a/src/drivers/intel/gma/opregion.h +++ b/src/drivers/intel/gma/opregion.h @@ -41,8 +41,7 @@ typedef struct { #define IGD_MBOX4 (1 << 3) #define IGD_MBOX5 (1 << 4) -#define MAILBOXES_MOBILE (IGD_MBOX1 | IGD_MBOX2 | IGD_MBOX3 | \ - IGD_MBOX4 | IGD_MBOX5) +#define MAILBOXES_MOBILE (IGD_MBOX1| IGD_MBOX3 | IGD_MBOX4 | IGD_MBOX5) #define MAILBOXES_DESKTOP (IGD_MBOX2 | IGD_MBOX4) #define SBIOS_VERSION_SIZE 32 diff --git a/src/northbridge/intel/haswell/gma.c b/src/northbridge/intel/haswell/gma.c index 6e6948b70f3..48a75ba15c2 100644 --- a/src/northbridge/intel/haswell/gma.c +++ b/src/northbridge/intel/haswell/gma.c @@ -400,20 +400,6 @@ static void gma_pm_init_post_vbios(struct device *dev) gtt_write(0x0a188, 0x00000001); } -/* Enable SCI to ACPI _GPE._L06 */ -static void gma_enable_swsci(void) -{ - u16 reg16; - - /* Clear DMISCI status */ - reg16 = inw(get_pmbase() + TCO1_STS); - reg16 &= DMISCI_STS; - outw(reg16, get_pmbase() + TCO1_STS); - - /* Clear and enable ACPI TCO SCI */ - enable_tco_sci(); -} - static void gma_func0_init(struct device *dev) { int lightup_ok = 0; @@ -450,8 +436,6 @@ static void gma_func0_init(struct device *dev) printk(BIOS_DEBUG, "GT Power Management Init (post VBIOS)\n"); gma_pm_init_post_vbios(dev); - - gma_enable_swsci(); } static void gma_generate_ssdt(const struct device *dev) diff --git a/src/northbridge/intel/sandybridge/gma.c b/src/northbridge/intel/sandybridge/gma.c index 3eed5cc9bc8..94be6985311 100644 --- a/src/northbridge/intel/sandybridge/gma.c +++ b/src/northbridge/intel/sandybridge/gma.c @@ -562,25 +562,6 @@ static void gma_pm_init_post_vbios(struct device *dev) } } -/* Enable SCI to ACPI _GPE._L06 */ -static void gma_enable_swsci(void) -{ - u16 reg16; - - /* Clear DMISCI status */ - reg16 = inw(DEFAULT_PMBASE + TCO1_STS); - reg16 &= DMISCI_STS; - outw(reg16, DEFAULT_PMBASE + TCO1_STS); - - /* Clear ACPI TCO status */ - outl(TCOSCI_STS, DEFAULT_PMBASE + GPE0_STS); - - /* Enable ACPI TCO SCIs */ - reg16 = inw(DEFAULT_PMBASE + GPE0_EN); - reg16 |= TCOSCI_EN; - outw(reg16, DEFAULT_PMBASE + GPE0_EN); -} - static void gma_func0_init(struct device *dev) { intel_gma_init_igd_opregion(); @@ -615,8 +596,6 @@ static void gma_func0_init(struct device *dev) gfx_set_init_done(1); } } - - gma_enable_swsci(); } static void gma_generate_ssdt(const struct device *device) From a54b42a746c6c1841b0ed64e795f97275bdf5bf9 Mon Sep 17 00:00:00 2001 From: Matt DeVillier Date: Tue, 3 Jan 2017 20:02:43 -0600 Subject: [PATCH 038/137] soc/baytrail: use SMM to toggle ACPI/PCI mode for eMMC Add one SMM method and modify an existing one to allow payload (Tianocore) to toggle the eMMC from ACPI mode to PCI mode in order to enable use as boot device, then back to ACPI mode before the OS loads Signed-off-by: Matt DeVillier --- src/include/cpu/x86/smm.h | 1 + src/soc/intel/baytrail/smihandler.c | 53 ++++++++++++++--------------- 2 files changed, 26 insertions(+), 28 deletions(-) diff --git a/src/include/cpu/x86/smm.h b/src/include/cpu/x86/smm.h index 79149675cc4..070a365b545 100644 --- a/src/include/cpu/x86/smm.h +++ b/src/include/cpu/x86/smm.h @@ -23,6 +23,7 @@ #define APM_CNT_ROUTE_ALL_XHCI 0xca #define APM_CNT_FINALIZE 0xcb #define APM_CNT_LEGACY 0xcc +#define APM_CNT_END_OF_DXE 0xcd #define APM_CNT_MBI_UPDATE 0xeb #define APM_CNT_SMMINFO 0xec #define APM_CNT_SMMSTORE 0xed diff --git a/src/soc/intel/baytrail/smihandler.c b/src/soc/intel/baytrail/smihandler.c index 3fff862c5a2..d5272b9ced2 100644 --- a/src/soc/intel/baytrail/smihandler.c +++ b/src/soc/intel/baytrail/smihandler.c @@ -204,14 +204,6 @@ static void soc_legacy(void) struct device_nvs *dev_nvs = acpi_get_device_nvs(); u32 reg32; - /* LPE Device */ - if (dev_nvs->lpe_en) { - reg32 = iosf_port58_read(LPE_PCICFGCTR1); - reg32 &= - ~(LPE_PCICFGCTR1_PCI_CFG_DIS | LPE_PCICFGCTR1_ACPI_INT_EN); - iosf_port58_write(LPE_PCICFGCTR1, reg32); - } - /* SCC Devices */ #define SCC_ACPI_MODE_DISABLE(name_) \ do { if (dev_nvs->scc_en[SCC_NVS_ ## name_]) { \ @@ -223,29 +215,30 @@ static void soc_legacy(void) SCC_ACPI_MODE_DISABLE(MMC); SCC_ACPI_MODE_DISABLE(SD); SCC_ACPI_MODE_DISABLE(SDIO); +} + +/* + * soc_end_of_dxe: A payload (Tianocore) has indicated that the + * UEFI payload is being loaded. Switch SCC devices that are + * in PCI mode to ACPI mode so that Windows will work. + * + */ +static void soc_end_of_dxe(void) +{ + struct device_nvs *dev_nvs = acpi_get_device_nvs(); + u32 reg32; - /* LPSS Devices */ -#define LPSS_ACPI_MODE_DISABLE(name_) \ - do { if (dev_nvs->lpss_en[LPSS_NVS_ ## name_]) { \ - reg32 = iosf_lpss_read(LPSS_ ## name_ ## _CTL); \ - reg32 &= ~LPSS_CTL_PCI_CFG_DIS | ~LPSS_CTL_ACPI_INT_EN; \ - iosf_lpss_write(LPSS_ ## name_ ## _CTL, reg32); \ + /* SCC Devices */ +#define SCC_ACPI_MODE_ENABLE(name_) \ + do { if (dev_nvs->scc_en[SCC_NVS_ ## name_]) { \ + reg32 = iosf_scc_read(SCC_ ## name_ ## _CTL); \ + reg32 |= (SCC_CTL_PCI_CFG_DIS | SCC_CTL_ACPI_INT_EN); \ + iosf_scc_write(SCC_ ## name_ ## _CTL, reg32); \ } } while (0) - LPSS_ACPI_MODE_DISABLE(SIO_DMA1); - LPSS_ACPI_MODE_DISABLE(I2C1); - LPSS_ACPI_MODE_DISABLE(I2C2); - LPSS_ACPI_MODE_DISABLE(I2C3); - LPSS_ACPI_MODE_DISABLE(I2C4); - LPSS_ACPI_MODE_DISABLE(I2C5); - LPSS_ACPI_MODE_DISABLE(I2C6); - LPSS_ACPI_MODE_DISABLE(I2C7); - LPSS_ACPI_MODE_DISABLE(SIO_DMA2); - LPSS_ACPI_MODE_DISABLE(PWM1); - LPSS_ACPI_MODE_DISABLE(PWM2); - LPSS_ACPI_MODE_DISABLE(HSUART1); - LPSS_ACPI_MODE_DISABLE(HSUART2); - LPSS_ACPI_MODE_DISABLE(SPI); + SCC_ACPI_MODE_ENABLE(MMC); + SCC_ACPI_MODE_ENABLE(SD); + SCC_ACPI_MODE_ENABLE(SDIO); } static void southbridge_smi_store(void) @@ -290,6 +283,10 @@ static void southbridge_smi_apmc(void) if (CONFIG(SMMSTORE)) southbridge_smi_store(); break; + case APM_CNT_END_OF_DXE: + soc_end_of_dxe(); + break; + } mainboard_smi_apmc(reg8); From 800b3603bb87d760e2b4af5556517e0cdb4e1200 Mon Sep 17 00:00:00 2001 From: Matt DeVillier Date: Wed, 29 Mar 2017 05:34:56 -0500 Subject: [PATCH 039/137] soc/baytrail: don't (really) put eMMC in ACPI mode Let Tianocore do the last steps of putting the eMMC into APCI mode, so that it can still be detected as a boot device. Signed-off-by: Matt DeVillier --- src/soc/intel/baytrail/scc.c | 12 ------------ 1 file changed, 12 deletions(-) diff --git a/src/soc/intel/baytrail/scc.c b/src/soc/intel/baytrail/scc.c index 8892b531f98..9da82aafd6b 100644 --- a/src/soc/intel/baytrail/scc.c +++ b/src/soc/intel/baytrail/scc.c @@ -70,15 +70,6 @@ void baytrail_init_scc(void) void scc_enable_acpi_mode(struct device *dev, int iosf_reg, int nvs_index) { - struct reg_script ops[] = { - /* Disable PCI interrupt, enable Memory and Bus Master */ - REG_PCI_OR16(PCI_COMMAND, - PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER | PCI_COMMAND_INT_DISABLE), - /* Enable ACPI mode */ - REG_IOSF_OR(IOSF_PORT_SCC, iosf_reg, - SCC_CTL_PCI_CFG_DIS | SCC_CTL_ACPI_INT_EN), - REG_SCRIPT_END - }; struct resource *bar; struct device_nvs *dev_nvs = acpi_get_device_nvs(); @@ -93,7 +84,4 @@ void scc_enable_acpi_mode(struct device *dev, int iosf_reg, int nvs_index) /* Device is enabled in ACPI mode */ dev_nvs->scc_en[nvs_index] = 1; - - /* Put device in ACPI mode */ - reg_script_run_on_dev(dev, ops); } From 923cde806d0daff9d6ccee581269fd4dc65578d7 Mon Sep 17 00:00:00 2001 From: Matt DeVillier Date: Tue, 10 Jan 2017 17:54:16 -0600 Subject: [PATCH 040/137] google/rambi: add dummy disable function to LPEA Signed-off-by: Matt DeVillier --- src/mainboard/google/rambi/acpi/mainboard.asl | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/src/mainboard/google/rambi/acpi/mainboard.asl b/src/mainboard/google/rambi/acpi/mainboard.asl index bfbb66bf801..d418f0fbb84 100644 --- a/src/mainboard/google/rambi/acpi/mainboard.asl +++ b/src/mainboard/google/rambi/acpi/mainboard.asl @@ -114,6 +114,11 @@ Scope (\_SB.PCI0.LPEA) GpioInt (Level, ActiveHigh, Exclusive, PullNone,, "\\_SB.GPSC") { 15 } }) + + Method (_DIS, 0x0, NotSerialized) + { + //Add a dummy disable function + } } #include From d83ba2bba4146ec039075b38935a0d8af8070f75 Mon Sep 17 00:00:00 2001 From: Matt DeVillier Date: Tue, 24 Jan 2017 18:25:56 -0600 Subject: [PATCH 041/137] google/rambi: disable touchscreen as ACPI wake device Signed-off-by: Matt DeVillier --- src/mainboard/google/rambi/acpi/touchscreen_atmel.asl | 1 - 1 file changed, 1 deletion(-) diff --git a/src/mainboard/google/rambi/acpi/touchscreen_atmel.asl b/src/mainboard/google/rambi/acpi/touchscreen_atmel.asl index 9c0fc6b5356..73e9612b499 100644 --- a/src/mainboard/google/rambi/acpi/touchscreen_atmel.asl +++ b/src/mainboard/google/rambi/acpi/touchscreen_atmel.asl @@ -7,7 +7,6 @@ Scope (\_SB.PCI0.I2C6) Device (ATSA) { Name (_HID, "ATML0001") - Name (_CID, EisaId ("PNP0C0E")) Name (_DDN, "Atmel Touchscreen") Name (_UID, 5) Name (ISTP, 0) /* TouchScreen */ From b6344a8275f2db5d9480a4b2dfc75a774ddd58b3 Mon Sep 17 00:00:00 2001 From: ReddestDream Date: Mon, 27 Mar 2017 20:16:56 -0400 Subject: [PATCH 042/137] google/rambi: remove non-functional DPTF ACPI object Doesn't work on Windows, not needed/used by Linux. Reference platforms like Minnowboard don't have it, so kill it. Signed-off-by: Matt DeVillier --- src/mainboard/google/rambi/dsdt.asl | 3 --- 1 file changed, 3 deletions(-) diff --git a/src/mainboard/google/rambi/dsdt.asl b/src/mainboard/google/rambi/dsdt.asl index 63a1fc7885e..9cf8c045d3b 100644 --- a/src/mainboard/google/rambi/dsdt.asl +++ b/src/mainboard/google/rambi/dsdt.asl @@ -27,9 +27,6 @@ DefinitionBlock( #include #include } - - /* Dynamic Platform Thermal Framework */ - #include "acpi/dptf.asl" } #include From 9f67d2bb7542ffffcd22b7db9ce5f73d48acdc4d Mon Sep 17 00:00:00 2001 From: Matt DeVillier Date: Wed, 29 Mar 2017 06:00:31 -0500 Subject: [PATCH 043/137] google/rambi: fix audio under Windows Move jack detect GpioInt resources under the codec where they belong, but leave under LPEA for Linux since it requires them there. Add pin list for Windows' SST driver. Signed-off-by: Matt DeVillier --- src/mainboard/google/rambi/acpi/mainboard.asl | 22 ++++++++++++++----- 1 file changed, 16 insertions(+), 6 deletions(-) diff --git a/src/mainboard/google/rambi/acpi/mainboard.asl b/src/mainboard/google/rambi/acpi/mainboard.asl index d418f0fbb84..a419c0e4169 100644 --- a/src/mainboard/google/rambi/acpi/mainboard.asl +++ b/src/mainboard/google/rambi/acpi/mainboard.asl @@ -89,6 +89,11 @@ Scope (\_SB.PCI0.I2C2) { BOARD_CODEC_IRQ } + + GpioIo (Exclusive, PullNone, 0, 0, , "\\_SB.GPSC", 0, ResourceConsumer, ,){ 0x000E } + + GpioIo (Exclusive, PullNone, 0, 0, , "\\_SB.GPSC", 0, ResourceConsumer, ,){ 0x000F } + }) Method (_STA) @@ -106,18 +111,23 @@ Scope (\_SB.PCI0.LPEA) { Name (GBUF, ResourceTemplate () { + /* Jack Detect (index 0) */ - GpioInt (Level, ActiveHigh, Exclusive, PullNone,, - "\\_SB.GPSC") { 14 } + GpioIo (Exclusive, PullNone, 0, 0, , "\\_SB.GPSC", 0, ResourceConsumer, ,){ 0x000E } /* Mic Detect (index 1) */ - GpioInt (Level, ActiveHigh, Exclusive, PullNone,, - "\\_SB.GPSC") { 15 } - }) + GpioIo (Exclusive, PullNone, 0, 0, , "\\_SB.GPSC", 0, ResourceConsumer, ,){ 0x000F } + /* SST Wants This */ + GpioInt (Edge, ActiveHigh, Exclusive, PullNone, 0x0000, + "\\_SB.GPSS", 0x00, ResourceConsumer, ,) + { + 0x001C // Pin list + } + }) Method (_DIS, 0x0, NotSerialized) { - //Add a dummy disable function + //Add a dummy disable function } } From b100e0ea10b990784bfc07910c4bebdca4bae0ed Mon Sep 17 00:00:00 2001 From: Matt DeVillier Date: Tue, 4 Jul 2017 17:10:37 -0500 Subject: [PATCH 044/137] google/cyan: fix I2C wake sources Remove _PRW from touchpad/touchscreen ACPI devices since they are unnecessary and cause Windows to BSOD with an ACPI BIOS error. Test: build/boot Windows 10 on any google/cyan variant Signed-off-by: Matt DeVillier --- src/mainboard/google/cyan/acpi/touchscreen_elan.asl | 2 -- src/mainboard/google/cyan/acpi/touchscreen_melfas.asl | 2 -- src/mainboard/google/cyan/acpi/touchscreen_synaptics.asl | 2 -- src/mainboard/google/cyan/acpi/trackpad_atmel.asl | 1 - src/mainboard/google/cyan/acpi/trackpad_elan.asl | 2 -- 5 files changed, 9 deletions(-) diff --git a/src/mainboard/google/cyan/acpi/touchscreen_elan.asl b/src/mainboard/google/cyan/acpi/touchscreen_elan.asl index 14e51354251..22f4d89de65 100644 --- a/src/mainboard/google/cyan/acpi/touchscreen_elan.asl +++ b/src/mainboard/google/cyan/acpi/touchscreen_elan.asl @@ -36,8 +36,6 @@ Scope (\_SB.PCI0.I2C1) } } - Name (_PRW, Package() { BOARD_TOUCHSCREEN_WAKE_GPIO, 0x3 }) - /* Allow device to power off in S0 */ Name (_S0W, 4) } diff --git a/src/mainboard/google/cyan/acpi/touchscreen_melfas.asl b/src/mainboard/google/cyan/acpi/touchscreen_melfas.asl index 6fc1e107d4d..2d6daea59ce 100644 --- a/src/mainboard/google/cyan/acpi/touchscreen_melfas.asl +++ b/src/mainboard/google/cyan/acpi/touchscreen_melfas.asl @@ -35,8 +35,6 @@ Scope (\_SB.PCI0.I2C1) } } - Name (_PRW, Package() { BOARD_TOUCHSCREEN_WAKE_GPIO, 0x3 }) - /* Allow device to power off in S0 */ Name (_S0W, 4) } diff --git a/src/mainboard/google/cyan/acpi/touchscreen_synaptics.asl b/src/mainboard/google/cyan/acpi/touchscreen_synaptics.asl index 02b4db3e9d7..5c0ccebde72 100644 --- a/src/mainboard/google/cyan/acpi/touchscreen_synaptics.asl +++ b/src/mainboard/google/cyan/acpi/touchscreen_synaptics.asl @@ -77,8 +77,6 @@ Scope (\_SB.PCI0.I2C1) } } - Name (_PRW, Package() { BOARD_TOUCHSCREEN_WAKE_GPIO, 0x3 }) - /* Allow device to power off in S0 */ Name (_S0W, 4) } diff --git a/src/mainboard/google/cyan/acpi/trackpad_atmel.asl b/src/mainboard/google/cyan/acpi/trackpad_atmel.asl index 43180a2bea9..d0aa88345d4 100644 --- a/src/mainboard/google/cyan/acpi/trackpad_atmel.asl +++ b/src/mainboard/google/cyan/acpi/trackpad_atmel.asl @@ -8,7 +8,6 @@ Scope (\_SB.PCI0.I2C6) Name (_DDN, "Atmel Touchpad") Name (_UID, 2) Name (ISTP, 1) /* Touchpad */ - Name (_PRW, Package() { BOARD_TRACKPAD_WAKE_GPIO, 0x3 }) Name (_CRS, ResourceTemplate() { diff --git a/src/mainboard/google/cyan/acpi/trackpad_elan.asl b/src/mainboard/google/cyan/acpi/trackpad_elan.asl index 93cda3477f3..da42efced32 100644 --- a/src/mainboard/google/cyan/acpi/trackpad_elan.asl +++ b/src/mainboard/google/cyan/acpi/trackpad_elan.asl @@ -31,8 +31,6 @@ Scope (\_SB.PCI0.I2C6) } } - Name (_PRW, Package() { BOARD_TRACKPAD_WAKE_GPIO, 0x3 }) - /* Allow device to power off in S0 */ Name (_S0W, 4) } From a64fddd9f878f3331b53eda5e4bbdec2cf3bd3cf Mon Sep 17 00:00:00 2001 From: Matt DeVillier Date: Thu, 11 Nov 2021 08:46:36 -0600 Subject: [PATCH 045/137] cyan disable unused devices Change-Id: I012b49562c2b932822823537032e2265901ddc81 Signed-off-by: Matt DeVillier --- src/mainboard/google/cyan/devicetree.cb | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/src/mainboard/google/cyan/devicetree.cb b/src/mainboard/google/cyan/devicetree.cb index c968dfc0b76..f53a65e9cc7 100644 --- a/src/mainboard/google/cyan/devicetree.cb +++ b/src/mainboard/google/cyan/devicetree.cb @@ -99,7 +99,7 @@ chip soc/intel/braswell device pci 00.0 on end # 8086 2280 - SoC transaction router device pci 02.0 on end # 8086 22b0/22b1 - B1/C0 stepping Graphics and Display device pci 03.0 off end # 8086 22b8 - Camera and Image Processor - device pci 0b.0 on end # 8086 22dc - Signal Processing Controller + device pci 0b.0 off end # 8086 22dc - Signal Processing Controller device pci 10.0 on end # 8086 2294 - MMC Port device pci 11.0 off end # 8086 0F15 - SDIO Port device pci 12.0 on end # 8086 0F16 - SD Port @@ -124,7 +124,7 @@ chip soc/intel/braswell device pci 1e.0 on end # 8086 2286 - SIO - DMA device pci 1e.1 off end # 8086 0F08 - PWM 1 device pci 1e.2 off end # 8086 0F09 - PWM 2 - device pci 1e.3 on end # 8086 228a - HSUART 1 + device pci 1e.3 off end # 8086 228a - HSUART 1 device pci 1e.4 off end # 8086 228c - HSUART 2 device pci 1e.5 on end # 8086 228e - SPI 1 device pci 1e.6 off end # 8086 2290 - SPI 2 From 6104cf17e45e0657af22f1b6b64cea29b0bb5fb0 Mon Sep 17 00:00:00 2001 From: Matt DeVillier Date: Wed, 22 Dec 2021 10:13:08 -0600 Subject: [PATCH 046/137] mb/google/cyan/: Adjust ACPI for Maxim audio - add HRV and GpioIO for coolstar's windows drivers - fix interrupt type for TI jack detect switch Change-Id: I6bf6bb9e9989ca8f42436800666d95dd05799838 Signed-off-by: Matt DeVillier --- src/mainboard/google/cyan/acpi/codec_maxim.asl | 11 ++++++++++- 1 file changed, 10 insertions(+), 1 deletion(-) diff --git a/src/mainboard/google/cyan/acpi/codec_maxim.asl b/src/mainboard/google/cyan/acpi/codec_maxim.asl index dd68904f9be..f526fc12da6 100644 --- a/src/mainboard/google/cyan/acpi/codec_maxim.asl +++ b/src/mainboard/google/cyan/acpi/codec_maxim.asl @@ -9,6 +9,7 @@ Scope (\_SB.PCI0.I2C2) Name (_CID, AUDIO_CODEC_CID) Name (_DDN, AUDIO_CODEC_DDN) Name (_UID, 1) + Name (_HRV, 0x02) /* Add DT style bindings with _DSD */ Name (_DSD, Package () { @@ -31,8 +32,16 @@ Scope (\_SB.PCI0.I2C2) "\\_SB.PCI0.I2C2", /* ResourceSource: I2C bus controller name */ ) + /* For Linux driver */ GpioInt (Edge, ActiveHigh, ExclusiveAndWake, PullDefault,, "\\_SB.GPSE") { BOARD_JACK_MAXIM_GPIO_INDEX } + + /* For coolstar's Windows driver */ + GpioIo (Exclusive, PullNone, 0x0000, 0x0000, IoRestrictionInputOnly, + "\\_SB.GPSE", 0x00, ResourceConsumer, ,) + { + BOARD_JACK_MAXIM_GPIO_INDEX + } } ) Return (SBUF) } @@ -74,7 +83,7 @@ Scope (\_SB.PCI0.I2C2) "\\_SB.PCI0.I2C2", /* ResourceSource: I2C bus controller name */ ) - GpioInt (Edge, ActiveHigh, ExclusiveAndWake, PullDefault,, + GpioInt (Level, ActiveLow, ExclusiveAndWake, PullDefault,, "\\_SB.GPSW") { BOARD_JACK_TI_GPIO_INDEX } } ) From 3ab7bb2cb9eb2559ee381ec7614f24a359234837 Mon Sep 17 00:00:00 2001 From: Matt DeVillier Date: Sat, 13 Nov 2021 09:28:58 -0600 Subject: [PATCH 047/137] byt/bsw: disable IOSF except for ChromeOS use Change-Id: I8341e88315618a0dcb8ab79d3d5504e79b85432a Signed-off-by: Matt DeVillier --- src/soc/intel/baytrail/acpi/southcluster.asl | 9 +++++++++ src/soc/intel/braswell/acpi/southcluster.asl | 9 +++++++++ 2 files changed, 18 insertions(+) diff --git a/src/soc/intel/baytrail/acpi/southcluster.asl b/src/soc/intel/baytrail/acpi/southcluster.asl index dacdd29e066..6ab8db4763f 100644 --- a/src/soc/intel/baytrail/acpi/southcluster.asl +++ b/src/soc/intel/baytrail/acpi/southcluster.asl @@ -241,6 +241,15 @@ Device (IOSF) RBAS = CONFIG_ECAM_MMCONF_BASE_ADDRESS + 0xD0 Return (^RBUF) } + + Method (_STA) + { +#if CONFIG(CHROMEOS) + Return (0xF) +#else + Return (0x0) +#endif + } } /* LPC Bridge 0:1f.0 */ diff --git a/src/soc/intel/braswell/acpi/southcluster.asl b/src/soc/intel/braswell/acpi/southcluster.asl index 3dcc6c19511..de1ddab2e54 100644 --- a/src/soc/intel/braswell/acpi/southcluster.asl +++ b/src/soc/intel/braswell/acpi/southcluster.asl @@ -240,6 +240,15 @@ Device (IOSF) RBAS = CONFIG_ECAM_MMCONF_BASE_ADDRESS + 0xD0 Return (^RBUF) } + + Method (_STA) + { +#if CONFIG(CHROMEOS) + Return (0xF) +#else + Return (0x0) +#endif + } } /* LPC Bridge 0:1f.0 */ From 4ee2dcb8302eae967331d3cdbbad1e427dc20487 Mon Sep 17 00:00:00 2001 From: Matt DeVillier Date: Sat, 9 Jun 2018 01:31:00 -0500 Subject: [PATCH 048/137] google/fizz: override SMBIOS product name based on OEM ID Signed-off-by: Matt DeVillier --- src/mainboard/google/fizz/mainboard.c | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+) diff --git a/src/mainboard/google/fizz/mainboard.c b/src/mainboard/google/fizz/mainboard.c index b0d94a09d72..b7a6e68fe63 100644 --- a/src/mainboard/google/fizz/mainboard.c +++ b/src/mainboard/google/fizz/mainboard.c @@ -179,6 +179,24 @@ const char *smbios_system_sku(void) return sku_str; } +const char *smbios_mainboard_product_name(void) +{ + static char product[12]; + + switch (board_oem_id()) + { + case 0: snprintf(product, sizeof(product), "Kench"); break; + case 1: snprintf(product, sizeof(product), "Teemo"); break; + case 2: snprintf(product, sizeof(product), "Sion"); break; + case 3: + case 4: + case 5: snprintf(product, sizeof(product), "Wukong"); break; + case 6: snprintf(product, sizeof(product), "Teemo"); break; + default: snprintf(product, sizeof(product), "UNK Fizz"); break; + } + return product; +} + static void mainboard_init(struct device *dev) { mainboard_ec_init(); From e69c6bdcb50e75c47ac353b3b6f9ce429bee9b78 Mon Sep 17 00:00:00 2001 From: Matt DeVillier Date: Mon, 15 Oct 2018 08:42:06 -0500 Subject: [PATCH 049/137] google/fizz: Enable ACPI PM timer Enable ACPI PM timer to ensure TCO Watchdog enabled Change-Id: Ibceaa3ea850a5052fc6d5ad2666c8ddad79d60d5 Signed-off-by: Matt DeVillier --- src/mainboard/google/fizz/Kconfig | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/mainboard/google/fizz/Kconfig b/src/mainboard/google/fizz/Kconfig index 8b7811c1a6d..d46abdd9a48 100644 --- a/src/mainboard/google/fizz/Kconfig +++ b/src/mainboard/google/fizz/Kconfig @@ -98,7 +98,7 @@ config UART_FOR_CONSOLE default 2 config USE_PM_ACPI_TIMER - default n + default y config EDK2_BOOT_TIMEOUT int From 06b14579836fcc9e3bc1a3b57e4e5f552e32423b Mon Sep 17 00:00:00 2001 From: Matt DeVillier Date: Sat, 5 Jan 2019 14:33:23 -0600 Subject: [PATCH 050/137] mb/google/fizz: override PL1/PL2 values for i7 KBL-R SCU Since the i7 KBL-R SoC is just a binned KBL-H part, use PL1/PL2 values to reflect that Change-Id: I1f6f4ae24b311d914511bb264e06ff06e2a2edc7 Signed-off-by: Matt DeVillier --- src/mainboard/google/fizz/mainboard.c | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/src/mainboard/google/fizz/mainboard.c b/src/mainboard/google/fizz/mainboard.c index b7a6e68fe63..68d91aa9735 100644 --- a/src/mainboard/google/fizz/mainboard.c +++ b/src/mainboard/google/fizz/mainboard.c @@ -136,6 +136,13 @@ static void mainboard_set_power_limits(struct soc_power_limits_config *conf) conf->tdp_pl4 = SET_PSYSPL2(psyspl2); } + + /* Override PL1/PL2 for i7 KBL-R SKU */ + if (sku & FIZZ_SKU_ID_I7_U42) { + conf->tdp_pl1_override = 20; + pl2 = 40; + } + conf->tdp_pl2_override = pl2; /* set psyspl2 to 90% of max adapter power */ conf->tdp_psyspl2 = SET_PSYSPL2(psyspl2); From bb11ea62ba9853ebea08727d837dfbaeec157a12 Mon Sep 17 00:00:00 2001 From: Matt Delco Date: Tue, 15 May 2018 14:01:16 -0700 Subject: [PATCH 051/137] google/chromeec/acpi: Augment GOOG0006 with Intel's analogous device Adapted from Chromium commit 87d2acfd1c053d6425b4e9451526b2634379d60c. GOOG0006 is a device that reports if a system is in tablet mode or laptop mode. Intel has an analogous device in ACPI (though that device can also handle other things like buttons for volume and power). This change allows selection of driver based on use of acpi_osi=Linux. Option to select between drivers was made since Intel driver has issues with > 180* rotation whereas the ChromeOS driver does not. Original-Change-Id: Ie913788fde7402b556a18357b89a5e9020acd98d Original-Reviewed-on: https://chromium-review.googlesource.com/1060385 Original-Tested-by: Matt Delco Original-Reviewed-by: Duncan Laurie Change-Id: I61631c22635a5243870fb2d19e4a82e1eea8e095 Signed-off-by: Matt DeVillier --- src/ec/google/chromeec/acpi/ec.asl | 11 +++++++- src/ec/google/chromeec/acpi/vbtn.asl | 38 ++++++++++++++++++++++++++++ 2 files changed, 48 insertions(+), 1 deletion(-) create mode 100644 src/ec/google/chromeec/acpi/vbtn.asl diff --git a/src/ec/google/chromeec/acpi/ec.asl b/src/ec/google/chromeec/acpi/ec.asl index 2d44ae3c1b7..9bc1aee4193 100644 --- a/src/ec/google/chromeec/acpi/ec.asl +++ b/src/ec/google/chromeec/acpi/ec.asl @@ -453,7 +453,15 @@ Device (EC0) \_SB.DPTF.TPET() #endif #ifdef EC_ENABLE_TBMC_DEVICE - Notify (TBMC, 0x80) + If (LEqual(_OSI("Linux"), 1)) { + Notify (TBMC, 0x80) + } else { + If (LEqual ((^TBMD), One)) { + Notify (VBTN, 0xCC) + } Else { + Notify (VBTN, 0xCD) + } + } #endif #if CONFIG(SOC_AMD_COMMON_BLOCK_ACPI_DPTC) If (CondRefOf (\_SB.DPTC)) { @@ -648,5 +656,6 @@ Device (EC0) #ifdef EC_ENABLE_TBMC_DEVICE #include "tbmc.asl" + #include "vbtn.asl" #endif } diff --git a/src/ec/google/chromeec/acpi/vbtn.asl b/src/ec/google/chromeec/acpi/vbtn.asl new file mode 100644 index 00000000000..b77d2db361d --- /dev/null +++ b/src/ec/google/chromeec/acpi/vbtn.asl @@ -0,0 +1,38 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +/* VGBS reports 0x40 when NOT in tablet mode. */ +/* Sent event 0xCC for tablet mode, 0xCD for laptop */ +/* Linux driver expects SMBIOS_ENCLOSURE_TYPE=SMBIOS_ENCLOSURE_CONVERTIBLE */ + +Device (VBTN) +{ + Name (_HID, "INT33D6") + Name (_DDN, "Tablet Virtual Buttons") + + Method (VBDL, 0) + { + } + + Method (VGBS) + { + If (LEqual (^^RCTM, One)) { + Return (0x0) + } Else { + Return (0x40) + } + } + Method(_STA, 0) + { + Return (0xF) + } +} + +Device (VBTO) +{ + Name (_HID, "INT33D3") + Name (_CID, "PNP0C60") + Method (_STA, 0) + { + Return (0xF) + } +} From 6993a445db3ad2e8ba920aeb14e28e301b2f5415 Mon Sep 17 00:00:00 2001 From: Matt DeVillier Date: Sat, 4 May 2019 17:58:38 -0500 Subject: [PATCH 052/137] drivers/net/rt8168: add _STA field entry Add _STA field entry for rt8168 ACPI device and set to ACPI_STATUS_DEVICE_HIDDEN_ON in order to hide device from OS (Windows) as there is no driver needed (or available). Linux is unaffected as it does not use the ACPI device. Change-Id: Ib7ae99fffcb00e71421b93c2794119841aa239d3 Signed-off-by: Matt DeVillier --- src/drivers/net/r8168.c | 1 + 1 file changed, 1 insertion(+) diff --git a/src/drivers/net/r8168.c b/src/drivers/net/r8168.c index 5d19d695195..abdae8c2d1c 100644 --- a/src/drivers/net/r8168.c +++ b/src/drivers/net/r8168.c @@ -379,6 +379,7 @@ static void r8168_net_fill_ssdt(const struct device *dev) if (dev->chip_ops) acpigen_write_name_string("_DDN", dev->chip_ops->name); + acpigen_write_STA(ACPI_STATUS_DEVICE_HIDDEN_ON); /* Power Resource */ if (CONFIG(RT8168_GEN_ACPI_POWER_RESOURCE) && config->has_power_resource) { From 0c5f5a67e2502b0aa252cfbd2dff10928ab8ea0b Mon Sep 17 00:00:00 2001 From: Matt DeVillier Date: Wed, 8 May 2019 20:02:34 -0500 Subject: [PATCH 053/137] google/nami - override mainboard name Override SMBIOS mainboard name with variant name based on board SKU Change-Id: I2125bfb6436469405378f9c983d7cfcb2f85f916 Signed-off-by: Matt DeVillier --- .../google/poppy/variants/nami/mainboard.c | 50 +++++++++++++++++++ 1 file changed, 50 insertions(+) diff --git a/src/mainboard/google/poppy/variants/nami/mainboard.c b/src/mainboard/google/poppy/variants/nami/mainboard.c index b703d40fc3c..5099a1e194c 100644 --- a/src/mainboard/google/poppy/variants/nami/mainboard.c +++ b/src/mainboard/google/poppy/variants/nami/mainboard.c @@ -174,6 +174,56 @@ const char *smbios_mainboard_manufacturer(void) return manuf; } +const char *smbios_mainboard_product_name(void) +{ + uint32_t sku_id = variant_board_sku(); + static char product[12]; + + switch (sku_id) { + case SKU_0_PANTHEON: + case SKU_1_PANTHEON: + case SKU_2_PANTHEON: + case SKU_3_PANTHEON: + case SKU_4_PANTHEON: + snprintf(product, sizeof(product), "Pantheon"); break; + case SKU_0_VAYNE: + case SKU_1_VAYNE: + case SKU_2_VAYNE: + snprintf(product, sizeof(product), "Vayne"); break; + case SKU_0_AKALI: + case SKU_1_AKALI: + snprintf(product, sizeof(product), "Akali"); break; + case SKU_0_AKALI360: + case SKU_1_AKALI360: + snprintf(product, sizeof(product), "Akali 360"); break; + case SKU_0_BARD: + case SKU_1_BARD: + case SKU_2_BARD: + case SKU_3_BARD: + snprintf(product, sizeof(product), "Bard"); break; + case SKU_0_EKKO: + case SKU_1_EKKO: + case SKU_2_EKKO: + case SKU_3_EKKO: + snprintf(product, sizeof(product), "Ekko"); break; + case SKU_0_SONA: + case SKU_1_SONA: + snprintf(product, sizeof(product), "Sona"); break; + case SKU_0_SYNDRA: + case SKU_1_SYNDRA: + case SKU_2_SYNDRA: + case SKU_3_SYNDRA: + case SKU_4_SYNDRA: + case SKU_5_SYNDRA: + case SKU_6_SYNDRA: + case SKU_7_SYNDRA: + snprintf(product, sizeof(product), "Syndra"); break; + default: + snprintf(product, sizeof(product), "Nami"); break; + } + return product; +} + const char *mainboard_vbt_filename(void) { uint32_t sku_id = variant_board_sku(); From 4fb860b58d67362c6d2bbbf549f445975bc83d87 Mon Sep 17 00:00:00 2001 From: Matt DeVillier Date: Sun, 27 Oct 2019 18:44:42 -0500 Subject: [PATCH 054/137] soc/intel/common: make Legacy 8254 Timer default deselecting this results in some Linux ISOs not booting w/Tianocore, so just set to selected by default Change-Id: Ic889a60168938e4cc04154c30e7a390fcbbcbb3a Signed-off-by: Matt DeVillier --- src/soc/intel/common/block/timer/Kconfig | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/src/soc/intel/common/block/timer/Kconfig b/src/soc/intel/common/block/timer/Kconfig index 42613a8f84f..7bd499ee055 100644 --- a/src/soc/intel/common/block/timer/Kconfig +++ b/src/soc/intel/common/block/timer/Kconfig @@ -5,8 +5,7 @@ config SOC_INTEL_COMMON_BLOCK_TIMER config USE_LEGACY_8254_TIMER bool "Use Legacy 8254 Timer" - default y if PAYLOAD_SEABIOS || VGA_ROM_RUN - default n + default y help Setting this makes the Legacy 8254 Timer available by disabling clock gating. This needs to be enabled in order to boot a legacy From 918c003672eac95c4304bdc9040a2e7977ad2525 Mon Sep 17 00:00:00 2001 From: Matt DeVillier Date: Wed, 18 Jan 2023 18:14:09 -0600 Subject: [PATCH 055/137] drivers/i2c/generic: Add option to set ACPI subsystem ID Change-Id: I7c9c938bd20d36be8fdfb0d95bb58a7259650693 Signed-off-by: Matt DeVillier --- src/drivers/i2c/generic/chip.h | 1 + src/drivers/i2c/generic/generic.c | 2 ++ 2 files changed, 3 insertions(+) diff --git a/src/drivers/i2c/generic/chip.h b/src/drivers/i2c/generic/chip.h index 0942d00fc1b..8e13ffc7bb8 100644 --- a/src/drivers/i2c/generic/chip.h +++ b/src/drivers/i2c/generic/chip.h @@ -11,6 +11,7 @@ struct drivers_i2c_generic_config { const char *hid; /* ACPI _HID (required) */ const char *cid; /* ACPI _CID */ + const char *sub; /* ACPI _SUB */ const char *name; /* ACPI Device Name */ const char *desc; /* Device Description */ unsigned int uid; /* ACPI _UID */ diff --git a/src/drivers/i2c/generic/generic.c b/src/drivers/i2c/generic/generic.c index d1baeb76f40..1a3ec40c7a5 100644 --- a/src/drivers/i2c/generic/generic.c +++ b/src/drivers/i2c/generic/generic.c @@ -83,6 +83,8 @@ void i2c_generic_fill_ssdt(const struct device *dev, acpigen_write_name_string("_HID", config->hid); if (config->cid) acpigen_write_name_string("_CID", config->cid); + if (config->sub) + acpigen_write_name_string("_SUB", config->sub); acpigen_write_name_integer("_UID", config->uid); if (config->desc) acpigen_write_name_string("_DDN", config->desc); From a78a9c6f5a6d4c43fd622db824abe09544aafec4 Mon Sep 17 00:00:00 2001 From: Matt DeVillier Date: Wed, 18 Jan 2023 18:16:37 -0600 Subject: [PATCH 056/137] mb/google/eve: set ACPI subsystem ID Needed for coolstar's Windows drivers Change-Id: I3b8d56ff01d4cca7ba5c02f1aaab1a7049607dbc Signed-off-by: Matt DeVillier --- src/mainboard/google/eve/devicetree.cb | 1 + 1 file changed, 1 insertion(+) diff --git a/src/mainboard/google/eve/devicetree.cb b/src/mainboard/google/eve/devicetree.cb index 1e9ffd9255e..a500f84908b 100644 --- a/src/mainboard/google/eve/devicetree.cb +++ b/src/mainboard/google/eve/devicetree.cb @@ -305,6 +305,7 @@ chip soc/intel/skylake device pci 15.2 on chip drivers/i2c/hid register "generic.hid" = ""ACPI0C50"" + register "generic.sub" = ""1AE0006B"" register "generic.desc" = ""Touchpad"" register "generic.irq" = "ACPI_IRQ_LEVEL_LOW(GPP_B3_IRQ)" register "hid_desc_reg_offset" = "0x1" From 8f7584881ce5f7028ecf230339e024c7f4b16468 Mon Sep 17 00:00:00 2001 From: Matt DeVillier Date: Sat, 30 Nov 2019 16:29:58 -0600 Subject: [PATCH 057/137] mb/google/poppy: add libgfxinit support for variants Add libgfxinit support for Nami, Nautilus, and Soraka. Using default panel init values for Nautilus and Soraka for now until correct values can be extracted from VBTs. Change-Id: If0ca389487338c47f9d8de990acf591c6907eaa9 Signed-off-by: Matt DeVillier --- src/mainboard/google/poppy/Kconfig | 3 +++ src/mainboard/google/poppy/variants/nami/devicetree.cb | 9 +++++++++ .../google/poppy/variants/nautilus/devicetree.cb | 9 +++++++++ src/mainboard/google/poppy/variants/soraka/devicetree.cb | 9 +++++++++ 4 files changed, 30 insertions(+) diff --git a/src/mainboard/google/poppy/Kconfig b/src/mainboard/google/poppy/Kconfig index 3007bcbc9aa..34fcfa1cf4b 100644 --- a/src/mainboard/google/poppy/Kconfig +++ b/src/mainboard/google/poppy/Kconfig @@ -47,6 +47,7 @@ config BOARD_GOOGLE_NAMI select DRIVERS_SPI_ACPI select EXCLUDE_NATIVE_SD_INTERFACE select INTEL_GMA_HAVE_VBT + select MAINBOARD_HAS_LIBGFXINIT select SPI_TPM select SYSTEM_TYPE_LAPTOP @@ -57,6 +58,7 @@ config BOARD_GOOGLE_NAUTILUS select DRIVERS_I2C_DA7219 select I2C_TPM select INTEL_GMA_HAVE_VBT + select MAINBOARD_HAS_LIBGFXINIT select SYSTEM_TYPE_CONVERTIBLE select VARIANT_HAS_CAMERA_ACPI @@ -93,6 +95,7 @@ config BOARD_GOOGLE_SORAKA select DRIVERS_I2C_MAX98927 select I2C_TPM select INTEL_GMA_HAVE_VBT + select MAINBOARD_HAS_LIBGFXINIT select NO_FADT_8042 select SYSTEM_TYPE_DETACHABLE select VARIANT_HAS_CAMERA_ACPI diff --git a/src/mainboard/google/poppy/variants/nami/devicetree.cb b/src/mainboard/google/poppy/variants/nami/devicetree.cb index 2b1a19021c9..be0e6d77fc7 100644 --- a/src/mainboard/google/poppy/variants/nami/devicetree.cb +++ b/src/mainboard/google/poppy/variants/nami/devicetree.cb @@ -3,6 +3,15 @@ chip soc/intel/skylake # IGD Displays register "gfx" = "GMA_STATIC_DISPLAYS(0)" + register "panel_cfg" = "{ + .up_delay_ms = 100, + .down_delay_ms = 500, + .cycle_delay_ms = 500, + .backlight_on_delay_ms = 1, + .backlight_off_delay_ms = 200, + .backlight_pwm_hz = 1000, + }" + # Deep Sx states register "deep_s3_enable_ac" = "0" register "deep_s3_enable_dc" = "1" diff --git a/src/mainboard/google/poppy/variants/nautilus/devicetree.cb b/src/mainboard/google/poppy/variants/nautilus/devicetree.cb index e8c735d30c6..73f5afe73fe 100644 --- a/src/mainboard/google/poppy/variants/nautilus/devicetree.cb +++ b/src/mainboard/google/poppy/variants/nautilus/devicetree.cb @@ -3,6 +3,15 @@ chip soc/intel/skylake # IGD Displays register "gfx" = "GMA_STATIC_DISPLAYS(0)" + register "panel_cfg" = "{ + .up_delay_ms = 100, + .down_delay_ms = 500, + .cycle_delay_ms = 500, + .backlight_on_delay_ms = 1, + .backlight_off_delay_ms = 200, + .backlight_pwm_hz = 1000, + }" + # Deep Sx states register "deep_s3_enable_ac" = "0" register "deep_s3_enable_dc" = "0" diff --git a/src/mainboard/google/poppy/variants/soraka/devicetree.cb b/src/mainboard/google/poppy/variants/soraka/devicetree.cb index bcfb2668526..ad758db18b9 100644 --- a/src/mainboard/google/poppy/variants/soraka/devicetree.cb +++ b/src/mainboard/google/poppy/variants/soraka/devicetree.cb @@ -3,6 +3,15 @@ chip soc/intel/skylake # IGD Displays register "gfx" = "GMA_STATIC_DISPLAYS(0)" + register "panel_cfg" = "{ + .up_delay_ms = 100, + .down_delay_ms = 500, + .cycle_delay_ms = 500, + .backlight_on_delay_ms = 1, + .backlight_off_delay_ms = 200, + .backlight_pwm_hz = 1000, + }" + # Deep Sx states register "deep_s3_enable_ac" = "0" register "deep_s3_enable_dc" = "0" From 2dd87ab46a7bc33630e1a0add46e204f5e7eee80 Mon Sep 17 00:00:00 2001 From: Matt DeVillier Date: Sat, 14 Nov 2020 15:04:49 -0600 Subject: [PATCH 058/137] mb/google/puff: select USE_PM_ACPI_TIMER by default Needed for WDT to function Change-Id: I2dd24f91da730b6fe660e6f3c76d652014ddf0f1 Signed-off-by: Matt DeVillier --- src/mainboard/google/puff/Kconfig | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/mainboard/google/puff/Kconfig b/src/mainboard/google/puff/Kconfig index 1fe0de525a3..746e9441f25 100644 --- a/src/mainboard/google/puff/Kconfig +++ b/src/mainboard/google/puff/Kconfig @@ -175,7 +175,7 @@ config VBOOT select VBOOT_EARLY_EC_SYNC config USE_PM_ACPI_TIMER - default n + default y config EDK2_BOOT_TIMEOUT int From 66cfc6cc8d661fc483e3a4933a657d805e703a7d Mon Sep 17 00:00:00 2001 From: Matt DeVillier Date: Fri, 18 Dec 2020 20:45:22 -0600 Subject: [PATCH 059/137] mb/google/eve: Set kblight to 50% on boot Turn on in romstage, off in ramstage - enough to indate board is booting Change-Id: I33af888d614010538f69512bbd052ed2b83fcaa5 Signed-off-by: Matt DeVillier --- src/mainboard/google/eve/ec.c | 6 ++++++ src/mainboard/google/eve/romstage.c | 9 +++++++++ 2 files changed, 15 insertions(+) diff --git a/src/mainboard/google/eve/ec.c b/src/mainboard/google/eve/ec.c index 499f56484bf..eb4e0978fb0 100644 --- a/src/mainboard/google/eve/ec.c +++ b/src/mainboard/google/eve/ec.c @@ -15,4 +15,10 @@ void mainboard_ec_init(void) }; google_chromeec_events_init(&info, acpi_is_wakeup_s3()); + +#ifdef EC_ENABLE_KEYBOARD_BACKLIGHT + /* Turn off keyboard backlight after turning on in romstage */ + if (!acpi_is_wakeup_s3()) + google_chromeec_kbbacklight(0); +#endif } diff --git a/src/mainboard/google/eve/romstage.c b/src/mainboard/google/eve/romstage.c index f3c0f1140b4..9aa4d453409 100644 --- a/src/mainboard/google/eve/romstage.c +++ b/src/mainboard/google/eve/romstage.c @@ -2,10 +2,12 @@ #include #include +#include #include #include #include #include "spd/spd.h" +#include "ec.h" void mainboard_memory_init_params(FSPM_UPD *mupd) { @@ -41,4 +43,11 @@ void mainboard_memory_init_params(FSPM_UPD *mupd) printk(BIOS_WARNING, "Limiting memory to 1600MHz\n"); mem_cfg->DdrFreqLimit = 1600; } + +#ifdef EC_ENABLE_KEYBOARD_BACKLIGHT + /* Turn on keyboard backlight to indicate we are booting */ + const FSPM_ARCH_UPD *arch_upd = &mupd->FspmArchUpd; + if (arch_upd->BootMode != FSP_BOOT_ON_S3_RESUME) + google_chromeec_kbbacklight(50); +#endif } From a4e3e4db3fad868f42f5decb71e57a9d040ba173 Mon Sep 17 00:00:00 2001 From: Matt DeVillier Date: Sat, 2 Jan 2021 18:05:19 -0600 Subject: [PATCH 060/137] drivers/vpd: default to y for reading SMBIOS serial from VPD Change-Id: Iec30c4ae92373b5a650bb40453b5f4ff1c21d165 Signed-off-by: Matt DeVillier --- src/drivers/vpd/Kconfig | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/src/drivers/vpd/Kconfig b/src/drivers/vpd/Kconfig index 7d45eb6a850..1b4f7ca9943 100644 --- a/src/drivers/vpd/Kconfig +++ b/src/drivers/vpd/Kconfig @@ -2,7 +2,7 @@ config VPD bool "Support for Vital Product Data tables" - default n + default y if !DRIVERS_GENERIC_CBFS_SERIAL help Enable support for flash based vital product data. @@ -23,4 +23,4 @@ config VPD_FMAP_SIZE config SMBIOS_SERIAL_FROM_VPD bool "Load device serial from VPD" depends on VPD && GENERATE_SMBIOS_TABLES - default n + default y From b45d1909ea99c40dffc1c99d9b8f378a54bd2cfa Mon Sep 17 00:00:00 2001 From: Matt DeVillier Date: Wed, 10 Nov 2021 11:19:50 -0600 Subject: [PATCH 061/137] APL: remove problematic PCIe ASL Change-Id: I2006c588ffde4fc394edbe02a06c77f5be777c9d Signed-off-by: Matt DeVillier --- src/soc/intel/apollolake/acpi/pcie.asl | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/src/soc/intel/apollolake/acpi/pcie.asl b/src/soc/intel/apollolake/acpi/pcie.asl index f7cf04f3133..eb800c3c0f2 100644 --- a/src/soc/intel/apollolake/acpi/pcie.asl +++ b/src/soc/intel/apollolake/acpi/pcie.asl @@ -7,7 +7,7 @@ Device (RP01) Name (_ADR, 0x00140000) Name (_DDN, "PCIe-B 0") - #include "pcie_port.asl" +// #include "pcie_port.asl" } Device (RP03) @@ -15,5 +15,5 @@ Device (RP03) Name (_ADR, 0x00130000) Name (_DDN, "PCIe-A 0") - #include "pcie_port.asl" +// #include "pcie_port.asl" } From 617dca1ef694ef569f188a980ec55448b78d4d1b Mon Sep 17 00:00:00 2001 From: Matt DeVillier Date: Mon, 10 Oct 2022 19:03:11 -0500 Subject: [PATCH 062/137] soc/intel/apl: Hide PMC/IPC ACPI device from Windows Change-Id: I02efb64a845edc6e4fc559e7e99a7825abf4c2aa Signed-off-by: Matt DeVillier --- src/soc/intel/apollolake/acpi/pmc_ipc.asl | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/src/soc/intel/apollolake/acpi/pmc_ipc.asl b/src/soc/intel/apollolake/acpi/pmc_ipc.asl index d90b42ea82d..55585c4dd95 100644 --- a/src/soc/intel/apollolake/acpi/pmc_ipc.asl +++ b/src/soc/intel/apollolake/acpi/pmc_ipc.asl @@ -42,5 +42,9 @@ scope (\_SB) { Return (^RBUF) } + Method (_STA, 0x0, NotSerialized) + { + Return(0xb) + } } } From 6c5b9ae46edb62f5acc77e17a67bc592775c9d45 Mon Sep 17 00:00:00 2001 From: Matt DeVillier Date: Sun, 13 Feb 2022 13:20:17 -0600 Subject: [PATCH 063/137] mb/google/reef: Disable unused devices in devtrees Change-Id: Iacdf93b4952cbc63fc465f07d440463106527b8d Signed-off-by: Matt DeVillier --- src/mainboard/google/reef/variants/baseboard/devicetree.cb | 2 +- src/mainboard/google/reef/variants/coral/devicetree.cb | 6 +++--- src/mainboard/google/reef/variants/pyro/devicetree.cb | 2 +- src/mainboard/google/reef/variants/sand/devicetree.cb | 2 +- src/mainboard/google/reef/variants/snappy/devicetree.cb | 2 +- 5 files changed, 7 insertions(+), 7 deletions(-) diff --git a/src/mainboard/google/reef/variants/baseboard/devicetree.cb b/src/mainboard/google/reef/variants/baseboard/devicetree.cb index ddb78a54fd2..de7b04eaa24 100644 --- a/src/mainboard/google/reef/variants/baseboard/devicetree.cb +++ b/src/mainboard/google/reef/variants/baseboard/devicetree.cb @@ -128,7 +128,7 @@ chip soc/intel/apollolake device pci 02.0 on # - Gen register "gfx" = "GMA_DEFAULT_PANEL(0)" end - device pci 03.0 on end # - Iunit + device pci 03.0 off end # - Iunit device pci 0d.0 on end # - P2SB device pci 0d.1 on end # - PMC device pci 0d.2 on end # - SPI diff --git a/src/mainboard/google/reef/variants/coral/devicetree.cb b/src/mainboard/google/reef/variants/coral/devicetree.cb index d14033065ca..b2f317db2e8 100644 --- a/src/mainboard/google/reef/variants/coral/devicetree.cb +++ b/src/mainboard/google/reef/variants/coral/devicetree.cb @@ -128,7 +128,7 @@ chip soc/intel/apollolake device pci 02.0 on # - Gen register "gfx" = "GMA_DEFAULT_PANEL(0)" end - device pci 03.0 on end # - Iunit + device pci 03.0 off end # - Iunit device pci 0d.0 on end # - P2SB device pci 0d.1 on end # - PMC device pci 0d.2 on end # - SPI @@ -242,8 +242,8 @@ chip soc/intel/apollolake device pci 17.2 off end # - I2C 6 device pci 17.3 off end # - I2C 7 device pci 18.0 on end # - UART 0 - device pci 18.1 on end # - UART 1 - device pci 18.2 on end # - UART 2 + device pci 18.1 off end # - UART 1 + device pci 18.2 off end # - UART 2 device pci 18.3 off end # - UART 3 device pci 19.0 on end # - SPI 0 device pci 19.1 off end # - SPI 1 diff --git a/src/mainboard/google/reef/variants/pyro/devicetree.cb b/src/mainboard/google/reef/variants/pyro/devicetree.cb index ee1e0f3d874..587fa701348 100644 --- a/src/mainboard/google/reef/variants/pyro/devicetree.cb +++ b/src/mainboard/google/reef/variants/pyro/devicetree.cb @@ -137,7 +137,7 @@ chip soc/intel/apollolake device pci 02.0 on # - Gen register "gfx" = "GMA_DEFAULT_PANEL(0)" end - device pci 03.0 on end # - Iunit + device pci 03.0 off end # - Iunit device pci 0d.0 on end # - P2SB device pci 0d.1 on end # - PMC device pci 0d.2 on end # - SPI diff --git a/src/mainboard/google/reef/variants/sand/devicetree.cb b/src/mainboard/google/reef/variants/sand/devicetree.cb index de2e920f4af..ffa1835bd8d 100644 --- a/src/mainboard/google/reef/variants/sand/devicetree.cb +++ b/src/mainboard/google/reef/variants/sand/devicetree.cb @@ -124,7 +124,7 @@ chip soc/intel/apollolake device pci 02.0 on # - Gen register "gfx" = "GMA_DEFAULT_PANEL(0)" end - device pci 03.0 on end # - Iunit + device pci 03.0 off end # - Iunit device pci 0d.0 on end # - P2SB device pci 0d.1 on end # - PMC device pci 0d.2 on end # - SPI diff --git a/src/mainboard/google/reef/variants/snappy/devicetree.cb b/src/mainboard/google/reef/variants/snappy/devicetree.cb index 197c911226f..eecc1d4adab 100644 --- a/src/mainboard/google/reef/variants/snappy/devicetree.cb +++ b/src/mainboard/google/reef/variants/snappy/devicetree.cb @@ -133,7 +133,7 @@ chip soc/intel/apollolake device pci 02.0 on # - Gen register "gfx" = "GMA_DEFAULT_PANEL(0)" end - device pci 03.0 on end # - Iunit + device pci 03.0 off end # - Iunit device pci 0d.0 on end # - P2SB device pci 0d.1 on end # - PMC device pci 0d.2 on end # - SPI From f9183a3a1d0124a6b8dba1df47c1c279473bd193 Mon Sep 17 00:00:00 2001 From: Matt DeVillier Date: Sun, 2 Oct 2022 13:01:32 -0500 Subject: [PATCH 064/137] mb/google/reef: Use 2ch dmic array (vs 4ch) Change-Id: Ieacfefaac145c1c5ef5fed78400f6dd1ff5b5f75 Signed-off-by: Matt DeVillier --- src/mainboard/google/reef/Kconfig | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/mainboard/google/reef/Kconfig b/src/mainboard/google/reef/Kconfig index fb026316503..87447a5c016 100644 --- a/src/mainboard/google/reef/Kconfig +++ b/src/mainboard/google/reef/Kconfig @@ -97,7 +97,7 @@ config UART_FOR_CONSOLE config INCLUDE_NHLT_BLOBS bool "Include blobs for audio." - select NHLT_DMIC_4CH_16B + select NHLT_DMIC_2CH_16B select NHLT_DA7219 select NHLT_MAX98357 From c361720724a9f13f34b79db0ce6fb24f8399fbba Mon Sep 17 00:00:00 2001 From: Matt DeVillier Date: Sun, 16 Oct 2022 15:58:06 -0500 Subject: [PATCH 065/137] soc/intel/apl: set default headers, FSP files for GLK Change-Id: Ie81eb89f87143e2a1402c4c4db6726626dd1f306 Signed-off-by: Matt DeVillier --- src/soc/intel/apollolake/Kconfig | 7 ++++++- 1 file changed, 6 insertions(+), 1 deletion(-) diff --git a/src/soc/intel/apollolake/Kconfig b/src/soc/intel/apollolake/Kconfig index 395d7aa6883..c026ec91cf0 100644 --- a/src/soc/intel/apollolake/Kconfig +++ b/src/soc/intel/apollolake/Kconfig @@ -191,13 +191,18 @@ config VERSTAGE_ADDR The base address (in CAR) where verstage should be linked config FSP_HEADER_PATH - default "src/vendorcode/intel/fsp/fsp2_0/glk/2.2.0.0" if VENDOR_GOOGLE && SOC_INTEL_GEMINILAKE default "src/vendorcode/intel/fsp/fsp2_0/glk/2.2.3.1" if SOC_INTEL_GEMINILAKE default "3rdparty/fsp/ApolloLakeFspBinPkg/Include/" config FSP_FD_PATH default "3rdparty/fsp/ApolloLakeFspBinPkg/FspBin/Fsp.fd" +config FSP_M_FILE + default "3rdparty/blobs/soc/intel/glk/fsp/release/Fsp_M.fd" if SOC_INTEL_GEMINILAKE + +config FSP_S_FILE + default "3rdparty/blobs/soc/intel/glk/fsp/release/Fsp_S.fd" if SOC_INTEL_GEMINILAKE + config FSP_M_ADDR hex default 0xfef40000 From 09bc8440210ddd368d3bdb3b8639ba24933500cc Mon Sep 17 00:00:00 2001 From: Matt DeVillier Date: Sun, 13 Feb 2022 22:00:28 -0600 Subject: [PATCH 066/137] mb/google/octopus: Disable unused devices in devtree Change-Id: I1ee99b5c45881a4cf3624bf487bc9d83fb3d07a1 Signed-off-by: Matt DeVillier --- src/mainboard/google/octopus/variants/baseboard/devicetree.cb | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/src/mainboard/google/octopus/variants/baseboard/devicetree.cb b/src/mainboard/google/octopus/variants/baseboard/devicetree.cb index abf53b47c53..ea2164a9e6e 100644 --- a/src/mainboard/google/octopus/variants/baseboard/devicetree.cb +++ b/src/mainboard/google/octopus/variants/baseboard/devicetree.cb @@ -115,7 +115,7 @@ chip soc/intel/apollolake device pci 02.0 on # - Gen register "gfx" = "GMA_DEFAULT_PANEL(0)" end - device pci 03.0 on end # - Gaussian Mixture Model (GMM) + device pci 03.0 off end # - Gaussian Mixture Model (GMM) device pci 0c.0 on chip drivers/wifi/generic register "wake" = "GPE0A_CNVI_PME_STS" @@ -238,7 +238,7 @@ chip soc/intel/apollolake end end end # - XHCI - device pci 15.1 on end # - XDCI + device pci 15.1 off end # - XDCI device pci 16.0 on end # - I2C 0 device pci 16.1 off end # - I2C 1 device pci 16.2 off end # - I2C 2 From e6caef4eeebee83795e9c71255c1337a99c67915 Mon Sep 17 00:00:00 2001 From: Matt DeVillier Date: Mon, 10 Oct 2022 19:03:49 -0500 Subject: [PATCH 067/137] mb/google/octopus: Use 2ch DMIC, not 4ch Change-Id: I3aaf188629b8487b2889597010dd934daa8e95f8 Signed-off-by: Matt DeVillier --- src/mainboard/google/octopus/Kconfig | 1 - src/mainboard/google/octopus/variants/baseboard/nhlt.c | 4 ---- 2 files changed, 5 deletions(-) diff --git a/src/mainboard/google/octopus/Kconfig b/src/mainboard/google/octopus/Kconfig index 88e37badf62..f00407d558e 100644 --- a/src/mainboard/google/octopus/Kconfig +++ b/src/mainboard/google/octopus/Kconfig @@ -159,7 +159,6 @@ config UART_FOR_CONSOLE config INCLUDE_NHLT_BLOBS bool "Include blobs for audio" select NHLT_DMIC_2CH_16B - select NHLT_DMIC_4CH_16B select NHLT_MAX98357 config DRIVER_TPM_SPI_BUS diff --git a/src/mainboard/google/octopus/variants/baseboard/nhlt.c b/src/mainboard/google/octopus/variants/baseboard/nhlt.c index 320e470c91c..89f16c7b465 100644 --- a/src/mainboard/google/octopus/variants/baseboard/nhlt.c +++ b/src/mainboard/google/octopus/variants/baseboard/nhlt.c @@ -14,10 +14,6 @@ void __weak variant_nhlt_init(struct nhlt *nhlt) if (!nhlt_soc_add_dmic_array(nhlt, 2)) printk(BIOS_INFO, "Added 2CH DMIC array.\n"); - /* 4 Channel DMIC array. */ - if (!nhlt_soc_add_dmic_array(nhlt, 4)) - printk(BIOS_INFO, "Added 4CH DMIC arrays.\n"); - /* * Headset codec is bi-directional but uses the same configuration * settings for render and capture endpoints. From da0b59d1af823356dff5252e9fc3f693e3560b72 Mon Sep 17 00:00:00 2001 From: Matt DeVillier Date: Mon, 10 Oct 2022 19:07:35 -0500 Subject: [PATCH 068/137] HACK: Nautilus disable camera ACPI for Windows Change-Id: If8fe0a1b8fc98717726eb3a967d946bd3596f777 Signed-off-by: Matt DeVillier --- .../variants/nautilus/include/variant/acpi/camera.asl | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/src/mainboard/google/poppy/variants/nautilus/include/variant/acpi/camera.asl b/src/mainboard/google/poppy/variants/nautilus/include/variant/acpi/camera.asl index ebc3c909e0d..0e87e19ccdd 100644 --- a/src/mainboard/google/poppy/variants/nautilus/include/variant/acpi/camera.asl +++ b/src/mainboard/google/poppy/variants/nautilus/include/variant/acpi/camera.asl @@ -1,6 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0-only */ -#include "ipu_mainboard.asl" -#include "ipu_endpoints.asl" -#include -#include "cam0.asl" +//#include "ipu_mainboard.asl" +//#include "ipu_endpoints.asl" +//#include +//#include "cam0.asl" From d14d31321a2c1beca87fb6d4b742c978f8750b23 Mon Sep 17 00:00:00 2001 From: Matt DeVillier Date: Tue, 18 Oct 2022 17:17:23 -0500 Subject: [PATCH 069/137] HACK: Nocturne disable camera ACPI for Windows Change-Id: I539e60eb20794e36b52c2c227157e9ae626ffcd3 Signed-off-by: Matt DeVillier --- .../variants/nocturne/include/variant/acpi/camera.asl | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/src/mainboard/google/poppy/variants/nocturne/include/variant/acpi/camera.asl b/src/mainboard/google/poppy/variants/nocturne/include/variant/acpi/camera.asl index 51b4ebc0460..86fdc2a4c84 100644 --- a/src/mainboard/google/poppy/variants/nocturne/include/variant/acpi/camera.asl +++ b/src/mainboard/google/poppy/variants/nocturne/include/variant/acpi/camera.asl @@ -1,6 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0-only */ -#include "ipu_mainboard.asl" -#include "ipu_endpoints.asl" -#include "cam0.asl" -#include "cam1.asl" +//#include "ipu_mainboard.asl" +//#include "ipu_endpoints.asl" +//#include "cam0.asl" +//#include "cam1.asl" From b2ab420f7ef4cf4370b5ed641b533bb0cb49ebfa Mon Sep 17 00:00:00 2001 From: Matt DeVillier Date: Tue, 18 Oct 2022 17:17:52 -0500 Subject: [PATCH 070/137] HACK: Soraka disable camera ACPI for Windows Change-Id: Iac12b0c00fa12da302901be7e1e1f3d310bdc756 Signed-off-by: Matt DeVillier --- .../poppy/variants/soraka/include/variant/acpi/camera.asl | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/mainboard/google/poppy/variants/soraka/include/variant/acpi/camera.asl b/src/mainboard/google/poppy/variants/soraka/include/variant/acpi/camera.asl index 318b0dea040..2b947038b77 100644 --- a/src/mainboard/google/poppy/variants/soraka/include/variant/acpi/camera.asl +++ b/src/mainboard/google/poppy/variants/soraka/include/variant/acpi/camera.asl @@ -1,3 +1,3 @@ /* SPDX-License-Identifier: GPL-2.0-only */ -#include +//#include From f7482b63038eebf3bfe30a4adc2dc2c8f732d203 Mon Sep 17 00:00:00 2001 From: Matt DeVillier Date: Tue, 15 Feb 2022 11:48:30 -0600 Subject: [PATCH 071/137] mb/google/volteer: Add ACPI brightness support Change-Id: Ic0c026ae09b3fde648db4bdeb4971423953c96a1 Signed-off-by: Matt DeVillier --- src/mainboard/google/volteer/dsdt.asl | 1 + src/mainboard/google/volteer/variants/baseboard/devicetree.cb | 4 +++- 2 files changed, 4 insertions(+), 1 deletion(-) diff --git a/src/mainboard/google/volteer/dsdt.asl b/src/mainboard/google/volteer/dsdt.asl index 4193d3d1e7f..eeaf61379fe 100644 --- a/src/mainboard/google/volteer/dsdt.asl +++ b/src/mainboard/google/volteer/dsdt.asl @@ -28,6 +28,7 @@ DefinitionBlock( #include #include #include + #include #if CONFIG(VARIANT_HAS_MIPI_CAMERA) #include #endif diff --git a/src/mainboard/google/volteer/variants/baseboard/devicetree.cb b/src/mainboard/google/volteer/variants/baseboard/devicetree.cb index 3a54d3b728f..267ba5f364f 100644 --- a/src/mainboard/google/volteer/variants/baseboard/devicetree.cb +++ b/src/mainboard/google/volteer/variants/baseboard/devicetree.cb @@ -357,7 +357,9 @@ chip soc/intel/tigerlake register "FastPkgCRampDisable" = "1" device domain 0 on - device ref igpu on end + device ref igpu on + register "gfx" = "GMA_DEFAULT_PANEL(0)" + end device ref dptf on # Default DPTF Policy for all Volteer boards if not overridden chip drivers/intel/dptf From 8304172293ddb95ad0062e09c8bf9809ec33c77f Mon Sep 17 00:00:00 2001 From: Matt DeVillier Date: Sun, 31 Jul 2022 16:38:38 -0500 Subject: [PATCH 072/137] mb/google/kahlee: Use LEVEL (vs EDGE) triggering for touchscreen IRQs Change-Id: I7475d7483d7e22e88785ff48eb6566f7fac5cc4d Signed-off-by: Matt DeVillier --- src/mainboard/google/kahlee/variants/aleena/overridetree.cb | 2 +- src/mainboard/google/kahlee/variants/careena/overridetree.cb | 2 +- src/mainboard/google/kahlee/variants/grunt/overridetree.cb | 2 +- src/mainboard/google/kahlee/variants/nuwani/overridetree.cb | 2 +- src/mainboard/google/kahlee/variants/treeya/overridetree.cb | 2 +- 5 files changed, 5 insertions(+), 5 deletions(-) diff --git a/src/mainboard/google/kahlee/variants/aleena/overridetree.cb b/src/mainboard/google/kahlee/variants/aleena/overridetree.cb index c5d484bdc2f..7701d112527 100644 --- a/src/mainboard/google/kahlee/variants/aleena/overridetree.cb +++ b/src/mainboard/google/kahlee/variants/aleena/overridetree.cb @@ -51,7 +51,7 @@ chip soc/amd/stoneyridge register "hid" = ""RAYD0001"" register "desc" = ""Raydium Touchscreen"" register "detect" = "1" - register "irq_gpio" = "ACPI_GPIO_IRQ_EDGE_LOW(GPIO_11)" + register "irq_gpio" = "ACPI_GPIO_IRQ_LEVEL_LOW(GPIO_11)" register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPIO_85)" register "reset_delay_ms" = "20" register "enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPIO_76)" diff --git a/src/mainboard/google/kahlee/variants/careena/overridetree.cb b/src/mainboard/google/kahlee/variants/careena/overridetree.cb index 666373f1bcb..c9b3036c1d3 100644 --- a/src/mainboard/google/kahlee/variants/careena/overridetree.cb +++ b/src/mainboard/google/kahlee/variants/careena/overridetree.cb @@ -60,7 +60,7 @@ chip soc/amd/stoneyridge register "hid" = ""RAYD0001"" register "desc" = ""Raydium Touchscreen"" register "detect" = "1" - register "irq_gpio" = "ACPI_GPIO_IRQ_EDGE_LOW(GPIO_11)" + register "irq_gpio" = "ACPI_GPIO_IRQ_LEVEL_LOW(GPIO_11)" register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPIO_85)" register "reset_delay_ms" = "20" register "enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPIO_76)" diff --git a/src/mainboard/google/kahlee/variants/grunt/overridetree.cb b/src/mainboard/google/kahlee/variants/grunt/overridetree.cb index 0b155c5a7b7..e1e1402b6e0 100644 --- a/src/mainboard/google/kahlee/variants/grunt/overridetree.cb +++ b/src/mainboard/google/kahlee/variants/grunt/overridetree.cb @@ -39,7 +39,7 @@ chip soc/amd/stoneyridge register "hid" = ""RAYD0001"" register "desc" = ""Raydium Touchscreen"" register "detect" = "1" - register "irq_gpio" = "ACPI_GPIO_IRQ_EDGE_LOW(GPIO_11)" + register "irq_gpio" = "ACPI_GPIO_IRQ_LEVEL_LOW(GPIO_11)" register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPIO_85)" register "reset_delay_ms" = "20" register "enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPIO_76)" diff --git a/src/mainboard/google/kahlee/variants/nuwani/overridetree.cb b/src/mainboard/google/kahlee/variants/nuwani/overridetree.cb index 74ab535ea3b..41304dad86a 100644 --- a/src/mainboard/google/kahlee/variants/nuwani/overridetree.cb +++ b/src/mainboard/google/kahlee/variants/nuwani/overridetree.cb @@ -88,7 +88,7 @@ chip soc/amd/stoneyridge register "hid" = ""RAYD0001"" register "desc" = ""Raydium Touchscreen"" register "detect" = "1" - register "irq_gpio" = "ACPI_GPIO_IRQ_EDGE_LOW(GPIO_11)" + register "irq_gpio" = "ACPI_GPIO_IRQ_LEVEL_LOW(GPIO_11)" register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPIO_85)" register "reset_delay_ms" = "20" register "enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPIO_76)" diff --git a/src/mainboard/google/kahlee/variants/treeya/overridetree.cb b/src/mainboard/google/kahlee/variants/treeya/overridetree.cb index 5c705246d83..fc38c699e74 100644 --- a/src/mainboard/google/kahlee/variants/treeya/overridetree.cb +++ b/src/mainboard/google/kahlee/variants/treeya/overridetree.cb @@ -93,7 +93,7 @@ chip soc/amd/stoneyridge register "hid" = ""RAYD0001"" register "desc" = ""Raydium Touchscreen"" register "detect" = "1" - register "irq_gpio" = "ACPI_GPIO_IRQ_EDGE_LOW(GPIO_11)" + register "irq_gpio" = "ACPI_GPIO_IRQ_LEVEL_LOW(GPIO_11)" register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPIO_85)" register "reset_delay_ms" = "20" register "enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPIO_76)" From fa16862053e49131bd78f7cdca4a61c09b02d4f8 Mon Sep 17 00:00:00 2001 From: Matt DeVillier Date: Mon, 19 Dec 2022 16:16:53 -0600 Subject: [PATCH 073/137] mb/google/kahlee: Drop TP wake register Causes Windows to BSOD Change-Id: I9052572ae71d650c27f65a495b0d1bf79289f2d1 Signed-off-by: Matt DeVillier --- src/mainboard/google/kahlee/variants/aleena/overridetree.cb | 1 - src/mainboard/google/kahlee/variants/baseboard/devicetree.cb | 1 - src/mainboard/google/kahlee/variants/liara/overridetree.cb | 1 - src/mainboard/google/kahlee/variants/nuwani/overridetree.cb | 1 - src/mainboard/google/kahlee/variants/treeya/overridetree.cb | 1 - 5 files changed, 5 deletions(-) diff --git a/src/mainboard/google/kahlee/variants/aleena/overridetree.cb b/src/mainboard/google/kahlee/variants/aleena/overridetree.cb index 7701d112527..d019dba7cde 100644 --- a/src/mainboard/google/kahlee/variants/aleena/overridetree.cb +++ b/src/mainboard/google/kahlee/variants/aleena/overridetree.cb @@ -40,7 +40,6 @@ chip soc/amd/stoneyridge register "generic.cid" = ""ACPI0C50"" register "generic.desc" = ""Synaptics Touchpad"" register "generic.irq_gpio" = "ACPI_GPIO_IRQ_LEVEL_LOW(GPIO_5)" - register "generic.wake" = "7" register "generic.detect" = "1" register "hid_desc_reg_offset" = "0x20" device i2c 2c on end diff --git a/src/mainboard/google/kahlee/variants/baseboard/devicetree.cb b/src/mainboard/google/kahlee/variants/baseboard/devicetree.cb index 632ffa3e9a2..1420c27bd72 100644 --- a/src/mainboard/google/kahlee/variants/baseboard/devicetree.cb +++ b/src/mainboard/google/kahlee/variants/baseboard/devicetree.cb @@ -78,7 +78,6 @@ chip soc/amd/stoneyridge register "hid" = ""ELAN0000"" register "desc" = ""ELAN Touchpad"" register "irq_gpio" = "ACPI_GPIO_IRQ_LEVEL_LOW(GPIO_5)" - register "wake" = "7" register "detect" = "1" device i2c 15 on end end diff --git a/src/mainboard/google/kahlee/variants/liara/overridetree.cb b/src/mainboard/google/kahlee/variants/liara/overridetree.cb index b5256b52149..269dcc999e9 100644 --- a/src/mainboard/google/kahlee/variants/liara/overridetree.cb +++ b/src/mainboard/google/kahlee/variants/liara/overridetree.cb @@ -45,7 +45,6 @@ chip soc/amd/stoneyridge register "generic.cid" = ""ACPI0C50"" register "generic.desc" = ""Synaptics Touchpad"" register "generic.irq_gpio" = "ACPI_GPIO_IRQ_LEVEL_LOW(GPIO_5)" - register "generic.wake" = "7" register "generic.detect" = "1" register "hid_desc_reg_offset" = "0x20" device i2c 2c on end diff --git a/src/mainboard/google/kahlee/variants/nuwani/overridetree.cb b/src/mainboard/google/kahlee/variants/nuwani/overridetree.cb index 41304dad86a..157ab9842af 100644 --- a/src/mainboard/google/kahlee/variants/nuwani/overridetree.cb +++ b/src/mainboard/google/kahlee/variants/nuwani/overridetree.cb @@ -53,7 +53,6 @@ chip soc/amd/stoneyridge register "generic.cid" = ""ACPI0C50"" register "generic.desc" = ""Synaptics Touchpad"" register "generic.irq_gpio" = "ACPI_GPIO_IRQ_LEVEL_LOW(GPIO_5)" - register "generic.wake" = "7" register "generic.detect" = "1" register "hid_desc_reg_offset" = "0x20" device i2c 0x2c on end diff --git a/src/mainboard/google/kahlee/variants/treeya/overridetree.cb b/src/mainboard/google/kahlee/variants/treeya/overridetree.cb index fc38c699e74..e080eb24ffd 100644 --- a/src/mainboard/google/kahlee/variants/treeya/overridetree.cb +++ b/src/mainboard/google/kahlee/variants/treeya/overridetree.cb @@ -70,7 +70,6 @@ chip soc/amd/stoneyridge register "generic.cid" = ""ACPI0C50"" register "generic.desc" = ""Synaptics Touchpad"" register "generic.irq_gpio" = "ACPI_GPIO_IRQ_LEVEL_LOW(GPIO_5)" - register "generic.wake" = "7" register "generic.detect" = "1" register "hid_desc_reg_offset" = "0x20" device i2c 0x2c on end From 587c8d0a1809e0338d70a7a1afb736fbc7fcb5b4 Mon Sep 17 00:00:00 2001 From: Matt DeVillier Date: Sun, 31 Jul 2022 17:24:08 -0500 Subject: [PATCH 074/137] [HACK] Fix Stoneyridge ACPI for Windows Change-Id: Ie96c99dde0303c89e98a5f972d27d09c40a65228 Signed-off-by: Matt DeVillier --- src/soc/amd/stoneyridge/acpi/northbridge.asl | 2 +- src/soc/amd/stoneyridge/acpi/pci_int.asl | 71 -------------------- src/soc/amd/stoneyridge/acpi/sb_pci0_fch.asl | 9 ++- 3 files changed, 5 insertions(+), 77 deletions(-) diff --git a/src/soc/amd/stoneyridge/acpi/northbridge.asl b/src/soc/amd/stoneyridge/acpi/northbridge.asl index 7ed622541f6..c47b7b78429 100644 --- a/src/soc/amd/stoneyridge/acpi/northbridge.asl +++ b/src/soc/amd/stoneyridge/acpi/northbridge.asl @@ -15,7 +15,7 @@ Method(_BBN, 0, NotSerialized) /* Bus number = 0 */ Method(_STA, 0, NotSerialized) { - Return(0x0B) /* Status is visible */ + Return(0x0F) /* Status is visible */ } Method(_PRT,0, NotSerialized) diff --git a/src/soc/amd/stoneyridge/acpi/pci_int.asl b/src/soc/amd/stoneyridge/acpi/pci_int.asl index e905c9738c2..13885344320 100644 --- a/src/soc/amd/stoneyridge/acpi/pci_int.asl +++ b/src/soc/amd/stoneyridge/acpi/pci_int.asl @@ -30,77 +30,6 @@ P92E, 1, /* Port92 decode enable */ } - OperationRegion(SB5, SystemMemory, STB5, 0x1000) - Field(SB5, AnyAcc, NoLock, Preserve){ - /* Port 0 */ - Offset(0x120), /* Port 0 Task file status */ - P0ER, 1, - , 2, - P0DQ, 1, - , 3, - P0BY, 1, - Offset(0x128), /* Port 0 Serial ATA status */ - P0DD, 4, - , 4, - P0IS, 4, - Offset(0x12c), /* Port 0 Serial ATA control */ - P0DI, 4, - Offset(0x130), /* Port 0 Serial ATA error */ - , 16, - P0PR, 1, - - /* Port 1 */ - offset(0x1a0), /* Port 1 Task file status */ - P1ER, 1, - , 2, - P1DQ, 1, - , 3, - P1BY, 1, - Offset(0x1a8), /* Port 1 Serial ATA status */ - P1DD, 4, - , 4, - P1IS, 4, - Offset(0x1ac), /* Port 1 Serial ATA control */ - P1DI, 4, - Offset(0x1b0), /* Port 1 Serial ATA error */ - , 16, - P1PR, 1, - - /* Port 2 */ - Offset(0x220), /* Port 2 Task file status */ - P2ER, 1, - , 2, - P2DQ, 1, - , 3, - P2BY, 1, - Offset(0x228), /* Port 2 Serial ATA status */ - P2DD, 4, - , 4, - P2IS, 4, - Offset(0x22c), /* Port 2 Serial ATA control */ - P2DI, 4, - Offset(0x230), /* Port 2 Serial ATA error */ - , 16, - P2PR, 1, - - /* Port 3 */ - Offset(0x2a0), /* Port 3 Task file status */ - P3ER, 1, - , 2, - P3DQ, 1, - , 3, - P3BY, 1, - Offset(0x2a8), /* Port 3 Serial ATA status */ - P3DD, 4, - , 4, - P3IS, 4, - Offset(0x2aC), /* Port 3 Serial ATA control */ - P3DI, 4, - Offset(0x2b0), /* Port 3 Serial ATA error */ - , 16, - P3PR, 1, - } - Name(IRQB, ResourceTemplate(){ IRQ(Level,ActiveLow,Shared){15} }) diff --git a/src/soc/amd/stoneyridge/acpi/sb_pci0_fch.asl b/src/soc/amd/stoneyridge/acpi/sb_pci0_fch.asl index 6a7ed2ea429..39cac3d4efc 100644 --- a/src/soc/amd/stoneyridge/acpi/sb_pci0_fch.asl +++ b/src/soc/amd/stoneyridge/acpi/sb_pci0_fch.asl @@ -99,17 +99,16 @@ Method(_CRS, 0) { CreateDWordField(CRES, ^MMIO._LEN, MM1L) /* - * Declare memory between TOM1 and 4GB as available + * Declare memory between TOM1 and 0xFED40000 as available * for PCI MMIO. * Use ShiftLeft to avoid 64bit constant (for XP). * This will work even if the OS does 32bit arithmetic, as * 32bit (0x00000000 - TOM1) will wrap and give the same * result as 64bit (0x100000000 - TOM1). */ - MM1B = TOM1 - Local0 = 0x10000000 << 4 - Local0 -= TOM1 - MM1L = Local0 + Store(TOM1, MM1B) + Subtract(0xFED40000, TOM1, Local0) + Store(Local0, MM1L) Return (CRES) /* note to change the Name buffer */ } /* end of Method(_SB.PCI0._CRS) */ From 216924757303f8c4371645caa5611b15688d4c20 Mon Sep 17 00:00:00 2001 From: Matt DeVillier Date: Fri, 3 Jun 2022 11:22:25 -0500 Subject: [PATCH 075/137] mb/google/zork: don't declare EC_ENABLE_WAKE_PIN Change-Id: I11f20539795409723375555a4163f849b4c9f1d5 Signed-off-by: Matt DeVillier --- .../google/zork/variants/baseboard/include/baseboard/ec.h | 1 - 1 file changed, 1 deletion(-) diff --git a/src/mainboard/google/zork/variants/baseboard/include/baseboard/ec.h b/src/mainboard/google/zork/variants/baseboard/include/baseboard/ec.h index 5c767aacc50..c73359cdf73 100644 --- a/src/mainboard/google/zork/variants/baseboard/include/baseboard/ec.h +++ b/src/mainboard/google/zork/variants/baseboard/include/baseboard/ec.h @@ -53,7 +53,6 @@ /* Enable LID switch */ #define EC_ENABLE_LID_SWITCH -#define EC_ENABLE_WAKE_PIN EC_WAKE_GPI /* Enable EC backed PD MCU device in ACPI */ #define EC_ENABLE_PD_MCU_DEVICE From 52a11c7516556c975963b1c97d207c9cffe2a946 Mon Sep 17 00:00:00 2001 From: Matt DeVillier Date: Fri, 3 Jun 2022 11:22:48 -0500 Subject: [PATCH 076/137] mb/google/zork: don't enable wake pin on WiFi Change-Id: Iad45589ed2a8a2b7b9832c16589c6cea052423a7 Signed-off-by: Matt DeVillier --- .../google/zork/variants/baseboard/devicetree_dalboz.cb | 2 +- .../google/zork/variants/baseboard/devicetree_trembyle.cb | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/src/mainboard/google/zork/variants/baseboard/devicetree_dalboz.cb b/src/mainboard/google/zork/variants/baseboard/devicetree_dalboz.cb index 68eb6ea5887..382c6b7c16f 100644 --- a/src/mainboard/google/zork/variants/baseboard/devicetree_dalboz.cb +++ b/src/mainboard/google/zork/variants/baseboard/devicetree_dalboz.cb @@ -249,7 +249,7 @@ chip soc/amd/picasso device ref iommu on end device ref gpp_bridge_1 on # Wifi chip drivers/wifi/generic - register "wake" = "GEVENT_8" + #register "wake" = "GEVENT_8" device pci 00.0 on end end end diff --git a/src/mainboard/google/zork/variants/baseboard/devicetree_trembyle.cb b/src/mainboard/google/zork/variants/baseboard/devicetree_trembyle.cb index 4bb42dea1c9..e2834aaab2e 100644 --- a/src/mainboard/google/zork/variants/baseboard/devicetree_trembyle.cb +++ b/src/mainboard/google/zork/variants/baseboard/devicetree_trembyle.cb @@ -247,7 +247,7 @@ chip soc/amd/picasso device ref iommu on end device ref gpp_bridge_1 on # Wifi chip drivers/wifi/generic - register "wake" = "GEVENT_8" + #register "wake" = "GEVENT_8" device pci 00.0 on end end end From 69eb52ae1eeda57ff8d41132e32c885ac28b0ca4 Mon Sep 17 00:00:00 2001 From: Matt DeVillier Date: Fri, 3 Jun 2022 11:24:13 -0500 Subject: [PATCH 077/137] WIP mb/google/zork: adjust TP/TS ACPI Change-Id: I77befb4967238a2b78ab589897289d5f7d00f5fc Signed-off-by: Matt DeVillier --- src/mainboard/google/zork/variants/dalboz/overridetree.cb | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/src/mainboard/google/zork/variants/dalboz/overridetree.cb b/src/mainboard/google/zork/variants/dalboz/overridetree.cb index e3a1f51f77d..3cb24e7d15b 100644 --- a/src/mainboard/google/zork/variants/dalboz/overridetree.cb +++ b/src/mainboard/google/zork/variants/dalboz/overridetree.cb @@ -47,7 +47,7 @@ chip soc/amd/picasso register "hid" = ""RAYD0001"" register "desc" = ""Raydium Touchscreen"" register "detect" = "1" - register "irq_gpio" = "ACPI_GPIO_IRQ_EDGE_LOW(GPIO_12)" + register "irq_gpio" = "ACPI_GPIO_IRQ_LEVEL_LOW(GPIO_12)" register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPIO_140)" # 32ms: Rise time of the reset line # 20ms: Firmware ready time @@ -59,7 +59,7 @@ chip soc/amd/picasso register "hid" = ""ELAN0001"" register "desc" = ""ELAN Touchscreen"" register "detect" = "1" - register "irq_gpio" = "ACPI_GPIO_IRQ_EDGE_LOW(GPIO_12)" + register "irq_gpio" = "ACPI_GPIO_IRQ_LEVEL_LOW(GPIO_12)" register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPIO_140)" register "reset_delay_ms" = "20" register "has_power_resource" = "1" From 76cad9d79955381e4753f31095307ce710caf8f1 Mon Sep 17 00:00:00 2001 From: Matt DeVillier Date: Sun, 3 Jul 2022 19:01:41 -0500 Subject: [PATCH 078/137] ec/google/chromeec: unhide GOOG0004 ACPI device Allows coolstar's Windows drivers for kblight to attach Change-Id: I3e9578f1ef18b3bebb93a9ae2ae4e27bc38f648d Signed-off-by: Matt DeVillier --- src/ec/google/chromeec/acpi/cros_ec.asl | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/ec/google/chromeec/acpi/cros_ec.asl b/src/ec/google/chromeec/acpi/cros_ec.asl index 5a9541349b5..adf8d90d8cb 100644 --- a/src/ec/google/chromeec/acpi/cros_ec.asl +++ b/src/ec/google/chromeec/acpi/cros_ec.asl @@ -53,7 +53,7 @@ Device (CREC) #endif Method(_STA, 0) { - Return (0xB) + Return (0xF) } #if CONFIG(DRIVERS_ACPI_THERMAL_ZONE) From 025cbc19784a199674de7b73b1f245b6b6e79bd3 Mon Sep 17 00:00:00 2001 From: Matt DeVillier Date: Wed, 13 Jul 2022 16:44:03 -0500 Subject: [PATCH 079/137] ec/google/chromeec: Hack KBLT for coolstar's Windows driver coolstar's Windows driver needs KBLT under CREC, so the EC driver loads first / KBLT is a dependent of CREC, but doesn't use the KBQC/KBCM methods. The Linux driver needs KBLT directly under _SB. Hack the driver to hell to make everyone happy. Change-Id: I0ef5d6998b65d5aa7f6e8337f886ab88f178c75b Signed-off-by: Matt DeVillier --- .../chromeec/acpi/keyboard_backlight.asl | 23 ++++++++++++++++++- 1 file changed, 22 insertions(+), 1 deletion(-) diff --git a/src/ec/google/chromeec/acpi/keyboard_backlight.asl b/src/ec/google/chromeec/acpi/keyboard_backlight.asl index b6f9e6da84b..ec8fe2636ba 100644 --- a/src/ec/google/chromeec/acpi/keyboard_backlight.asl +++ b/src/ec/google/chromeec/acpi/keyboard_backlight.asl @@ -1,6 +1,7 @@ /* SPDX-License-Identifier: GPL-2.0-only */ -Scope (\_SB) +/* Scope modified for coolstar's Windows driver */ +Scope (\_SB.PCI0.LPCB.EC0.CREC) { /* * Chrome EC Keyboard Backlight interface @@ -17,6 +18,26 @@ Scope (\_SB) */ Return (0xf) } + } +} + +Scope (\_SB) +{ + /* + * Stub for linux driver which hardcodes location + */ + Device (KBLT) + { + Name (_HID, "GOOG0002") +#ifdef CONFIG_ACPI_SUBSYSTEM_ID + Name (_SUB, CONFIG_ACPI_SUBSYSTEM_ID) +#endif + Name (_UID, 1) + + Method (_STA, 0, NotSerialized) + { + Return (0x0) + } /* Read current backlight value */ Method (KBQC, 0, NotSerialized) From f60908febad7124289f5999dab3bb4b3294f1c2a Mon Sep 17 00:00:00 2001 From: Matt DeVillier Date: Wed, 13 Jul 2022 17:55:05 -0500 Subject: [PATCH 080/137] ec/google/chromeec: drop SYNC IRQ for CREC device Breaks coolstar's Windows driver, not used by Linux Change-Id: I5d05b9fae7e04b3714862ed905e9143fb6f9c629 Signed-off-by: Matt DeVillier --- src/ec/google/chromeec/acpi/cros_ec.asl | 21 --------------------- 1 file changed, 21 deletions(-) diff --git a/src/ec/google/chromeec/acpi/cros_ec.asl b/src/ec/google/chromeec/acpi/cros_ec.asl index adf8d90d8cb..c43ce45f350 100644 --- a/src/ec/google/chromeec/acpi/cros_ec.asl +++ b/src/ec/google/chromeec/acpi/cros_ec.asl @@ -9,27 +9,6 @@ Device (CREC) Name (_PRW, Package () { EC_ENABLE_WAKE_PIN, 0x5 }) #endif -#ifdef EC_ENABLE_SYNC_IRQ - Name (_CRS, ResourceTemplate () - { - Interrupt (ResourceConsumer, Level, ActiveLow, Exclusive) - { - EC_SYNC_IRQ - } - }) -#endif - -#ifdef EC_ENABLE_SYNC_IRQ_GPIO - Name (_CRS, ResourceTemplate () - { - GpioInt (Level, ActiveLow, Exclusive, PullDefault, 0x0000, - "\\_SB.GPIO", 0x00, ResourceConsumer, ,) - { - EC_SYNC_IRQ - } - }) -#endif - #ifdef EC_ENABLE_MKBP_DEVICE Device (CKSC) { From 2b5ab27f0d2f33c18ef0113335c4d95b1c5ec389 Mon Sep 17 00:00:00 2001 From: Matt DeVillier Date: Thu, 18 Aug 2022 18:05:54 -0500 Subject: [PATCH 081/137] payloads/edk2: Add support for passing VBT/GOP driver to edk2 Add Kconfig for passing a VBT file and GOP driver to edk2, and pass a build param to use them along with the platform GOP driver, instead of the default GOP framebuffer driver. Change-Id: I63a49df2411fe44b06eaee6d0fb9aab42ac8aedb Signed-off-by: Matt DeVillier --- payloads/external/Makefile.inc | 6 ++++++ payloads/external/edk2/Kconfig | 17 +++++++++++++++++ payloads/external/edk2/Makefile | 9 +++++++++ 3 files changed, 32 insertions(+) diff --git a/payloads/external/Makefile.inc b/payloads/external/Makefile.inc index a2d2f505e23..6a03a5100b8 100644 --- a/payloads/external/Makefile.inc +++ b/payloads/external/Makefile.inc @@ -185,6 +185,9 @@ $(obj)/UEFIPAYLOAD.fd: $(DOTCONFIG) CONFIG_ECAM_MMCONF_LENGTH=$(CONFIG_ECAM_MMCONF_LENGTH) \ CONFIG_CPU_XTAL_HZ=$(CONFIG_CPU_XTAL_HZ) \ CONFIG_SMMSTORE_V2=$(CONFIG_SMMSTORE_v2) \ + CONFIG_EDK2_GOP_DRIVER=$(CONFIG_EDK2_GOP_DRIVER) \ + CONFIG_EDK2_GOP_FILE=$(CONFIG_EDK2_GOP_FILE) \ + CONFIG_EDK2_VBT_FILE=$(CONFIG_INTEL_GMA_VBT_FILE) \ GCC_CC_x86_32=$(GCC_CC_x86_32) \ GCC_CC_x86_64=$(GCC_CC_x86_64) \ GCC_CC_arm=$(GCC_CC_arm) \ @@ -226,6 +229,9 @@ $(obj)/ShimmedUniversalPayload.elf: $(DOTCONFIG) CONFIG_ECAM_MMCONF_LENGTH=$(CONFIG_ECAM_MMCONF_LENGTH) \ CONFIG_CPU_XTAL_HZ=$(CONFIG_CPU_XTAL_HZ) \ CONFIG_SMMSTORE_V2=$(CONFIG_SMMSTORE_v2) \ + CONFIG_EDK2_GOP_DRIVER=$(CONFIG_EDK2_GOP_DRIVER) \ + CONFIG_EDK2_GOP_FILE=$(CONFIG_EDK2_GOP_FILE) \ + CONFIG_EDK2_VBT_FILE=$(CONFIG_INTEL_GMA_VBT_FILE) \ GCC_CC_x86_32=$(GCC_CC_x86_32) \ GCC_CC_x86_64=$(GCC_CC_x86_64) \ GCC_CC_arm=$(GCC_CC_arm) \ diff --git a/payloads/external/edk2/Kconfig b/payloads/external/edk2/Kconfig index 454aef0069b..d6c5d91b8db 100644 --- a/payloads/external/edk2/Kconfig +++ b/payloads/external/edk2/Kconfig @@ -218,6 +218,23 @@ config EDK2_SERIAL_SUPPORT Enable serial port output in edk2. Serial output limits the performance of edk2's FrontPage. +config EDK2_GOP_DRIVER + bool "Add a GOP driver to the Tianocore build" + depends on INTEL_GMA_ADD_VBT + +config EDK2_GOP_FILE + string "GOP driver file" + depends on EDK2_GOP_DRIVER + default "3rdparty/blobs/soc/intel/bdw/IntelGopDriver.efi" if NORTHBRIDGE_INTEL_HASWELL || SOC_INTEL_BROADWELL + default "3rdparty/blobs/soc/intel/byt/IntelGopDriver.efi" if SOC_INTEL_BAYTRAIL + default "3rdparty/blobs/soc/intel/bsw/IntelGopDriver.efi" if SOC_INTEL_BRASWELL + default "3rdparty/blobs/soc/intel/kbl/IntelGopDriver.efi" if SOC_INTEL_SKYLAKE || SOC_INTEL_KABYLAKE + default "3rdparty/blobs/soc/intel/glk/IntelGopDriver.efi" if SOC_INTEL_GEMINILAKE + default "3rdparty/blobs/soc/intel/apl/IntelGopDriver.efi" if SOC_INTEL_APOLLOLAKE + default "3rdparty/blobs/soc/intel/cml/IntelGopDriver.efi" if SOC_INTEL_COMETLAKE || SOC_INTEL_WHISKEYLAKE + default "3rdparty/blobs/soc/intel/tgl/IntelGopDriver.efi" if SOC_INTEL_TIGERLAKE + default "IntelGopDriver.efi" + config EDK2_CUSTOM_BUILD_PARAMS string "edk2 additional custom build parameters" default "-D VARIABLE_SUPPORT=SMMSTORE" if EDK2_REPO_MRCHROMEBOX && SMMSTORE_V2 diff --git a/payloads/external/edk2/Makefile b/payloads/external/edk2/Makefile index 27ce4a9507a..be0bf7a37be 100644 --- a/payloads/external/edk2/Makefile +++ b/payloads/external/edk2/Makefile @@ -96,6 +96,10 @@ endif ifneq ($(CONFIG_EDK2_SD_MMC_TIMEOUT),) BUILD_STR += -D SD_MMC_TIMEOUT=$(shell echo $$(( $(CONFIG_EDK2_SD_MMC_TIMEOUT) * 1000)) ) endif +# GOP_DRIVER = FALSE +ifeq ($(CONFIG_EDK2_GOP_DRIVER), y) +BUILD_STR += -D USE_PLATFORM_GOP=TRUE +endif # # EDKII has the below PCDs that are relevant to coreboot: @@ -189,6 +193,11 @@ print: prep: $(EDK2_PATH) clean checktools logo cd $(WORKSPACE); \ + if [ -n "$(CONFIG_EDK2_GOP_DRIVER)" ]; then \ + echo "Using GOP driver $(CONFIG_EDK2_GOP_FILE)"; \ + cp $(top)/$(CONFIG_EDK2_GOP_FILE) $(EDK2_PATH)/UefiPayloadPkg/IntelGopDriver.efi; \ + cp $(top)/$(CONFIG_EDK2_VBT_FILE) $(EDK2_PATH)/UefiPayloadPkg/vbt.bin; \ + fi; \ source $(EDK2_PATH)/edksetup.sh; \ unset CC; $(MAKE) -C $(EDK2_PATH)/BaseTools 2>&1; \ grep -q "COREBOOT" $(EDK2_PATH)/Conf/tools_def.txt; \ From ff95d6bc9204f4e0ad38ce14a3c2f3f22e7be9b8 Mon Sep 17 00:00:00 2001 From: Matt DeVillier Date: Thu, 13 Jan 2022 15:39:06 -0600 Subject: [PATCH 082/137] payloads/ext/tianocore: fix up Kconfig defaults set some defaults Change-Id: I3e6f364c7dd0a11171754729a72f75d252105241 Signed-off-by: Matt DeVillier --- payloads/Kconfig | 2 +- payloads/external/edk2/Kconfig | 14 +++++++------- 2 files changed, 8 insertions(+), 8 deletions(-) diff --git a/payloads/Kconfig b/payloads/Kconfig index 2a2773a2188..a1dc5961383 100644 --- a/payloads/Kconfig +++ b/payloads/Kconfig @@ -14,7 +14,7 @@ config PAYLOAD_NONE if !PAYLOAD_NONE choice prompt "Payload to add" - default PAYLOAD_SEABIOS if ARCH_X86 + default PAYLOAD_EDK2 if ARCH_X86 config PAYLOAD_ELF bool "An ELF executable payload" diff --git a/payloads/external/edk2/Kconfig b/payloads/external/edk2/Kconfig index d6c5d91b8db..458708e91ba 100644 --- a/payloads/external/edk2/Kconfig +++ b/payloads/external/edk2/Kconfig @@ -53,7 +53,7 @@ config EDK2_REPOSITORY config EDK2_TAG_OR_REV string "Insert a commit's SHA-1 or a branch name" - default "origin/uefipayload_202207" if EDK2_REPO_MRCHROMEBOX + default "origin/upp_202301" if EDK2_REPO_MRCHROMEBOX default "origin/master" if EDK2_REPO_OFFICIAL default "" if EDK2_REPO_CUSTOM help @@ -134,7 +134,7 @@ config EDK2_BOOTSPLASH_FILE config EDK2_BOOT_MANAGER_ESCAPE bool "Use Escape key for Boot Manager" - default n + default y help Use Escape as the hot-key to access the Boot Manager. This replaces the default key of F2. @@ -171,7 +171,7 @@ config EDK2_CPU_TIMER_LIB config EDK2_FOLLOW_BGRT_SPEC bool "Center logo 38.2% from the top of screen" - default n + default y help Follow the BGRT Specification implemented by Microsoft and the Boot Logo 38.2% will be vertically centered 38.2% from @@ -179,11 +179,11 @@ config EDK2_FOLLOW_BGRT_SPEC config EDK2_FULL_SCREEN_SETUP bool "Use the full screen for the edk2 frontpage" - default y + default n help Allow edk2 to use the full screen to display the frontpage - (aka "Boot Menu"). With this option disable, it will be - limited to 640x480. + (aka "Boot Menu"). With this option disabled, it will be + limited to ~1024x768. config EDK2_HAVE_EFI_SHELL bool "Include EFI Shell" @@ -237,7 +237,7 @@ config EDK2_GOP_FILE config EDK2_CUSTOM_BUILD_PARAMS string "edk2 additional custom build parameters" - default "-D VARIABLE_SUPPORT=SMMSTORE" if EDK2_REPO_MRCHROMEBOX && SMMSTORE_V2 + default "-D VARIABLE_SUPPORT=SMMSTORE" if EDK2_REPO_MRCHROMEBOX && SMMSTORE_V2 && !SOC_AMD_PICASSO help edk2 has build options that are not modified by coreboot, and these can be found in `UefiPayloadPkg/UefiPayloadPkg.dsc`. Forks may also support From bf69837c665c05c7b672143e683fb6f86c1d1f3e Mon Sep 17 00:00:00 2001 From: Matt DeVillier Date: Sat, 15 Oct 2022 11:52:54 -0500 Subject: [PATCH 083/137] src/acpi/acpi.c: make BOOT0000 APCI device visible to OS Change-Id: I545ce43d4337dd71afedda6bc9208a8c3bf158ee Signed-off-by: Matt DeVillier --- src/acpi/acpi.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/acpi/acpi.c b/src/acpi/acpi.c index 04a59b17674..6facca19a3a 100644 --- a/src/acpi/acpi.c +++ b/src/acpi/acpi.c @@ -476,7 +476,7 @@ static void acpi_ssdt_write_cbtable(void) acpigen_write_device("CTBL"); acpigen_write_coreboot_hid(COREBOOT_ACPI_ID_CBTABLE); acpigen_write_name_integer("_UID", 0); - acpigen_write_STA(ACPI_STATUS_DEVICE_HIDDEN_ON); + acpigen_write_STA(ACPI_STATUS_DEVICE_ALL_ON); acpigen_write_name("_CRS"); acpigen_write_resourcetemplate_header(); acpigen_write_mem32fixed(0, base, size); From d1b668622c79154f77573a38ce2e5687d64a5268 Mon Sep 17 00:00:00 2001 From: Matt DeVillier Date: Mon, 17 Oct 2022 08:56:05 -0500 Subject: [PATCH 084/137] HACK: Wilco EC WIP Change-Id: Iedd68334a7b6bb2d20481bcc9f1cdf5502fc510f Signed-off-by: Matt DeVillier --- src/ec/google/wilco/acpi/battery.asl | 75 +--------------------------- src/ec/google/wilco/chip.c | 15 ++++++ src/ec/google/wilco/commands.h | 6 +++ src/ec/google/wilco/ec.h | 13 +++++ 4 files changed, 35 insertions(+), 74 deletions(-) diff --git a/src/ec/google/wilco/acpi/battery.asl b/src/ec/google/wilco/acpi/battery.asl index 2ead4c8b817..ac7fdce3e36 100644 --- a/src/ec/google/wilco/acpi/battery.asl +++ b/src/ec/google/wilco/acpi/battery.asl @@ -260,80 +260,7 @@ Device (BAT0) Method (_STA, 0, Serialized) { - Return (ESTA (^_UID)) - } - - Method (_BST, 0, Serialized) - { - Return (EBST (^_UID, PBST)) - } - - Method (_BIF, 0, Serialized) - { - Return (EBIF (^_UID, PBIF)) - } - - Method (_BIX, 0, Serialized) - { - Return (EBIX (^_UID, PBIX)) - } -} - -Device (BAT1) -{ - Name (_HID, EisaId ("PNP0C0A")) - Name (_UID, 2) - Name (_PCL, Package () { \_SB }) - - Name (PBIF, Package () { - 0x00000001, /* 0x00: Power Unit: mAh */ - 0xFFFFFFFF, /* 0x01: Design Capacity */ - 0xFFFFFFFF, /* 0x02: Last Full Charge Capacity */ - 0x00000001, /* 0x03: Battery Technology: Rechargeable */ - 0xFFFFFFFF, /* 0x04: Design Voltage */ - 0x00000003, /* 0x05: Design Capacity of Warning */ - 0xFFFFFFFF, /* 0x06: Design Capacity of Low */ - 0x00000001, /* 0x07: Capacity Granularity 1 */ - 0x00000001, /* 0x08: Capacity Granularity 2 */ - "", /* 0x09: Model Number */ - "", /* 0x0a: Serial Number */ - "LION", /* 0x0b: Battery Type */ - "" /* 0x0c: OEM Information */ - }) - - Name (PBIX, Package () { - 0x00000000, /* 0x00: Revision */ - 0x00000001, /* 0x01: Power Unit: mAh */ - 0xFFFFFFFF, /* 0x02: Design Capacity */ - 0xFFFFFFFF, /* 0x03: Last Full Charge Capacity */ - 0x00000001, /* 0x04: Battery Technology: Rechargeable */ - 0xFFFFFFFF, /* 0x05: Design Voltage */ - 0x00000003, /* 0x06: Design Capacity of Warning */ - 0xFFFFFFFF, /* 0x07: Design Capacity of Low */ - 0x00000000, /* 0x08: Cycle Count */ - 0x00018000, /* 0x09: Measurement Accuracy (98.3%?) */ - 0x000001F4, /* 0x0a: Max Sampling Time (500ms) */ - 0x0000000a, /* 0x0b: Min Sampling Time (10ms) */ - 0xFFFFFFFF, /* 0x0c: Max Averaging Interval */ - 0xFFFFFFFF, /* 0x0d: Min Averaging Interval */ - 0x00000001, /* 0x0e: Capacity Granularity 1 */ - 0x00000001, /* 0x0f: Capacity Granularity 2 */ - "", /* 0x10 Model Number */ - "", /* 0x11: Serial Number */ - "LION", /* 0x12: Battery Type */ - "" /* 0x13: OEM Information */ - }) - - Name (PBST, Package () { - 0x00000000, /* 0x00: Battery State */ - 0xFFFFFFFF, /* 0x01: Battery Present Rate */ - 0xFFFFFFFF, /* 0x02: Battery Remaining Capacity */ - 0xFFFFFFFF, /* 0x03: Battery Present Voltage */ - }) - - Method (_STA, 0, Serialized) - { - Return (ESTA (^_UID)) + Return (0x1f) } Method (_BST, 0, Serialized) diff --git a/src/ec/google/wilco/chip.c b/src/ec/google/wilco/chip.c index 7d85c6fe0fa..6241941b7ce 100644 --- a/src/ec/google/wilco/chip.c +++ b/src/ec/google/wilco/chip.c @@ -83,6 +83,21 @@ static const size_t ucsi_region_len = ARRAY_SIZE(ucsi_region_fields); static void wilco_ec_post_complete(void *unused) { wilco_ec_send(KB_BIOS_PROGRESS, BIOS_PROGRESS_POST_COMPLETE); + + if (!CONFIG(CHROMEOS)) { + int retval = wilco_ec_send_legacy_noargs(KB_EC_OS_BOOT); + if (retval) { + printk(BIOS_ERR, "Wilco EC: EC_OS_BOOT returned %d\n", retval); + } else { + printk(BIOS_INFO, "Wilco EC: EC_OS_BOOT returned %d\n", retval); + } + retval = wilco_ec_send_legacy(KB_EC_MODE, EC_MODE_EXIT_FIRMWARE); + if (retval) { + printk(BIOS_ERR, "Wilco EC: EC_MODE_EXIT_FIRMWARE returned %d\n", retval); + } else { + printk(BIOS_INFO, "Wilco EC: EC_MODE_EXIT_FIRMWARE returned %d\n", retval); + } + } } BOOT_STATE_INIT_ENTRY(BS_PAYLOAD_LOAD, BS_ON_EXIT, wilco_ec_post_complete, NULL); diff --git a/src/ec/google/wilco/commands.h b/src/ec/google/wilco/commands.h index b70f949fcbb..d7ce64cff3f 100644 --- a/src/ec/google/wilco/commands.h +++ b/src/ec/google/wilco/commands.h @@ -34,14 +34,20 @@ enum { KB_HW_MUTE_CONTROL = 0x60, /* Inform the EC that the host is about to enter S3 */ KB_SLP_EN = 0x64, + /* Inform EC of OS boot */ + KB_EC_OS_BOOT = 0x6b, /* Inform the EC about BIOS boot progress */ KB_BIOS_PROGRESS = 0xc2, /* Inform the EC that a fatal error occurred */ KB_ERR_CODE = 0x7b, + /* EC mode commands */ + KB_EC_MODE = 0x88, /* Set CPU ID */ KB_CPU_ID = 0xbf, }; +#define EC_MODE_EXIT_FIRMWARE 0x04 + enum ec_ram_addr { /* Indicate if EC uses signed firmware */ EC_RAM_SIGNED_FW = 0x5c, diff --git a/src/ec/google/wilco/ec.h b/src/ec/google/wilco/ec.h index cae864a7a52..8f5a9bd85bb 100644 --- a/src/ec/google/wilco/ec.h +++ b/src/ec/google/wilco/ec.h @@ -11,6 +11,7 @@ enum wilco_ec_msg_type { WILCO_EC_MSG_RAW, /* Raw message, do not skip any data */ WILCO_EC_MSG_DEFAULT, /* Skip 1 byte of response data */ WILCO_EC_MSG_NO_RESPONSE, /* EC does not respond to command */ + WILCO_EC_MSG_LEGACY = 0x00f0, }; /** @@ -48,6 +49,12 @@ static inline int wilco_ec_send(uint8_t command, uint8_t param) ¶m, sizeof(param), NULL, 0); } +static inline int wilco_ec_send_legacy(uint8_t command, uint8_t param) +{ + return wilco_ec_mailbox(WILCO_EC_MSG_LEGACY, command, + ¶m, sizeof(param), NULL, 0); +} + /** * wilco_ec_send_noargs * @@ -63,6 +70,12 @@ static inline int wilco_ec_send_noargs(uint8_t command) NULL, 0, NULL, 0); } +static inline int wilco_ec_send_legacy_noargs(uint8_t command) +{ + return wilco_ec_mailbox(WILCO_EC_MSG_LEGACY, command, + NULL, 0, NULL, 0); +} + /** * wilco_ec_sendrecv * From 12d72a234ec799f7d1474ca07129f5d0555dfd43 Mon Sep 17 00:00:00 2001 From: Matt DeVillier Date: Mon, 17 Oct 2022 08:56:49 -0500 Subject: [PATCH 085/137] HACK: Drallion WIP Change-Id: Id442fea1ed5e603dece68554c6c353bf6b8b7574 Signed-off-by: Matt DeVillier --- src/mainboard/google/drallion/dsdt.asl | 1 + .../drallion/variants/drallion/devicetree.cb | 14 +------------- .../variants/drallion/include/variant/ec.h | 2 +- 3 files changed, 3 insertions(+), 14 deletions(-) diff --git a/src/mainboard/google/drallion/dsdt.asl b/src/mainboard/google/drallion/dsdt.asl index 6e9bf02136e..0f503dffd9b 100644 --- a/src/mainboard/google/drallion/dsdt.asl +++ b/src/mainboard/google/drallion/dsdt.asl @@ -22,6 +22,7 @@ DefinitionBlock( { #include #include + #include } /* Per board variant mainboard hooks. */ #include diff --git a/src/mainboard/google/drallion/variants/drallion/devicetree.cb b/src/mainboard/google/drallion/variants/drallion/devicetree.cb index d819ca7ee83..09ca824e3cf 100644 --- a/src/mainboard/google/drallion/variants/drallion/devicetree.cb +++ b/src/mainboard/google/drallion/variants/drallion/devicetree.cb @@ -222,19 +222,7 @@ chip soc/intel/cannonlake device domain 0 on device pci 00.0 on end # Host Bridge device pci 02.0 on - chip drivers/gfx/generic - register "device_count" = "1" - register "device[0].name" = ""LCD"" - # Address is set following the ACPI spec section A.3.2 - # for an internal panel on the first port of the graphics chip - register "device[0].addr" = "0x80010400" - register "device[0].privacy.enabled" = "1" - register "device[0].privacy.detect_function" = ""\\_SB.PCI0.LPCB.EC0.GPVD"" - register "device[0].privacy.status_function" = ""\\_SB.PCI0.LPCB.EC0.GPVX"" - register "device[0].privacy.enable_function" = ""\\_SB.PCI0.LPCB.EC0.EPVX"" - register "device[0].privacy.disable_function" = ""\\_SB.PCI0.LPCB.EC0.DPVX"" - device generic 0 on end - end + register "gfx" = "GMA_DEFAULT_PANEL(0)" end # Integrated Graphics Device device pci 04.0 on end # SA Thermal device device pci 12.0 on end # Thermal Subsystem diff --git a/src/mainboard/google/drallion/variants/drallion/include/variant/ec.h b/src/mainboard/google/drallion/variants/drallion/include/variant/ec.h index ba9c01d8e8b..c46e69b8ba5 100644 --- a/src/mainboard/google/drallion/variants/drallion/include/variant/ec.h +++ b/src/mainboard/google/drallion/variants/drallion/include/variant/ec.h @@ -19,6 +19,6 @@ #define EC_ENABLE_DPTF /* Enable privacy screen functionality */ -#define EC_ENABLE_PRIVACY +//#define EC_ENABLE_PRIVACY #endif From 18bd12c6ca9e771d3d6ade3a0d4057c33549feed Mon Sep 17 00:00:00 2001 From: Matt DeVillier Date: Tue, 18 Oct 2022 17:53:08 -0500 Subject: [PATCH 086/137] ec/chromeec/tmbc: move under CREC; unhide For coolstar's Windows' drivers Change-Id: I5e9eab9ae277b5a04dc2666960a727e5680bf6f4 Signed-off-by: Matt DeVillier --- src/ec/google/chromeec/acpi/ec.asl | 2 +- src/ec/google/chromeec/acpi/tbmc.asl | 29 +++++++++++++++------------- 2 files changed, 17 insertions(+), 14 deletions(-) diff --git a/src/ec/google/chromeec/acpi/ec.asl b/src/ec/google/chromeec/acpi/ec.asl index 9bc1aee4193..adac83ecd2f 100644 --- a/src/ec/google/chromeec/acpi/ec.asl +++ b/src/ec/google/chromeec/acpi/ec.asl @@ -454,7 +454,7 @@ Device (EC0) #endif #ifdef EC_ENABLE_TBMC_DEVICE If (LEqual(_OSI("Linux"), 1)) { - Notify (TBMC, 0x80) + Notify (\_SB.PCI0.LPCB.EC0.CREC.TBMC, 0x80) } else { If (LEqual ((^TBMD), One)) { Notify (VBTN, 0xCC) diff --git a/src/ec/google/chromeec/acpi/tbmc.asl b/src/ec/google/chromeec/acpi/tbmc.asl index 1661296da61..b71548625ad 100644 --- a/src/ec/google/chromeec/acpi/tbmc.asl +++ b/src/ec/google/chromeec/acpi/tbmc.asl @@ -1,20 +1,23 @@ /* SPDX-License-Identifier: GPL-2.0-only */ -Device (TBMC) +Scope (\_SB.PCI0.LPCB.EC0.CREC) { - Name (_HID, "GOOG0006") - Name (_UID, 1) - Name (_DDN, "Tablet Motion Control") - Method (TBMC) + Device (TBMC) { - If (^^RCTM == 1) { - Return (0x1) - } Else { - Return (0x0) + Name (_HID, "GOOG0006") + Name (_UID, 1) + Name (_DDN, "Tablet Motion Control") + Method (TBMC) + { + If (^^^RCTM == 1) { + Return (0x1) + } Else { + Return (0x0) + } + } + Method(_STA, 0) + { + Return (0xF) } - } - Method(_STA, 0) - { - Return (0xB) } } From 5e4f93dcc672c32efdfa11c020bb45438cbc7b98 Mon Sep 17 00:00:00 2001 From: Matt DeVillier Date: Sun, 2 Oct 2022 15:58:55 -0500 Subject: [PATCH 087/137] mb/google/poppy: use 2CH (vs 4CH) DMIC array Change-Id: I55b4cf3990aaaeecd000e6c021adda837a5d4600 Signed-off-by: Matt DeVillier --- src/mainboard/google/poppy/Kconfig | 11 +++++------ src/mainboard/google/poppy/variants/atlas/nhlt.c | 6 +++--- src/mainboard/google/poppy/variants/baseboard/nhlt.c | 4 ---- src/mainboard/google/poppy/variants/nami/nhlt.c | 6 +++--- src/mainboard/google/poppy/variants/nautilus/nhlt.c | 6 +++--- src/mainboard/google/poppy/variants/nocturne/nhlt.c | 6 +++--- src/mainboard/google/poppy/variants/rammus/nhlt.c | 6 +++--- 7 files changed, 20 insertions(+), 25 deletions(-) diff --git a/src/mainboard/google/poppy/Kconfig b/src/mainboard/google/poppy/Kconfig index 34fcfa1cf4b..6f1636dad6e 100644 --- a/src/mainboard/google/poppy/Kconfig +++ b/src/mainboard/google/poppy/Kconfig @@ -136,37 +136,36 @@ config DRIVER_TPM_SPI_BUS config INCLUDE_NHLT_BLOBS bool "Include blobs for audio." select NHLT_DMIC_2CH - select NHLT_DMIC_4CH select NHLT_MAX98927 select NHLT_RT5663 config INCLUDE_NHLT_BLOBS_ATLAS bool "Include blobs for atlas audio." select NHLT_DA7219 - select NHLT_DMIC_4CH + select NHLT_DMIC_2CH select NHLT_MAX98373 config INCLUDE_NHLT_BLOBS_NAUTILUS bool "Include blobs for nautilus audio." select NHLT_DA7219 - select NHLT_DMIC_4CH + select NHLT_DMIC_2CH select NHLT_MAX98357 config INCLUDE_NHLT_BLOBS_NAMI bool "Include blobs for nami audio." select NHLT_DA7219 - select NHLT_DMIC_4CH + select NHLT_DMIC_2CH select NHLT_MAX98357 config INCLUDE_NHLT_BLOBS_NOCTURNE bool "Include blobs for nocturne audio." - select NHLT_DMIC_4CH + select NHLT_DMIC_2CH select NHLT_MAX98373 config INCLUDE_NHLT_BLOBS_RAMMUS bool "Include blobs for rammus audio." select NHLT_DA7219 - select NHLT_DMIC_4CH + select NHLT_DMIC_2CH select NHLT_MAX98927 config MAINBOARD_DIR diff --git a/src/mainboard/google/poppy/variants/atlas/nhlt.c b/src/mainboard/google/poppy/variants/atlas/nhlt.c index ee642c0fc6f..b9b7c20ffb8 100644 --- a/src/mainboard/google/poppy/variants/atlas/nhlt.c +++ b/src/mainboard/google/poppy/variants/atlas/nhlt.c @@ -7,9 +7,9 @@ void variant_nhlt_init(struct nhlt *nhlt) { - /* 4 Channel DMIC array. */ - if (nhlt_soc_add_dmic_array(nhlt, 4)) - printk(BIOS_ERR, "Couldn't add 4CH DMIC arrays.\n"); + /* 2 Channel DMIC array. */ + if (nhlt_soc_add_dmic_array(nhlt, 2)) + printk(BIOS_ERR, "Couldn't add 2CH DMIC arrays.\n"); /* Dialog DA7219 Headset codec. */ if (nhlt_soc_add_da7219(nhlt, AUDIO_LINK_SSP1)) diff --git a/src/mainboard/google/poppy/variants/baseboard/nhlt.c b/src/mainboard/google/poppy/variants/baseboard/nhlt.c index b3ead3b3de9..c281096e95c 100644 --- a/src/mainboard/google/poppy/variants/baseboard/nhlt.c +++ b/src/mainboard/google/poppy/variants/baseboard/nhlt.c @@ -11,10 +11,6 @@ void __weak variant_nhlt_init(struct nhlt *nhlt) if (nhlt_soc_add_dmic_array(nhlt, 2)) printk(BIOS_ERR, "Couldn't add 2CH DMIC array.\n"); - /* 4 Channel DMIC array. */ - if (nhlt_soc_add_dmic_array(nhlt, 4)) - printk(BIOS_ERR, "Couldn't add 4CH DMIC arrays.\n"); - /* Maxim MAX98927 Smart Amps for left and right channel */ /* Render time_slot is 0 and feedback time_slot is 2 */ if (nhlt_soc_add_max98927(nhlt, AUDIO_LINK_SSP0, 0, 2)) diff --git a/src/mainboard/google/poppy/variants/nami/nhlt.c b/src/mainboard/google/poppy/variants/nami/nhlt.c index 343b835c387..14c16a61814 100644 --- a/src/mainboard/google/poppy/variants/nami/nhlt.c +++ b/src/mainboard/google/poppy/variants/nami/nhlt.c @@ -7,9 +7,9 @@ void variant_nhlt_init(struct nhlt *nhlt) { - /* 4 Channel DMIC array. */ - if (nhlt_soc_add_dmic_array(nhlt, 4)) - printk(BIOS_ERR, "Couldn't add 4CH DMIC array.\n"); + /* 2 Channel DMIC array. */ + if (nhlt_soc_add_dmic_array(nhlt, 2)) + printk(BIOS_ERR, "Couldn't add 2CH DMIC array.\n"); /* Dialog DA7219 Headset codec. */ if (nhlt_soc_add_da7219(nhlt, AUDIO_LINK_SSP1)) diff --git a/src/mainboard/google/poppy/variants/nautilus/nhlt.c b/src/mainboard/google/poppy/variants/nautilus/nhlt.c index 267dbfc6bb6..a903a75b20c 100644 --- a/src/mainboard/google/poppy/variants/nautilus/nhlt.c +++ b/src/mainboard/google/poppy/variants/nautilus/nhlt.c @@ -7,9 +7,9 @@ void variant_nhlt_init(struct nhlt *nhlt) { - /* 4 Channel DMIC array. */ - if (nhlt_soc_add_dmic_array(nhlt, 4)) - printk(BIOS_ERR, "Couldn't add 4CH DMIC array.\n"); + /* 2 Channel DMIC array. */ + if (nhlt_soc_add_dmic_array(nhlt, 2)) + printk(BIOS_ERR, "Couldn't add 2CH DMIC array.\n"); /* Dialog DA7219 Headset codec. */ if (nhlt_soc_add_da7219(nhlt, AUDIO_LINK_SSP1)) diff --git a/src/mainboard/google/poppy/variants/nocturne/nhlt.c b/src/mainboard/google/poppy/variants/nocturne/nhlt.c index a3b239932c2..03a14f41287 100644 --- a/src/mainboard/google/poppy/variants/nocturne/nhlt.c +++ b/src/mainboard/google/poppy/variants/nocturne/nhlt.c @@ -7,9 +7,9 @@ void variant_nhlt_init(struct nhlt *nhlt) { - /* 4 Channel DMIC array. */ - if (nhlt_soc_add_dmic_array(nhlt, 4)) - printk(BIOS_ERR, "Couldn't add 4CH DMIC array.\n"); + /* 2 Channel DMIC array. */ + if (nhlt_soc_add_dmic_array(nhlt, 2)) + printk(BIOS_ERR, "Couldn't add 2CH DMIC array.\n"); /* MAXIM Smart Amps for left and right speakers. */ /* Render time_slot is 0 and feedback time_slot is 2 */ diff --git a/src/mainboard/google/poppy/variants/rammus/nhlt.c b/src/mainboard/google/poppy/variants/rammus/nhlt.c index 14c6e708f79..f8b3d05fe4c 100644 --- a/src/mainboard/google/poppy/variants/rammus/nhlt.c +++ b/src/mainboard/google/poppy/variants/rammus/nhlt.c @@ -7,9 +7,9 @@ void variant_nhlt_init(struct nhlt *nhlt) { - /* 4 Channel DMIC array. */ - if (nhlt_soc_add_dmic_array(nhlt, 4)) - printk(BIOS_ERR, "Couldn't add 4CH DMIC array.\n"); + /* 2 Channel DMIC array. */ + if (nhlt_soc_add_dmic_array(nhlt, 2)) + printk(BIOS_ERR, "Couldn't add 2CH DMIC array.\n"); /* Dialog DA7219 Headset codec. */ if (nhlt_soc_add_da7219(nhlt, AUDIO_LINK_SSP1)) From f7f69564f4c6f1a584ddef4ec319fc717d83c1af Mon Sep 17 00:00:00 2001 From: Matt DeVillier Date: Thu, 20 Oct 2022 21:27:27 -0500 Subject: [PATCH 088/137] mb/google/glados: use 2CH (vs 4CH) DMIC array Change-Id: I323c5ffe4ffd57f639b9e8aa875f2fc142331880 Signed-off-by: Matt DeVillier --- src/mainboard/google/glados/Kconfig | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/src/mainboard/google/glados/Kconfig b/src/mainboard/google/glados/Kconfig index 631d90d1f32..87b468a7b11 100644 --- a/src/mainboard/google/glados/Kconfig +++ b/src/mainboard/google/glados/Kconfig @@ -51,7 +51,7 @@ config BOARD_GOOGLE_CHELL config BOARD_GOOGLE_GLADOS select BOARD_GOOGLE_BASEBOARD_GLADOS - select NHLT_DMIC_4CH if INCLUDE_NHLT_BLOBS + select NHLT_DMIC_2CH if INCLUDE_NHLT_BLOBS select NHLT_SSM4567 if INCLUDE_NHLT_BLOBS config BOARD_GOOGLE_LARS @@ -67,7 +67,7 @@ config BOARD_GOOGLE_SENTRY select DRIVERS_GENERIC_MAX98357A select INTEL_GMA_HAVE_VBT select MAINBOARD_NO_FSP_GOP - select NHLT_DMIC_4CH if INCLUDE_NHLT_BLOBS + select NHLT_DMIC_2CH if INCLUDE_NHLT_BLOBS select NHLT_MAX98357 if INCLUDE_NHLT_BLOBS select NHLT_SSM4567 if INCLUDE_NHLT_BLOBS From 7f6eb57aedd16e68d2cfd8519dd628a9804fead4 Mon Sep 17 00:00:00 2001 From: Matt DeVillier Date: Thu, 20 Oct 2022 21:27:49 -0500 Subject: [PATCH 089/137] mb/google/fizz: use 2CH (vs 4CH) DMIC array Change-Id: I4975b5e9fc609114dde62af50de882e12504723c Signed-off-by: Matt DeVillier --- src/mainboard/google/fizz/Kconfig | 2 +- src/mainboard/google/fizz/variants/karma/nhlt.c | 6 +++--- 2 files changed, 4 insertions(+), 4 deletions(-) diff --git a/src/mainboard/google/fizz/Kconfig b/src/mainboard/google/fizz/Kconfig index d46abdd9a48..749b43553bf 100644 --- a/src/mainboard/google/fizz/Kconfig +++ b/src/mainboard/google/fizz/Kconfig @@ -90,7 +90,7 @@ config INCLUDE_NHLT_BLOBS config INCLUDE_NHLT_BLOBS_KARMA bool "Include blobs for karma audio." select NHLT_DA7219 - select NHLT_DMIC_4CH + select NHLT_DMIC_2CH select NHLT_MAX98357 config UART_FOR_CONSOLE diff --git a/src/mainboard/google/fizz/variants/karma/nhlt.c b/src/mainboard/google/fizz/variants/karma/nhlt.c index e237d2e1851..75a27d2078d 100644 --- a/src/mainboard/google/fizz/variants/karma/nhlt.c +++ b/src/mainboard/google/fizz/variants/karma/nhlt.c @@ -7,9 +7,9 @@ void variant_nhlt_init(struct nhlt *nhlt) { - /* 4 Channel DMIC array. */ - if (nhlt_soc_add_dmic_array(nhlt, 4)) - printk(BIOS_ERR, "Couldn't add 4CH DMIC array.\n"); + /* 2 Channel DMIC array. */ + if (nhlt_soc_add_dmic_array(nhlt, 2)) + printk(BIOS_ERR, "Couldn't add 2CH DMIC array.\n"); /* Dialog DA7219 Headset codec. */ if (nhlt_soc_add_da7219(nhlt, AUDIO_LINK_SSP1)) From c9a5816350d5a15566a4565688510c5d606902bd Mon Sep 17 00:00:00 2001 From: Matt DeVillier Date: Mon, 28 Nov 2022 16:19:18 -0600 Subject: [PATCH 090/137] drivers/i2c/sx9310: Set ACPI status to hidden (0xb) Hides device from Windows since no driver available Change-Id: Ib1e274084400fa47e483267d331e632ceb5be757 Signed-off-by: Matt DeVillier --- src/drivers/i2c/sx9310/sx9310.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/drivers/i2c/sx9310/sx9310.c b/src/drivers/i2c/sx9310/sx9310.c index d9e5a14c5b2..68aea6c80cf 100644 --- a/src/drivers/i2c/sx9310/sx9310.c +++ b/src/drivers/i2c/sx9310/sx9310.c @@ -48,7 +48,7 @@ static void i2c_sx9310_fill_ssdt(const struct device *dev) acpigen_write_name_string("_HID", I2C_SX9310_ACPI_ID); acpigen_write_name_integer("_UID", config->uid); acpigen_write_name_string("_DDN", config->desc); - acpigen_write_STA(acpi_device_status(dev)); + acpigen_write_STA(ACPI_STATUS_DEVICE_HIDDEN_ON); /* Resources */ acpigen_write_name("_CRS"); From fcca040232b6a6d1b388f01e537cd26b4515b755 Mon Sep 17 00:00:00 2001 From: Matt DeVillier Date: Tue, 29 Nov 2022 13:00:02 -0600 Subject: [PATCH 091/137] ec/google/chromeec: Unhide PD ACPI device from OS Needed for coolstar's Windows drivers Change-Id: I84a20cfaf7e077469f8361b3da3b031d9fd84134 Signed-off-by: Matt DeVillier --- src/ec/google/chromeec/acpi/pd.asl | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/ec/google/chromeec/acpi/pd.asl b/src/ec/google/chromeec/acpi/pd.asl index 5b45ab1b2b9..4011643935d 100644 --- a/src/ec/google/chromeec/acpi/pd.asl +++ b/src/ec/google/chromeec/acpi/pd.asl @@ -7,6 +7,6 @@ Device (ECPD) Name (_DDN, "EC PD Device") Method(_STA, 0) { - Return (0xB) + Return (0xF) } } From a3fa8a94f6577c31317909e599e11d39dcbb4d37 Mon Sep 17 00:00:00 2001 From: Matt DeVillier Date: Tue, 29 Nov 2022 13:00:31 -0600 Subject: [PATCH 092/137] soc/intel/tgl: Unhide PMC ACPI device from OS Needed for coolstar's Windows drivers Change-Id: I1520a71e318674baa234fc6a2126d1d17933d983 Signed-off-by: Matt DeVillier --- src/soc/intel/tigerlake/pmc.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/soc/intel/tigerlake/pmc.c b/src/soc/intel/tigerlake/pmc.c index 5ad8a8976ab..770264705e2 100644 --- a/src/soc/intel/tigerlake/pmc.c +++ b/src/soc/intel/tigerlake/pmc.c @@ -108,7 +108,7 @@ static void soc_pmc_fill_ssdt(const struct device *dev) acpigen_write_name_string("_HID", PMC_HID); acpigen_write_name_string("_DDN", "Intel(R) Tiger Lake IPC Controller"); /* Hide the device so that Windows does not complain on missing driver */ - acpigen_write_STA(ACPI_STATUS_DEVICE_HIDDEN_ON); + acpigen_write_STA(ACPI_STATUS_DEVICE_ALL_ON); /* * Part of the PCH's reserved 32 MB MMIO range (0xFC800000 - 0xFE7FFFFF). From 2df6144174f5d8d5a1d2ee4bb65525127d084f8e Mon Sep 17 00:00:00 2001 From: Matt DeVillier Date: Tue, 29 Nov 2022 13:00:58 -0600 Subject: [PATCH 093/137] soc/intel/tgl: Unhide IOM ACPI device from OS, adjust scope Needed for coolstar's Windows drivers Change-Id: I7c4c94d2926c3bb9095af2318803f47062fe5186 Signed-off-by: Matt DeVillier --- src/soc/intel/tigerlake/acpi/tcss.asl | 8 +++++--- 1 file changed, 5 insertions(+), 3 deletions(-) diff --git a/src/soc/intel/tigerlake/acpi/tcss.asl b/src/soc/intel/tigerlake/acpi/tcss.asl index 08b348062f3..7a95b3e5f48 100644 --- a/src/soc/intel/tigerlake/acpi/tcss.asl +++ b/src/soc/intel/tigerlake/acpi/tcss.asl @@ -327,7 +327,7 @@ Scope (_GPE) } } -Scope (\_SB.PCI0) +Scope (\_SB) { Device (IOM) { @@ -338,9 +338,11 @@ Scope (\_SB.PCI0) Memory32Fixed (ReadWrite, IOM_BASE_ADDRESS, IOM_BASE_SIZE) }) /* Hide the device so that Windows does not complain on missing driver */ - Name (_STA, 0xB) + Name (_STA, 0xF) } - +} +Scope (\_SB.PCI0) +{ /* * Operation region defined to access the TCSS_DEVEN. Get the MCHBAR in offset * 0x48 in B0:D0:F0. TCSS device enable base address is in offset 0x7090 of MCHBAR. From 93d670896ce015d85c722f4c3f7e050aeed52e6f Mon Sep 17 00:00:00 2001 From: Matt DeVillier Date: Tue, 29 Nov 2022 14:54:00 -0600 Subject: [PATCH 094/137] soc/intel/adl: Unhide PMC ACPI device from OS Needed for coolstar's Windows drivers Change-Id: Idbbaee29bffb49059d8450abd09e0c3f7b490fae Signed-off-by: Matt DeVillier --- src/soc/intel/alderlake/pmc.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/soc/intel/alderlake/pmc.c b/src/soc/intel/alderlake/pmc.c index c28ee2d0a44..ada0caa01a3 100644 --- a/src/soc/intel/alderlake/pmc.c +++ b/src/soc/intel/alderlake/pmc.c @@ -109,7 +109,7 @@ static void soc_pmc_fill_ssdt(const struct device *dev) acpigen_write_name_string("_HID", PMC_HID); acpigen_write_name_string("_DDN", "Intel(R) Alder Lake IPC Controller"); /* Hide the device so that Windows does not complain on missing driver */ - acpigen_write_STA(ACPI_STATUS_DEVICE_HIDDEN_ON); + acpigen_write_STA(ACPI_STATUS_DEVICE_ALL_ON); /* * Part of the PCH's reserved 32 MB MMIO range (0xFC800000 - 0xFE7FFFFF). From 86022bf9892e56f953d9e4e7b0c1cc9a54f4bc4c Mon Sep 17 00:00:00 2001 From: Matt DeVillier Date: Tue, 29 Nov 2022 14:55:20 -0600 Subject: [PATCH 095/137] soc/intel/adl: Unhide IOM ACPI device from OS, adjust scope Needed for coolstar's Windows drivers Change-Id: Ic6513d67e3b232dae0f2147b8750a8b6e09bd2a3 Signed-off-by: Matt DeVillier --- src/soc/intel/alderlake/acpi/tcss.asl | 7 +++++-- 1 file changed, 5 insertions(+), 2 deletions(-) diff --git a/src/soc/intel/alderlake/acpi/tcss.asl b/src/soc/intel/alderlake/acpi/tcss.asl index 9edaf771109..e4525f8a44e 100644 --- a/src/soc/intel/alderlake/acpi/tcss.asl +++ b/src/soc/intel/alderlake/acpi/tcss.asl @@ -327,7 +327,7 @@ Scope (_GPE) } } -Scope (\_SB.PCI0) +Scope (\_SB) { Device (IOM) { @@ -338,9 +338,12 @@ Scope (\_SB.PCI0) Memory32Fixed (ReadWrite, IOM_BASE_ADDRESS, IOM_BASE_SIZE) }) /* Hide the device so that Windows does not complain on missing driver */ - Name (_STA, 0xB) + Name (_STA, 0xF) } +} +Scope (\_SB.PCI0) +{ /* * Operation region defined to access the TCSS_DEVEN. Get the MCHBAR in offset * 0x48 in B0:D0:F0. TCSS device enable base address is in offset 0x7090 of MCHBAR. From 3db466c8a4e3b89d5c019170cac694c6511bdb9d Mon Sep 17 00:00:00 2001 From: Matt DeVillier Date: Thu, 1 Dec 2022 08:53:08 -0600 Subject: [PATCH 096/137] mb/google/brya: add ACPI brightness controls for iGPU Change-Id: I03bb7a7309476839c49d2e862a036d9e89800605 Signed-off-by: Matt DeVillier --- src/mainboard/google/brya/dsdt.asl | 1 + .../google/brya/variants/baseboard/brask/devicetree.cb | 4 +++- .../google/brya/variants/baseboard/brya/devicetree.cb | 1 + .../google/brya/variants/baseboard/nissa/devicetree.cb | 4 +++- .../google/brya/variants/baseboard/skolas/devicetree.cb | 4 +++- 5 files changed, 11 insertions(+), 3 deletions(-) diff --git a/src/mainboard/google/brya/dsdt.asl b/src/mainboard/google/brya/dsdt.asl index 7a730b74bf4..4c1574e55f4 100644 --- a/src/mainboard/google/brya/dsdt.asl +++ b/src/mainboard/google/brya/dsdt.asl @@ -26,6 +26,7 @@ DefinitionBlock( #include #include #include + #include } } diff --git a/src/mainboard/google/brya/variants/baseboard/brask/devicetree.cb b/src/mainboard/google/brya/variants/baseboard/brask/devicetree.cb index 38535a47732..65e481e226b 100644 --- a/src/mainboard/google/brya/variants/baseboard/brask/devicetree.cb +++ b/src/mainboard/google/brya/variants/baseboard/brask/devicetree.cb @@ -106,7 +106,9 @@ chip soc/intel/alderlake }" device domain 0 on - device ref igpu on end + device ref igpu on + register "gfx" = "GMA_DEFAULT_PANEL(0)" + end device ref dtt on end device ref tbt_pcie_rp0 on end device ref tbt_pcie_rp1 on end diff --git a/src/mainboard/google/brya/variants/baseboard/brya/devicetree.cb b/src/mainboard/google/brya/variants/baseboard/brya/devicetree.cb index efc2fcbc988..fd589ba0816 100644 --- a/src/mainboard/google/brya/variants/baseboard/brya/devicetree.cb +++ b/src/mainboard/google/brya/variants/baseboard/brya/devicetree.cb @@ -153,6 +153,7 @@ chip soc/intel/alderlake .backlight_off_delay_ms = 200, .backlight_pwm_hz = 200, }" + register "gfx" = "GMA_DEFAULT_PANEL(0)" end device ref dtt on end device ref tbt_pcie_rp0 on end diff --git a/src/mainboard/google/brya/variants/baseboard/nissa/devicetree.cb b/src/mainboard/google/brya/variants/baseboard/nissa/devicetree.cb index 16c7ce02df2..3bd2c6efbd9 100644 --- a/src/mainboard/google/brya/variants/baseboard/nissa/devicetree.cb +++ b/src/mainboard/google/brya/variants/baseboard/nissa/devicetree.cb @@ -153,7 +153,9 @@ chip soc/intel/alderlake }" device domain 0 on - device ref igpu on end + device ref igpu on + register "gfx" = "GMA_DEFAULT_PANEL(0)" + end device ref dtt on end device ref tcss_xhci on end device ref xhci on end diff --git a/src/mainboard/google/brya/variants/baseboard/skolas/devicetree.cb b/src/mainboard/google/brya/variants/baseboard/skolas/devicetree.cb index 6ca0c9e1b51..b4ab818a088 100644 --- a/src/mainboard/google/brya/variants/baseboard/skolas/devicetree.cb +++ b/src/mainboard/google/brya/variants/baseboard/skolas/devicetree.cb @@ -127,7 +127,9 @@ chip soc/intel/alderlake }" device domain 0 on - device ref igpu on end + device ref igpu on + register "gfx" = "GMA_DEFAULT_PANEL(0)" + end device ref dtt on end device ref tbt_pcie_rp0 on end device ref tbt_pcie_rp1 on end From abd6ba12552e88524b3842770fba348a9771a4da Mon Sep 17 00:00:00 2001 From: Matt DeVillier Date: Mon, 5 Dec 2022 09:46:18 -0600 Subject: [PATCH 097/137] mb/google/brya: select INTEL_GMA_HAVE_VBT Change-Id: Id67cf18398dddd7ef497ee57bdfd2b1f618e944d Signed-off-by: Matt DeVillier --- .../variants/tricky/include/variant/thermal.h | 44 +++++++++---------- src/mainboard/google/brya/Kconfig | 1 + 2 files changed, 23 insertions(+), 22 deletions(-) diff --git a/src/mainboard/google/beltino/variants/tricky/include/variant/thermal.h b/src/mainboard/google/beltino/variants/tricky/include/variant/thermal.h index 1ca26b0df38..6842ec2b5f9 100644 --- a/src/mainboard/google/beltino/variants/tricky/include/variant/thermal.h +++ b/src/mainboard/google/beltino/variants/tricky/include/variant/thermal.h @@ -3,28 +3,28 @@ #ifndef THERMAL_H #define THERMAL_H -/* Fan is at default speed */ -#define FAN4_PWM 0x47 - -/* Fan is at LOW speed */ -#define FAN3_THRESHOLD_OFF 50 -#define FAN3_THRESHOLD_ON 60 -#define FAN3_PWM 0x62 - -/* Fan is at MEDIUM speed */ -#define FAN2_THRESHOLD_OFF 65 -#define FAN2_THRESHOLD_ON 77 -#define FAN2_PWM 0x86 - -/* Fan is at HIGH speed */ -#define FAN1_THRESHOLD_OFF 77 -#define FAN1_THRESHOLD_ON 85 -#define FAN1_PWM 0xa8 - -/* Fan is at FULL speed */ -#define FAN0_THRESHOLD_OFF 85 -#define FAN0_THRESHOLD_ON 90 -#define FAN0_PWM 0xdc +/* Fan is at default speed: ~2600 rpm */ +#define FAN4_PWM 0x4b + +/* Fan is at LOW speed: ~3000 rpm */ +#define FAN3_THRESHOLD_OFF 30 +#define FAN3_THRESHOLD_ON 40 +#define FAN3_PWM 0x5B + +/* Fan is at MEDIUM speed: ~4000 rpm */ +#define FAN2_THRESHOLD_OFF 40 +#define FAN2_THRESHOLD_ON 50 +#define FAN2_PWM 0x87 + +/* Fan is at HIGH speed: ~5000 rpm */ +#define FAN1_THRESHOLD_OFF 50 +#define FAN1_THRESHOLD_ON 60 +#define FAN1_PWM 0xc3 + +/* Fan is at FULL speed: ~6000 rpm */ +#define FAN0_THRESHOLD_OFF 60 +#define FAN0_THRESHOLD_ON 70 +#define FAN0_PWM 0xff /* Temperature which OS will shutdown at */ #define CRITICAL_TEMPERATURE 98 diff --git a/src/mainboard/google/brya/Kconfig b/src/mainboard/google/brya/Kconfig index a7f459454a0..b3f948733e9 100644 --- a/src/mainboard/google/brya/Kconfig +++ b/src/mainboard/google/brya/Kconfig @@ -27,6 +27,7 @@ config BOARD_GOOGLE_BRYA_COMMON select HAVE_ACPI_RESUME select HAVE_ACPI_TABLES select I2C_TPM + select INTEL_GMA_HAVE_VBT select INTEL_LPSS_UART_FOR_CONSOLE select MAINBOARD_HAS_CHROMEOS select MAINBOARD_HAS_TPM2 From 6133fc2ad4da78c217ad80872a9dd08eb23a55c4 Mon Sep 17 00:00:00 2001 From: Matt DeVillier Date: Wed, 7 Dec 2022 12:31:45 -0600 Subject: [PATCH 098/137] mb/google/volteer: select INTEL_GMA_HAVE_VBT for all variants Change-Id: Ib33f7a88ffc0343f40978a72475ea5abfb088618 Signed-off-by: Matt DeVillier --- src/mainboard/google/volteer/Kconfig | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/mainboard/google/volteer/Kconfig b/src/mainboard/google/volteer/Kconfig index 51210e44ed4..368ea7a5770 100644 --- a/src/mainboard/google/volteer/Kconfig +++ b/src/mainboard/google/volteer/Kconfig @@ -26,6 +26,7 @@ config BOARD_GOOGLE_BASEBOARD_VOLTEER select GOOGLE_SMBIOS_MAINBOARD_VERSION select HAVE_ACPI_RESUME select HAVE_ACPI_TABLES + select INTEL_GMA_HAVE_VBT select HAVE_SPD_IN_CBFS select INTEL_LPSS_UART_FOR_CONSOLE select MAINBOARD_HAS_CHROMEOS @@ -55,7 +56,6 @@ config BOARD_GOOGLE_LINDAR select DRIVERS_GENERIC_BAYHUB_LV2 select DRIVERS_I2C_RT1011 select INTEL_CAR_NEM - select INTEL_GMA_HAVE_VBT config BOARD_GOOGLE_MALEFOR select BOARD_GOOGLE_BASEBOARD_VOLTEER From b01d6961ea9c5fa3837082a1ddb2676d7ff51a21 Mon Sep 17 00:00:00 2001 From: Matt DeVillier Date: Sat, 17 Dec 2022 10:24:07 -0600 Subject: [PATCH 099/137] mb/google/kahlee: increase UMA to 256MB Change-Id: Ibc8ecbe0acb4476c01afd4b295e76fbd5b657acf Signed-off-by: Matt DeVillier --- src/mainboard/google/kahlee/variants/baseboard/devicetree.cb | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/mainboard/google/kahlee/variants/baseboard/devicetree.cb b/src/mainboard/google/kahlee/variants/baseboard/devicetree.cb index 1420c27bd72..0f4d2816453 100644 --- a/src/mainboard/google/kahlee/variants/baseboard/devicetree.cb +++ b/src/mainboard/google/kahlee/variants/baseboard/devicetree.cb @@ -8,7 +8,7 @@ chip soc/amd/stoneyridge }" register "dram_clear_on_reset" = "DRAM_CONTENTS_KEEP" register "uma_mode" = "UMAMODE_SPECIFIED_SIZE" - register "uma_size" = "32 * MiB" + register "uma_size" = "256 * MiB" register "i2c_scl_reset" = "GPIO_I2C0_SCL | GPIO_I2C1_SCL | \ GPIO_I2C2_SCL | GPIO_I2C3_SCL" From 7790a454dd769802da2a74a44ea39e3ff2ab052c Mon Sep 17 00:00:00 2001 From: Matt DeVillier Date: Fri, 23 Dec 2022 16:14:39 -0600 Subject: [PATCH 100/137] ec/google/chromeec: Add copy of vivaldi mapping under CKSC Allows coolstar's Windows drivers to properly map top row keys on devices with vivaldi support Change-Id: I5f0e06b562511481a57aa0895986d441dba326fd Signed-off-by: Matt DeVillier --- src/ec/google/chromeec/ec_acpi.c | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/src/ec/google/chromeec/ec_acpi.c b/src/ec/google/chromeec/ec_acpi.c index 69b10784b34..0699705386a 100644 --- a/src/ec/google/chromeec/ec_acpi.c +++ b/src/ec/google/chromeec/ec_acpi.c @@ -252,6 +252,13 @@ static void fill_ssdt_ps2_keyboard(const struct device *dev) !!(keybd.capabilities & KEYBD_CAP_FUNCTION_KEYS), !!(keybd.capabilities & KEYBD_CAP_NUMERIC_KEYPAD), !!(keybd.capabilities & KEYBD_CAP_SCRNLOCK_KEY)); + + /* add a copy under CKSC as well for coolstar's Windows divers */ + acpigen_ps2_keyboard_dsd("_SB.PCI0.LPCB.EC0.CREC.CKSC", keybd.num_top_row_keys, + ps2_action_keys, + !!(keybd.capabilities & KEYBD_CAP_FUNCTION_KEYS), + !!(keybd.capabilities & KEYBD_CAP_NUMERIC_KEYPAD), + !!(keybd.capabilities & KEYBD_CAP_SCRNLOCK_KEY)); } static const char *ec_acpi_name(const struct device *dev) From 1d7b3d8965d53991882296c6da9015d3b9b0f981 Mon Sep 17 00:00:00 2001 From: Matt DeVillier Date: Thu, 5 Jan 2023 12:06:50 -0600 Subject: [PATCH 101/137] src/device/Kconfig: increase PCIe hotplug defaults Increase default prefetch memory and IO space to support more demanding TB devices Change-Id: Id60aa2e5b7f3ac1798abd6a514dc8235c7545b6a Signed-off-by: Matt DeVillier --- src/device/Kconfig | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/src/device/Kconfig b/src/device/Kconfig index 56e7eb07b85..9bec6d0a88d 100644 --- a/src/device/Kconfig +++ b/src/device/Kconfig @@ -721,12 +721,12 @@ config PCIEXP_HOTPLUG_MEM config PCIEXP_HOTPLUG_PREFETCH_MEM hex "PCI Express Hotplug Prefetch Memory" - default 0x10000000 + default 0x100000000 help This is the amount of pre-fetchable memory space, in bytes, to allocate to hot-plug PCI express bridges, for use by hotplugged child devices. This size should be page-aligned. The default is - 256 MiB. + 4 GiB. config PCIEXP_HOTPLUG_PREFETCH_MEM_ABOVE_4G bool @@ -745,11 +745,11 @@ config PCIEXP_HOTPLUG_PREFETCH_MEM_BELOW_4G config PCIEXP_HOTPLUG_IO hex "PCI Express Hotplug I/O Space" - default 0x2000 + default 0x3000 help This is the amount of I/O space to allocate to hot-plug PCI express bridges, for use by hotplugged child devices. The default - is 8 KiB. + is 12 KiB. endif # PCIEXP_HOTPLUG From 8061d57e026827240e676ad33442d07b02b907c2 Mon Sep 17 00:00:00 2001 From: Matt DeVillier Date: Thu, 5 Jan 2023 12:10:01 -0600 Subject: [PATCH 102/137] soc/intel/tgl: increase PCIe hotplug prefetch memory Change-Id: I80319de12a3eb68fc99625624e4f27b6e8008264 Signed-off-by: Matt DeVillier --- src/soc/intel/tigerlake/Kconfig | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/soc/intel/tigerlake/Kconfig b/src/soc/intel/tigerlake/Kconfig index 0e7bb64a800..519719fe8db 100644 --- a/src/soc/intel/tigerlake/Kconfig +++ b/src/soc/intel/tigerlake/Kconfig @@ -312,7 +312,7 @@ config PCIEXP_HOTPLUG_MEM default 0xc200000 # 194 MiB config PCIEXP_HOTPLUG_PREFETCH_MEM - default 0x1c000000 # 448 MiB + default 0x100000000 # 4GiB endif # SOC_INTEL_ENABLE_USB4_PCIE_RESOURCES From 5d2628ee41029b22692a8278a446ccca5a6197b7 Mon Sep 17 00:00:00 2001 From: Matt DeVillier Date: Thu, 5 Jan 2023 12:10:33 -0600 Subject: [PATCH 103/137] soc/intel/adl: increase PCIe hotplug prefetch memory Change-Id: I973c3faa8a7d4b4f20e2fd431b78a7729aeab280 Signed-off-by: Matt DeVillier --- src/soc/intel/alderlake/Kconfig | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/soc/intel/alderlake/Kconfig b/src/soc/intel/alderlake/Kconfig index 0561d747f29..3bc57a0e495 100644 --- a/src/soc/intel/alderlake/Kconfig +++ b/src/soc/intel/alderlake/Kconfig @@ -226,7 +226,7 @@ config PCIEXP_HOTPLUG_MEM config PCIEXP_HOTPLUG_PREFETCH_MEM hex - default 0x1c000000 + default 0x100000000 endif # SOC_INTEL_ENABLE_USB4_PCIE_RESOURCES From 0951218f3f071c413318b0843bdacabcf6af4219 Mon Sep 17 00:00:00 2001 From: Matt DeVillier Date: Thu, 12 Jan 2023 14:17:26 -0600 Subject: [PATCH 104/137] mb/google/volteer/drobit: Add missing TBT dt entries Change-Id: I43d771eeaf29b4e141b222ccb05af5cb7ceedc6f Signed-off-by: Matt DeVillier --- .../google/volteer/variants/drobit/overridetree.cb | 7 ++++++- 1 file changed, 6 insertions(+), 1 deletion(-) diff --git a/src/mainboard/google/volteer/variants/drobit/overridetree.cb b/src/mainboard/google/volteer/variants/drobit/overridetree.cb index fe5f698c76b..6d2eaf006be 100644 --- a/src/mainboard/google/volteer/variants/drobit/overridetree.cb +++ b/src/mainboard/google/volteer/variants/drobit/overridetree.cb @@ -122,10 +122,15 @@ chip soc/intel/tigerlake end # DPTF device ref tbt_pcie_rp0 on + probe DB_USB USB4_GEN2 probe DB_USB USB4_GEN3 end - device ref tbt_pcie_rp1 on + probe DB_USB USB4_GEN2 + probe DB_USB USB4_GEN3 + end + device ref tbt_dma0 on + probe DB_USB USB4_GEN2 probe DB_USB USB4_GEN3 end From 2792aded4cdf5676fe6c2f22b7598923264203fd Mon Sep 17 00:00:00 2001 From: Matt DeVillier Date: Fri, 13 Jan 2023 10:24:28 -0600 Subject: [PATCH 105/137] mb/google/hatch/var/*: disable pen wakeup ACPI breaks Windows, causes BSOD Change-Id: Idc65d1dc78355113af1605d966066ab30f91bb5a Signed-off-by: Matt DeVillier --- src/mainboard/google/hatch/variants/hatch/overridetree.cb | 4 +--- src/mainboard/google/hatch/variants/helios/overridetree.cb | 4 +--- .../google/hatch/variants/helios_diskswap/overridetree.cb | 4 +--- src/mainboard/google/hatch/variants/kindred/overridetree.cb | 4 +--- src/mainboard/google/hatch/variants/kohaku/overridetree.cb | 4 +--- src/mainboard/google/hatch/variants/mushu/overridetree.cb | 4 +--- 6 files changed, 6 insertions(+), 18 deletions(-) diff --git a/src/mainboard/google/hatch/variants/hatch/overridetree.cb b/src/mainboard/google/hatch/variants/hatch/overridetree.cb index 3f77292c1c7..335ec8b9f03 100644 --- a/src/mainboard/google/hatch/variants/hatch/overridetree.cb +++ b/src/mainboard/google/hatch/variants/hatch/overridetree.cb @@ -115,9 +115,7 @@ chip soc/intel/cannonlake chip drivers/generic/gpio_keys register "name" = ""PENH"" register "gpio" = "ACPI_GPIO_IRQ_EDGE_BOTH(GPP_A8)" - register "key.wake_gpe" = "GPE0_DW0_08" - register "key.wakeup_route" = "WAKEUP_ROUTE_SCI" - register "key.wakeup_event_action" = "EV_ACT_DEASSERTED" + register "key.wakeup_route" = "WAKEUP_ROUTE_DISABLED" register "key.dev_name" = ""EJCT"" register "key.linux_code" = "SW_PEN_INSERTED" register "key.linux_input_type" = "EV_SW" diff --git a/src/mainboard/google/hatch/variants/helios/overridetree.cb b/src/mainboard/google/hatch/variants/helios/overridetree.cb index dd5529ac465..b670740179b 100644 --- a/src/mainboard/google/hatch/variants/helios/overridetree.cb +++ b/src/mainboard/google/hatch/variants/helios/overridetree.cb @@ -125,9 +125,7 @@ chip soc/intel/cannonlake chip drivers/generic/gpio_keys register "name" = ""PENH"" register "gpio" = "ACPI_GPIO_IRQ_EDGE_BOTH(GPP_A8)" - register "key.wake_gpe" = "GPE0_DW0_08" - register "key.wakeup_route" = "WAKEUP_ROUTE_SCI" - register "key.wakeup_event_action" = "EV_ACT_ASSERTED" + register "key.wakeup_route" = "WAKEUP_ROUTE_DISABLED" register "key.dev_name" = ""EJCT"" register "key.linux_code" = "SW_PEN_INSERTED" register "key.linux_input_type" = "EV_SW" diff --git a/src/mainboard/google/hatch/variants/helios_diskswap/overridetree.cb b/src/mainboard/google/hatch/variants/helios_diskswap/overridetree.cb index bc49e847a09..5f3db77e192 100644 --- a/src/mainboard/google/hatch/variants/helios_diskswap/overridetree.cb +++ b/src/mainboard/google/hatch/variants/helios_diskswap/overridetree.cb @@ -137,9 +137,7 @@ chip soc/intel/cannonlake chip drivers/generic/gpio_keys register "name" = ""PENH"" register "gpio" = "ACPI_GPIO_IRQ_EDGE_BOTH(GPP_A8)" - register "key.wake_gpe" = "GPE0_DW0_08" - register "key.wakeup_route" = "WAKEUP_ROUTE_SCI" - register "key.wakeup_event_action" = "EV_ACT_ASSERTED" + register "key.wakeup_route" = "WAKEUP_ROUTE_DISABLED" register "key.dev_name" = ""EJCT"" register "key.linux_code" = "SW_PEN_INSERTED" register "key.linux_input_type" = "EV_SW" diff --git a/src/mainboard/google/hatch/variants/kindred/overridetree.cb b/src/mainboard/google/hatch/variants/kindred/overridetree.cb index 17b79bb3148..d3fe2e09e5e 100644 --- a/src/mainboard/google/hatch/variants/kindred/overridetree.cb +++ b/src/mainboard/google/hatch/variants/kindred/overridetree.cb @@ -176,9 +176,7 @@ chip soc/intel/cannonlake chip drivers/generic/gpio_keys register "name" = ""PENH"" register "gpio" = "ACPI_GPIO_IRQ_EDGE_BOTH(GPP_A8)" - register "key.wake_gpe" = "GPE0_DW0_08" - register "key.wakeup_route" = "WAKEUP_ROUTE_SCI" - register "key.wakeup_event_action" = "EV_ACT_ASSERTED" + register "key.wakeup_route" = "WAKEUP_ROUTE_DISABLED" register "key.dev_name" = ""EJCT"" register "key.linux_code" = "SW_PEN_INSERTED" register "key.linux_input_type" = "EV_SW" diff --git a/src/mainboard/google/hatch/variants/kohaku/overridetree.cb b/src/mainboard/google/hatch/variants/kohaku/overridetree.cb index 915b6c36a64..3969354247a 100644 --- a/src/mainboard/google/hatch/variants/kohaku/overridetree.cb +++ b/src/mainboard/google/hatch/variants/kohaku/overridetree.cb @@ -214,9 +214,7 @@ chip soc/intel/cannonlake register "name" = ""PENH"" # GPP_A16 is the IRQ source, and GPP_A8 is the wake source register "gpio" = "ACPI_GPIO_INPUT_ACTIVE_LOW(GPP_A16)" - register "key.wake_gpe" = "GPE0_DW0_08" - register "key.wakeup_route" = "WAKEUP_ROUTE_SCI" - register "key.wakeup_event_action" = "EV_ACT_DEASSERTED" + register "key.wakeup_route" = "WAKEUP_ROUTE_DISABLED" register "key.dev_name" = ""EJCT"" register "key.linux_code" = "SW_PEN_INSERTED" register "key.linux_input_type" = "EV_SW" diff --git a/src/mainboard/google/hatch/variants/mushu/overridetree.cb b/src/mainboard/google/hatch/variants/mushu/overridetree.cb index 632b1462ac8..115c90da2cf 100644 --- a/src/mainboard/google/hatch/variants/mushu/overridetree.cb +++ b/src/mainboard/google/hatch/variants/mushu/overridetree.cb @@ -135,9 +135,7 @@ chip soc/intel/cannonlake chip drivers/generic/gpio_keys register "name" = ""PENH"" register "gpio" = "ACPI_GPIO_IRQ_EDGE_BOTH(GPP_A8)" - register "key.wake_gpe" = "GPE0_DW0_08" - register "key.wakeup_route" = "WAKEUP_ROUTE_SCI" - register "key.wakeup_event_action" = "EV_ACT_DEASSERTED" + register "key.wakeup_route" = "WAKEUP_ROUTE_DISABLED" register "key.dev_name" = ""EJCT"" register "key.linux_code" = "SW_PEN_INSERTED" register "key.linux_input_type" = "EV_SW" From f0d917932b3a4db2408ed3f1c3076e042628f6ed Mon Sep 17 00:00:00 2001 From: Matt DeVillier Date: Tue, 17 Jan 2023 10:57:42 -0600 Subject: [PATCH 106/137] Add SOF chip driver for HDAS _DSD Change-Id: Ie0431b2002287f35245cbf959828e931d7f375b2 Signed-off-by: Matt DeVillier --- src/drivers/sof/Kconfig | 3 ++ src/drivers/sof/Makefile.inc | 1 + src/drivers/sof/chip.h | 43 ++++++++++++++++++ src/drivers/sof/sof.c | 85 ++++++++++++++++++++++++++++++++++++ 4 files changed, 132 insertions(+) create mode 100644 src/drivers/sof/Kconfig create mode 100644 src/drivers/sof/Makefile.inc create mode 100644 src/drivers/sof/chip.h create mode 100644 src/drivers/sof/sof.c diff --git a/src/drivers/sof/Kconfig b/src/drivers/sof/Kconfig new file mode 100644 index 00000000000..3d8bdd3ec40 --- /dev/null +++ b/src/drivers/sof/Kconfig @@ -0,0 +1,3 @@ +config DRIVERS_AUDIO_SOF + bool + depends on HAVE_ACPI_TABLES diff --git a/src/drivers/sof/Makefile.inc b/src/drivers/sof/Makefile.inc new file mode 100644 index 00000000000..6faabe4500f --- /dev/null +++ b/src/drivers/sof/Makefile.inc @@ -0,0 +1 @@ +ramstage-$(CONFIG_DRIVERS_AUDIO_SOF) += sof.c diff --git a/src/drivers/sof/chip.h b/src/drivers/sof/chip.h new file mode 100644 index 00000000000..134c0deadc8 --- /dev/null +++ b/src/drivers/sof/chip.h @@ -0,0 +1,43 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#ifndef __DRIVERS_AUDIO_SOF_H__ +#define __DRIVERS_AUDIO_SOF_H__ + +#include +#include + +/* Speaker topology */ +enum _spkr_tplg { + max98373 = 1, + max98360a, + max98357a, + max98390, + rt1011, + rt1015, +}; + +/* Jack topology */ +enum _jack_tplg { + cs42l42 = 1, + da7219, + nau8825, + rt5682, +}; + +/* Mic topology */ +enum _mic_tplg { + _1ch = 1, + _2ch_pdm0, + _2ch_pdm1, + _4ch, +}; + + + +struct drivers_sof_config { + unsigned int spkr_tplg; + unsigned int jack_tplg; + unsigned int mic_tplg; +}; + +#endif /* __DRIVERS_AUDIO_SOF_H__ */ diff --git a/src/drivers/sof/sof.c b/src/drivers/sof/sof.c new file mode 100644 index 00000000000..0e2bd8f4750 --- /dev/null +++ b/src/drivers/sof/sof.c @@ -0,0 +1,85 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#include +#include +#include +#include +#include + +#include "chip.h" + +static const char *get_spkr_tplg_str(unsigned int index) { + switch (index) + { + case 1: return "max98373"; + case 2: return "max98360a"; + case 3: return "max98357a"; + case 4: return "max98390"; + case 5: return "rt1011"; + case 6: return "rt1015"; + default: return "default"; + } +} + +static const char *get_jack_tplg_str(unsigned int index) { + switch (index) + { + case 1: return "cs42l42"; + case 2: return "da7219"; + case 3: return "nau8825"; + case 4: return "rt5682"; + default: return "default"; + } +} + +static const char *get_mic_tplg_str(unsigned int index) { + switch (index) + { + case 1: return "1ch"; + case 2: return "2ch-pdm0"; + case 3: return "2ch-pdm1"; + case 4: return "4ch"; + default: return "default"; + } +} + +static void sof_fill_ssdt_generator(const struct device *dev) +{ + struct drivers_sof_config *config = dev->chip_info; + const char *scope = acpi_device_scope(dev); + struct acpi_dp *dsd; + + if (!dev->enabled || !config || !scope) + return; + + /* Device */ + acpigen_write_scope(scope); + + /* DSD */ + dsd = acpi_dp_new_table("_DSD"); + acpi_dp_add_string(dsd, "speaker-tplg", + get_spkr_tplg_str(config->spkr_tplg)); + acpi_dp_add_string(dsd, "hp-tplg", + get_jack_tplg_str(config->jack_tplg)); + acpi_dp_add_string(dsd, "mic-tplg", + get_mic_tplg_str(config->mic_tplg)); + acpi_dp_write(dsd); + acpigen_pop_len(); /* Scope */ +} + + +static struct device_operations sof_ops = { + .read_resources = noop_read_resources, + .set_resources = noop_set_resources, + .acpi_fill_ssdt = sof_fill_ssdt_generator, +}; + +static void sof_enable(struct device *dev) +{ + dev->ops = &sof_ops; +} + +struct chip_operations drivers_sof_ops = { + CHIP_NAME("SOF") + .enable_dev = sof_enable +}; From 66c8c55e39d2f91a2cdaa267973723b035537fd4 Mon Sep 17 00:00:00 2001 From: Matt DeVillier Date: Tue, 17 Jan 2023 11:24:25 -0600 Subject: [PATCH 107/137] md/google/hatch: Add SOF chip driver Change-Id: Ie791fa873fc7bbab84644f5ea5743bdcdc124908 Signed-off-by: Matt DeVillier --- src/mainboard/google/hatch/Kconfig | 1 + .../google/hatch/variants/baseboard/devicetree.cb | 9 ++++++++- .../google/hatch/variants/helios/overridetree.cb | 8 ++++++++ .../hatch/variants/helios_diskswap/overridetree.cb | 7 ++++++- .../google/hatch/variants/kohaku/overridetree.cb | 6 ++++++ .../google/hatch/variants/nightfury/overridetree.cb | 8 ++++++++ .../google/hatch/variants/palkia/overridetree.cb | 6 ++++++ 7 files changed, 43 insertions(+), 2 deletions(-) diff --git a/src/mainboard/google/hatch/Kconfig b/src/mainboard/google/hatch/Kconfig index 3522787c3c6..174978e7e5e 100644 --- a/src/mainboard/google/hatch/Kconfig +++ b/src/mainboard/google/hatch/Kconfig @@ -1,6 +1,7 @@ config BOARD_GOOGLE_BASEBOARD_HATCH def_bool n select BOARD_ROMSIZE_KB_16384 if !BOARD_ROMSIZE_KB_32768 + select DRIVERS_AUDIO_SOF select DRIVERS_GENERIC_GPIO_KEYS select DRIVERS_GENERIC_MAX98357A select DRIVERS_I2C_DA7219 diff --git a/src/mainboard/google/hatch/variants/baseboard/devicetree.cb b/src/mainboard/google/hatch/variants/baseboard/devicetree.cb index 976d82970c8..850813f8d1a 100644 --- a/src/mainboard/google/hatch/variants/baseboard/devicetree.cb +++ b/src/mainboard/google/hatch/variants/baseboard/devicetree.cb @@ -347,7 +347,14 @@ chip soc/intel/cannonlake end # eSPI Interface device pci 1f.1 on end # P2SB device pci 1f.2 hidden end # Power Management Controller - device pci 1f.3 on end # Intel HDA + device pci 1f.3 on + chip drivers/sof + register "spkr_tplg" = "max98357a" + register "jack_tplg" = "rt5682" + register "mic_tplg" = "_2ch_pdm0" + device generic 0 on end + end + end # Intel HDA device pci 1f.4 on end # SMBus device pci 1f.5 on end # PCH SPI device pci 1f.6 off end # GbE diff --git a/src/mainboard/google/hatch/variants/helios/overridetree.cb b/src/mainboard/google/hatch/variants/helios/overridetree.cb index b670740179b..0b8e71d27dd 100644 --- a/src/mainboard/google/hatch/variants/helios/overridetree.cb +++ b/src/mainboard/google/hatch/variants/helios/overridetree.cb @@ -197,5 +197,13 @@ chip soc/intel/cannonlake device spi 1 on end end # FPMCU end # GSPI #1 + device pci 1f.3 on + chip drivers/sof + register "spkr_tplg" = "max98357a" + register "jack_tplg" = "rt1011" + register "mic_tplg" = "_2ch_pdm0" + device generic 0 on end + end + end # Intel HDA end end diff --git a/src/mainboard/google/hatch/variants/helios_diskswap/overridetree.cb b/src/mainboard/google/hatch/variants/helios_diskswap/overridetree.cb index 5f3db77e192..9e458ac523b 100644 --- a/src/mainboard/google/hatch/variants/helios_diskswap/overridetree.cb +++ b/src/mainboard/google/hatch/variants/helios_diskswap/overridetree.cb @@ -216,6 +216,11 @@ chip soc/intel/cannonlake register "sdmode_delay" = "5" device generic 0 on end end - end # Intel HDA + chip drivers/sof + register "spkr_tplg" = "max98357a" + register "jack_tplg" = "rt1011" + register "mic_tplg" = "_2ch_pdm0" + device generic 0 on end + end end end diff --git a/src/mainboard/google/hatch/variants/kohaku/overridetree.cb b/src/mainboard/google/hatch/variants/kohaku/overridetree.cb index 3969354247a..6daa3c66bcf 100644 --- a/src/mainboard/google/hatch/variants/kohaku/overridetree.cb +++ b/src/mainboard/google/hatch/variants/kohaku/overridetree.cb @@ -264,6 +264,12 @@ chip soc/intel/cannonlake register "sdmode_delay" = "5" device generic 0 on end end + chip drivers/sof + register "spkr_tplg" = "max98357a" + register "jack_tplg" = "da7219" + register "mic_tplg" = "_2ch_pdm0" + device generic 0 on end + end end # Intel HDA end # domain end diff --git a/src/mainboard/google/hatch/variants/nightfury/overridetree.cb b/src/mainboard/google/hatch/variants/nightfury/overridetree.cb index 2d7bf45d444..433abaea424 100644 --- a/src/mainboard/google/hatch/variants/nightfury/overridetree.cb +++ b/src/mainboard/google/hatch/variants/nightfury/overridetree.cb @@ -263,5 +263,13 @@ chip soc/intel/cannonlake device pci 1d.5 off end device pci 1a.0 on end #eMMC device pci 1e.3 off end # GSPI #1 + device pci 1f.3 on + chip drivers/sof + register "spkr_tplg" = "max98390" + register "jack_tplg" = "da7219" + register "mic_tplg" = "_2ch_pdm0" + device generic 0 on end + end + end # Intel HDA end # domain end diff --git a/src/mainboard/google/hatch/variants/palkia/overridetree.cb b/src/mainboard/google/hatch/variants/palkia/overridetree.cb index eaf038f4683..1a2f282d331 100644 --- a/src/mainboard/google/hatch/variants/palkia/overridetree.cb +++ b/src/mainboard/google/hatch/variants/palkia/overridetree.cb @@ -193,6 +193,12 @@ chip soc/intel/cannonlake register "sdmode_delay" = "5" device generic 0 on end end + chip drivers/sof + register "spkr_tplg" = "max98357a" + register "jack_tplg" = "rt1011" + register "mic_tplg" = "_2ch_pdm0" + device generic 0 on end + end end # Intel I2S end end From f215a3640156bd8751e8126dfaae10fdbdc81f71 Mon Sep 17 00:00:00 2001 From: Matt DeVillier Date: Tue, 17 Jan 2023 12:25:45 -0600 Subject: [PATCH 108/137] md/google/puff: Add SOF chip driver Change-Id: I421c070eac321c2fc160b8f26868bcb1ec13001e Signed-off-by: Matt DeVillier --- src/mainboard/google/puff/Kconfig | 1 + .../google/puff/variants/baseboard/devicetree.cb | 7 ++++++- src/mainboard/google/puff/variants/dooly/overridetree.cb | 8 ++++++++ 3 files changed, 15 insertions(+), 1 deletion(-) diff --git a/src/mainboard/google/puff/Kconfig b/src/mainboard/google/puff/Kconfig index 746e9441f25..52175440512 100644 --- a/src/mainboard/google/puff/Kconfig +++ b/src/mainboard/google/puff/Kconfig @@ -1,6 +1,7 @@ config BOARD_GOOGLE_BASEBOARD_PUFF def_bool n select BOARD_ROMSIZE_KB_16384 if !BOARD_ROMSIZE_KB_32768 + select DRIVERS_AUDIO_SOF select DRIVERS_GENERIC_GPIO_KEYS select DRIVERS_GENERIC_MAX98357A select DRIVERS_I2C_DA7219 diff --git a/src/mainboard/google/puff/variants/baseboard/devicetree.cb b/src/mainboard/google/puff/variants/baseboard/devicetree.cb index 976d82970c8..eff91b370d4 100644 --- a/src/mainboard/google/puff/variants/baseboard/devicetree.cb +++ b/src/mainboard/google/puff/variants/baseboard/devicetree.cb @@ -347,7 +347,12 @@ chip soc/intel/cannonlake end # eSPI Interface device pci 1f.1 on end # P2SB device pci 1f.2 hidden end # Power Management Controller - device pci 1f.3 on end # Intel HDA + device pci 1f.3 on + chip drivers/sof + register "jack_tplg" = "rt5682" + device generic 0 on end + end + end # Intel HDA device pci 1f.4 on end # SMBus device pci 1f.5 on end # PCH SPI device pci 1f.6 off end # GbE diff --git a/src/mainboard/google/puff/variants/dooly/overridetree.cb b/src/mainboard/google/puff/variants/dooly/overridetree.cb index c40c61ca7e2..a5cf3baa678 100644 --- a/src/mainboard/google/puff/variants/dooly/overridetree.cb +++ b/src/mainboard/google/puff/variants/dooly/overridetree.cb @@ -388,6 +388,14 @@ chip soc/intel/cannonlake register "PcieRpSlotImplemented[10]" = "1" end device pci 1e.3 off end # GSPI #1 + device pci 1f.3 on + chip drivers/sof + register "spkr_tplg" = "rt1015" + register "jack_tplg" = "rt5682" + register "mic_tplg" = "_2ch_pdm0" + device generic 0 on end + end + end # Intel HDA end # VR Settings Configuration for 4 Domains From 57b763265784b505be6c9a5d98decf29295d3ac1 Mon Sep 17 00:00:00 2001 From: Matt DeVillier Date: Tue, 17 Jan 2023 12:20:38 -0600 Subject: [PATCH 109/137] md/google/volteer: Add SOF chip driver Change-Id: I62a96149cec9eeb7b2da8a2337083969a1b0fce0 Signed-off-by: Matt DeVillier --- src/mainboard/google/volteer/Kconfig | 1 + .../google/volteer/variants/baseboard/devicetree.cb | 8 ++++++++ .../google/volteer/variants/chronicler/overridetree.cb | 6 ++++++ .../google/volteer/variants/eldrid/overridetree.cb | 6 ++++++ .../google/volteer/variants/elemi/overridetree.cb | 6 ++++++ .../google/volteer/variants/lindar/overridetree.cb | 6 ++++++ 6 files changed, 33 insertions(+) diff --git a/src/mainboard/google/volteer/Kconfig b/src/mainboard/google/volteer/Kconfig index 368ea7a5770..d2d40eadc72 100644 --- a/src/mainboard/google/volteer/Kconfig +++ b/src/mainboard/google/volteer/Kconfig @@ -1,6 +1,7 @@ config BOARD_GOOGLE_BASEBOARD_VOLTEER def_bool n select BOARD_ROMSIZE_KB_32768 + select DRIVERS_AUDIO_SOF select DRIVERS_GENERIC_GPIO_KEYS select DRIVERS_GENERIC_MAX98357A select DRIVERS_GENESYSLOGIC_GL9763E diff --git a/src/mainboard/google/volteer/variants/baseboard/devicetree.cb b/src/mainboard/google/volteer/variants/baseboard/devicetree.cb index 267ba5f364f..fd3fcf64c24 100644 --- a/src/mainboard/google/volteer/variants/baseboard/devicetree.cb +++ b/src/mainboard/google/volteer/variants/baseboard/devicetree.cb @@ -523,5 +523,13 @@ chip soc/intel/tigerlake device pnp 0c09.0 on end end end + device ref hda on + chip drivers/sof + register "spkr_tplg" = "max98373" + register "jack_tplg" = "rt5682" + register "mic_tplg" = "_2ch_pdm0" + device generic 0 on end + end + end end end diff --git a/src/mainboard/google/volteer/variants/chronicler/overridetree.cb b/src/mainboard/google/volteer/variants/chronicler/overridetree.cb index 4b45bfc3f66..28f72d70d6e 100644 --- a/src/mainboard/google/volteer/variants/chronicler/overridetree.cb +++ b/src/mainboard/google/volteer/variants/chronicler/overridetree.cb @@ -271,6 +271,12 @@ chip soc/intel/tigerlake register "sdmode_delay" = "5" device generic 0 on end end + chip drivers/sof + register "spkr_tplg" = "max98357a" + register "jack_tplg" = "rt5682" + register "mic_tplg" = "_2ch_pdm0" + device generic 0 on end + end end device ref pcie_rp5 on end device ref pmc hidden diff --git a/src/mainboard/google/volteer/variants/eldrid/overridetree.cb b/src/mainboard/google/volteer/variants/eldrid/overridetree.cb index 376296183ae..862e4c88c6e 100644 --- a/src/mainboard/google/volteer/variants/eldrid/overridetree.cb +++ b/src/mainboard/google/volteer/variants/eldrid/overridetree.cb @@ -203,6 +203,12 @@ chip soc/intel/tigerlake register "sdmode_delay" = "5" device generic 0 on end end + chip drivers/sof + register "spkr_tplg" = "max98357a" + register "jack_tplg" = "rt5682" + register "mic_tplg" = "_2ch_pdm1" + device generic 0 on end + end end device ref pmc hidden # The pmc_mux chip driver is a placeholder for the diff --git a/src/mainboard/google/volteer/variants/elemi/overridetree.cb b/src/mainboard/google/volteer/variants/elemi/overridetree.cb index 2ad6c0834a3..2152ec479ac 100644 --- a/src/mainboard/google/volteer/variants/elemi/overridetree.cb +++ b/src/mainboard/google/volteer/variants/elemi/overridetree.cb @@ -272,6 +272,12 @@ chip soc/intel/tigerlake register "sdmode_delay" = "5" device generic 0 on end end + chip drivers/sof + register "spkr_tplg" = "max98357a" + register "jack_tplg" = "rt5682" + register "mic_tplg" = "_2ch_pdm0" + device generic 0 on end + end end device ref pcie_rp5 on end device ref pmc hidden diff --git a/src/mainboard/google/volteer/variants/lindar/overridetree.cb b/src/mainboard/google/volteer/variants/lindar/overridetree.cb index b74bb238cd3..e543b9fd636 100644 --- a/src/mainboard/google/volteer/variants/lindar/overridetree.cb +++ b/src/mainboard/google/volteer/variants/lindar/overridetree.cb @@ -276,6 +276,12 @@ chip soc/intel/tigerlake probe AUDIO MAX98373_ALC5682I_I2S_UP4 probe AUDIO MAX98360_ALC5682I_I2S probe AUDIO RT1011_ALC5682I_I2S + chip drivers/sof + register "spkr_tplg" = "rt1011" + register "jack_tplg" = "rt5682" + register "mic_tplg" = "_2ch_pdm0" + device generic 0 on end + end end device ref pcie_rp9 on chip soc/intel/common/block/pcie/rtd3 From e51eed58eaff649c343fc269317af376adc372a2 Mon Sep 17 00:00:00 2001 From: Matt DeVillier Date: Tue, 17 Jan 2023 13:44:23 -0600 Subject: [PATCH 110/137] md/google/brya: Add SOF chip driver Change-Id: I12614b85f9779cc40d83a9c868cc46b110f26af6 Signed-off-by: Matt DeVillier --- src/mainboard/google/brya/Kconfig | 1 + .../google/brya/variants/banshee/overridetree.cb | 6 ++++++ .../google/brya/variants/baseboard/brya/devicetree.cb | 9 ++++++++- .../google/brya/variants/felwinter/overridetree.cb | 6 ++++++ src/mainboard/google/brya/variants/kano/overridetree.cb | 8 ++++++++ .../google/brya/variants/osiris/overridetree.cb | 6 ++++++ src/mainboard/google/brya/variants/taeko/overridetree.cb | 6 ++++++ .../google/brya/variants/taeko4es/overridetree.cb | 6 ++++++ .../google/brya/variants/taniks/overridetree.cb | 6 ++++++ .../google/brya/variants/volmar/overridetree.cb | 8 ++++++++ 10 files changed, 61 insertions(+), 1 deletion(-) diff --git a/src/mainboard/google/brya/Kconfig b/src/mainboard/google/brya/Kconfig index b3f948733e9..e26a0d0f26c 100644 --- a/src/mainboard/google/brya/Kconfig +++ b/src/mainboard/google/brya/Kconfig @@ -42,6 +42,7 @@ config BOARD_GOOGLE_BASEBOARD_BRYA def_bool n select BOARD_GOOGLE_BRYA_COMMON select BOARD_ROMSIZE_KB_32768 + select DRIVERS_AUDIO_SOF select HAVE_SLP_S0_GATE select MEMORY_SOLDERDOWN if !BOARD_GOOGLE_BANSHEE select SOC_INTEL_ALDERLAKE_PCH_P diff --git a/src/mainboard/google/brya/variants/banshee/overridetree.cb b/src/mainboard/google/brya/variants/banshee/overridetree.cb index faed00d04ca..8fa8ea6ad34 100644 --- a/src/mainboard/google/brya/variants/banshee/overridetree.cb +++ b/src/mainboard/google/brya/variants/banshee/overridetree.cb @@ -275,6 +275,12 @@ chip soc/intel/alderlake register "sdmode_delay" = "5" device generic 0 on end end + chip drivers/sof + register "spkr_tplg" = "max98360a" + register "jack_tplg" = "rt5682" + register "mic_tplg" = "_2ch_pdm1" + device generic 0 on end + end end device ref gspi1 off end device ref pch_espi on diff --git a/src/mainboard/google/brya/variants/baseboard/brya/devicetree.cb b/src/mainboard/google/brya/variants/baseboard/brya/devicetree.cb index fd589ba0816..9c7635a5cfc 100644 --- a/src/mainboard/google/brya/variants/baseboard/brya/devicetree.cb +++ b/src/mainboard/google/brya/variants/baseboard/brya/devicetree.cb @@ -197,6 +197,13 @@ chip soc/intel/alderlake device pnp 0c09.0 on end end end - device ref hda on end + device ref hda on + chip drivers/sof + register "spkr_tplg" = "max98360a" + register "jack_tplg" = "rt5682" + register "mic_tplg" = "_2ch_pdm0" + device generic 0 on end + end + end end end diff --git a/src/mainboard/google/brya/variants/felwinter/overridetree.cb b/src/mainboard/google/brya/variants/felwinter/overridetree.cb index e0a3f3d7ba9..087b7b1a029 100644 --- a/src/mainboard/google/brya/variants/felwinter/overridetree.cb +++ b/src/mainboard/google/brya/variants/felwinter/overridetree.cb @@ -316,6 +316,12 @@ chip soc/intel/alderlake register "sdmode_delay" = "5" device generic 0 on end end + chip drivers/sof + register "spkr_tplg" = "max98360a" + register "jack_tplg" = "rt5682" + register "mic_tplg" = "_2ch_pdm1" + device generic 0 on end + end end device ref pch_espi on chip ec/google/chromeec diff --git a/src/mainboard/google/brya/variants/kano/overridetree.cb b/src/mainboard/google/brya/variants/kano/overridetree.cb index 2eca4499a89..46ce167e857 100644 --- a/src/mainboard/google/brya/variants/kano/overridetree.cb +++ b/src/mainboard/google/brya/variants/kano/overridetree.cb @@ -558,5 +558,13 @@ chip soc/intel/alderlake end end end + device ref hda on + chip drivers/sof + register "spkr_tplg" = "max98373" + register "jack_tplg" = "nau8825" + register "mic_tplg" = "_2ch_pdm0" + device generic 0 on end + end + end end end diff --git a/src/mainboard/google/brya/variants/osiris/overridetree.cb b/src/mainboard/google/brya/variants/osiris/overridetree.cb index 702c8b13763..5f46ad1a67d 100644 --- a/src/mainboard/google/brya/variants/osiris/overridetree.cb +++ b/src/mainboard/google/brya/variants/osiris/overridetree.cb @@ -239,6 +239,12 @@ chip soc/intel/alderlake probe AUDIO MAX98360_NAU88L25B_I2S end end + chip drivers/sof + register "spkr_tplg" = "max98360a" + register "jack_tplg" = "nau8825" + register "mic_tplg" = "_2ch_pdm0" + device generic 0 on end + end end device ref pcie_rp6 off end # PCIE6 WWAN device ref pcie_rp7 on diff --git a/src/mainboard/google/brya/variants/taeko/overridetree.cb b/src/mainboard/google/brya/variants/taeko/overridetree.cb index 3f4a6ac38ad..126f171a593 100644 --- a/src/mainboard/google/brya/variants/taeko/overridetree.cb +++ b/src/mainboard/google/brya/variants/taeko/overridetree.cb @@ -502,6 +502,12 @@ chip soc/intel/alderlake probe AUDIO AUDIO_MAX98357_ALC5682I_VS_I2S end end + chip drivers/sof + register "spkr_tplg" = "max98357a" + register "jack_tplg" = "rt5682" + register "mic_tplg" = "_2ch_pdm0" + device generic 0 on end + end end device ref pcie_rp5 on chip soc/intel/common/block/pcie/rtd3 diff --git a/src/mainboard/google/brya/variants/taeko4es/overridetree.cb b/src/mainboard/google/brya/variants/taeko4es/overridetree.cb index e2481a19901..001e2b2cd86 100644 --- a/src/mainboard/google/brya/variants/taeko4es/overridetree.cb +++ b/src/mainboard/google/brya/variants/taeko4es/overridetree.cb @@ -368,6 +368,12 @@ chip soc/intel/alderlake probe AUDIO AUDIO_MAX98357_ALC5682I_VS_I2S end end + chip drivers/sof + register "spkr_tplg" = "max98357a" + register "jack_tplg" = "rt5682" + register "mic_tplg" = "_2ch_pdm0" + device generic 0 on end + end end device ref pcie_rp5 on chip soc/intel/common/block/pcie/rtd3 diff --git a/src/mainboard/google/brya/variants/taniks/overridetree.cb b/src/mainboard/google/brya/variants/taniks/overridetree.cb index 7531a8d7bdc..b90c8de74ca 100644 --- a/src/mainboard/google/brya/variants/taniks/overridetree.cb +++ b/src/mainboard/google/brya/variants/taniks/overridetree.cb @@ -335,6 +335,12 @@ chip soc/intel/alderlake probe AUDIO AUDIO_MAX98357_ALC5682I_I2S_2WAY end end + chip drivers/sof + register "spkr_tplg" = "max98357a" + register "jack_tplg" = "rt5682" + register "mic_tplg" = "_2ch_pdm0" + device generic 0 on end + end end device ref pcie_rp5 on chip soc/intel/common/block/pcie/rtd3 diff --git a/src/mainboard/google/brya/variants/volmar/overridetree.cb b/src/mainboard/google/brya/variants/volmar/overridetree.cb index 956e74c2181..0f2de60ff09 100644 --- a/src/mainboard/google/brya/variants/volmar/overridetree.cb +++ b/src/mainboard/google/brya/variants/volmar/overridetree.cb @@ -419,5 +419,13 @@ chip soc/intel/alderlake end end end + device ref hda on + chip drivers/sof + register "spkr_tplg" = "max98373" + register "jack_tplg" = "nau8825" + register "mic_tplg" = "_2ch_pdm0" + device generic 0 on end + end + end end end From 42770e85be8535acc33ad71bf9b58bbe71843d8b Mon Sep 17 00:00:00 2001 From: Matt DeVillier Date: Tue, 17 Jan 2023 13:51:29 -0600 Subject: [PATCH 111/137] vc/google: remove dep on CHROMEOS for DSM_CALIB Change-Id: I643b3581bcc662befc9e30736dae806f94b055af Signed-off-by: Matt DeVillier --- src/vendorcode/google/Kconfig | 19 +++++++++++++++++++ src/vendorcode/google/Makefile.inc | 1 + src/vendorcode/google/chromeos/Kconfig | 18 +----------------- src/vendorcode/google/chromeos/Makefile.inc | 1 - .../google/{chromeos => }/dsm_calib.c | 0 5 files changed, 21 insertions(+), 18 deletions(-) rename src/vendorcode/google/{chromeos => }/dsm_calib.c (100%) diff --git a/src/vendorcode/google/Kconfig b/src/vendorcode/google/Kconfig index 60c0c228a79..87564e8d138 100644 --- a/src/vendorcode/google/Kconfig +++ b/src/vendorcode/google/Kconfig @@ -9,3 +9,22 @@ config GOOGLE_SMBIOS_MAINBOARD_VERSION help Provide a common implementation for mainboard version, which returns a formatted 'rev%d' board_id() string. + +config CHROMEOS_DSM_CALIB + bool + default n + depends on VPD + help + On some boards, there are calibrated parameters for Dynamic Speaker Management(DSM) + stored in VPD. Enable this config to read and parse these VPD values and write them + to ACPI DSD table in device driver. These parameters will be applied by kernel driver + through device property at boot. + +config CHROMEOS_DSM_PARAM_FILE_NAME + bool + default n + depends on CHROMEOS_DSM_CALIB + help + On some boards, there are different dsm parameter files for Dynamic Speaker + Management (DSM). Enable this config to assign dsm parameters file name in ACPI + SSDT table. Kernel driver uses this to load the DSM parameter file. diff --git a/src/vendorcode/google/Makefile.inc b/src/vendorcode/google/Makefile.inc index c67ea20268e..8479feb9ee0 100644 --- a/src/vendorcode/google/Makefile.inc +++ b/src/vendorcode/google/Makefile.inc @@ -2,4 +2,5 @@ subdirs-$(CONFIG_CHROMEOS) += chromeos +ramstage-$(CONFIG_CHROMEOS_DSM_CALIB) += dsm_calib.c ramstage-$(CONFIG_GOOGLE_SMBIOS_MAINBOARD_VERSION) += smbios.c diff --git a/src/vendorcode/google/chromeos/Kconfig b/src/vendorcode/google/chromeos/Kconfig index 868492062ea..00c4f1f5052 100644 --- a/src/vendorcode/google/chromeos/Kconfig +++ b/src/vendorcode/google/chromeos/Kconfig @@ -57,23 +57,6 @@ config CHROMEOS_USE_EC_WATCHDOG_FLAG help Use the AP watchdog flag stored in EC. -config CHROMEOS_DSM_CALIB - bool - default n - help - On some boards, there are calibrated parameters for Dynamic Speaker Management(DSM) - stored in VPD. Enable this config to read and parse these VPD values and write them - to ACPI DSD table in device driver. These parameters will be applied by kernel driver - through device property at boot. - -config CHROMEOS_DSM_PARAM_FILE_NAME - bool - default n - help - On some boards, there are different dsm parameter files for Dynamic Speaker - Management (DSM). Enable this config to assign dsm parameters file name in ACPI - SSDT table. Kernel driver uses this to load the DSM parameter file. - config CHROMEOS_CSE_BOARD_RESET_OVERRIDE bool default n @@ -97,4 +80,5 @@ config CHROMEOS_NVS depends on ACPI_SOC_NVS endif # CHROMEOS + endmenu diff --git a/src/vendorcode/google/chromeos/Makefile.inc b/src/vendorcode/google/chromeos/Makefile.inc index ce77194070b..fbfd7a4e2fd 100644 --- a/src/vendorcode/google/chromeos/Makefile.inc +++ b/src/vendorcode/google/chromeos/Makefile.inc @@ -8,7 +8,6 @@ ramstage-y += vpd_mac.c vpd_serialno.c vpd_calibration.c ramstage-$(CONFIG_CHROMEOS_DISABLE_PLATFORM_HIERARCHY_ON_RESUME) += tpm2.c ramstage-$(CONFIG_HAVE_REGULATORY_DOMAIN) += wrdd.c ramstage-$(CONFIG_USE_SAR) += sar.c -ramstage-$(CONFIG_CHROMEOS_DSM_CALIB) += dsm_calib.c ramstage-$(CONFIG_TPM_GOOGLE) += cr50_enable_update.c romstage-$(CONFIG_CHROMEOS_CSE_BOARD_RESET_OVERRIDE) += cse_board_reset.c diff --git a/src/vendorcode/google/chromeos/dsm_calib.c b/src/vendorcode/google/dsm_calib.c similarity index 100% rename from src/vendorcode/google/chromeos/dsm_calib.c rename to src/vendorcode/google/dsm_calib.c From 1c2df875b5b70d3cbd12ba3f847f4f3a7d3db318 Mon Sep 17 00:00:00 2001 From: Matt DeVillier Date: Tue, 17 Jan 2023 13:51:56 -0600 Subject: [PATCH 112/137] mb/google/*: remove dep on CHROMEOS for DSM_CALIB Change-Id: I5e46833348a79d3531e3a1245dc767b54963c212 Signed-off-by: Matt DeVillier --- src/mainboard/google/brya/Kconfig.name | 12 ++++++------ src/mainboard/google/hatch/Kconfig | 8 ++++---- src/mainboard/google/volteer/Kconfig | 2 +- 3 files changed, 11 insertions(+), 11 deletions(-) diff --git a/src/mainboard/google/brya/Kconfig.name b/src/mainboard/google/brya/Kconfig.name index 567985b4956..6969ff6cdd9 100644 --- a/src/mainboard/google/brya/Kconfig.name +++ b/src/mainboard/google/brya/Kconfig.name @@ -57,16 +57,16 @@ config BOARD_GOOGLE_FELWINTER config BOARD_GOOGLE_GIMBLE bool "-> Gimble" select BOARD_GOOGLE_BASEBOARD_BRYA - select CHROMEOS_DSM_CALIB if CHROMEOS - select CHROMEOS_DSM_PARAM_FILE_NAME if CHROMEOS + select CHROMEOS_DSM_CALIB + select CHROMEOS_DSM_PARAM_FILE_NAME select DRIVERS_GENESYSLOGIC_GL9750 select DRIVERS_I2C_MAX98390 config BOARD_GOOGLE_GIMBLE4ES bool "-> Gimble4ES" select BOARD_GOOGLE_BASEBOARD_BRYA - select CHROMEOS_DSM_CALIB if CHROMEOS - select CHROMEOS_DSM_PARAM_FILE_NAME if CHROMEOS + select CHROMEOS_DSM_CALIB + select CHROMEOS_DSM_PARAM_FILE_NAME select DEFAULT_ADL_NEM select DRIVERS_GENESYSLOGIC_GL9750 select DRIVERS_I2C_MAX98390 @@ -118,7 +118,7 @@ config BOARD_GOOGLE_PRIMUS4ES config BOARD_GOOGLE_REDRIX bool "-> Redrix" select BOARD_GOOGLE_BASEBOARD_BRYA - select CHROMEOS_DSM_CALIB if CHROMEOS + select CHROMEOS_DSM_CALIB select CHROMEOS_DSM_PARAM_FILE_NAME if CHROMEOS select DRIVERS_GENESYSLOGIC_GL9755 select DRIVERS_GFX_GENERIC @@ -130,7 +130,7 @@ config BOARD_GOOGLE_REDRIX config BOARD_GOOGLE_REDRIX4ES bool "-> Redrix4ES" select BOARD_GOOGLE_BASEBOARD_BRYA - select CHROMEOS_DSM_CALIB if CHROMEOS + select CHROMEOS_DSM_CALIB select CHROMEOS_DSM_PARAM_FILE_NAME if CHROMEOS select DEFAULT_ADL_NEM select DRIVERS_GENESYSLOGIC_GL9755 diff --git a/src/mainboard/google/hatch/Kconfig b/src/mainboard/google/hatch/Kconfig index 174978e7e5e..9e7730544a8 100644 --- a/src/mainboard/google/hatch/Kconfig +++ b/src/mainboard/google/hatch/Kconfig @@ -44,13 +44,13 @@ config BOARD_GOOGLE_HATCH config BOARD_GOOGLE_HELIOS select BOARD_GOOGLE_BASEBOARD_HATCH - select CHROMEOS_DSM_CALIB if CHROMEOS + select CHROMEOS_DSM_CALIB select DRIVERS_I2C_RT1011 select INTEL_GMA_HAVE_VBT config BOARD_GOOGLE_HELIOS_DISKSWAP select BOARD_GOOGLE_BASEBOARD_HATCH - select CHROMEOS_DSM_CALIB if CHROMEOS + select CHROMEOS_DSM_CALIB select DRIVERS_I2C_RT1011 select INTEL_GMA_HAVE_VBT @@ -74,13 +74,13 @@ config BOARD_GOOGLE_MUSHU config BOARD_GOOGLE_NIGHTFURY select BOARD_GOOGLE_BASEBOARD_HATCH - select CHROMEOS_DSM_CALIB if CHROMEOS + select CHROMEOS_DSM_CALIB select DRIVERS_I2C_MAX98390 select INTEL_GMA_HAVE_VBT config BOARD_GOOGLE_PALKIA select BOARD_GOOGLE_BASEBOARD_HATCH - select CHROMEOS_DSM_CALIB if CHROMEOS + select CHROMEOS_DSM_CALIB select DRIVERS_I2C_RT1011 if BOARD_GOOGLE_BASEBOARD_HATCH diff --git a/src/mainboard/google/volteer/Kconfig b/src/mainboard/google/volteer/Kconfig index d2d40eadc72..bc71d651c44 100644 --- a/src/mainboard/google/volteer/Kconfig +++ b/src/mainboard/google/volteer/Kconfig @@ -53,7 +53,7 @@ config BOARD_GOOGLE_HALVOR config BOARD_GOOGLE_LINDAR select BOARD_GOOGLE_BASEBOARD_VOLTEER - select CHROMEOS_DSM_CALIB if CHROMEOS + select CHROMEOS_DSM_CALIB select DRIVERS_GENERIC_BAYHUB_LV2 select DRIVERS_I2C_RT1011 select INTEL_CAR_NEM From f05dcd47c75a768d844076ce0c6d2b0f199b87b4 Mon Sep 17 00:00:00 2001 From: Matt DeVillier Date: Tue, 17 Jan 2023 14:09:46 -0600 Subject: [PATCH 113/137] md/google/dedede: Add SOF chip driver Change-Id: I9452b11af614d8727aa8dd448e37f7a06faa450d Signed-off-by: Matt DeVillier --- src/mainboard/google/dedede/Kconfig | 1 + .../dedede/variants/baseboard/devicetree.cb | 28 ++++++++++++++++++- 2 files changed, 28 insertions(+), 1 deletion(-) diff --git a/src/mainboard/google/dedede/Kconfig b/src/mainboard/google/dedede/Kconfig index ca72da1ac4b..a24a5a9680f 100644 --- a/src/mainboard/google/dedede/Kconfig +++ b/src/mainboard/google/dedede/Kconfig @@ -1,6 +1,7 @@ config BOARD_GOOGLE_BASEBOARD_DEDEDE def_bool n select BOARD_ROMSIZE_KB_16384 if !BOARD_ROMSIZE_KB_32768 + select DRIVERS_AUDIO_SOF select DRIVERS_GENERIC_GPIO_KEYS select DRIVERS_I2C_CS42L42 select DRIVERS_I2C_GENERIC diff --git a/src/mainboard/google/dedede/variants/baseboard/devicetree.cb b/src/mainboard/google/dedede/variants/baseboard/devicetree.cb index 2124dc4cb17..30a971c3267 100644 --- a/src/mainboard/google/dedede/variants/baseboard/devicetree.cb +++ b/src/mainboard/google/dedede/variants/baseboard/devicetree.cb @@ -384,7 +384,33 @@ chip soc/intel/jasperlake end # eSPI Interface device pci 1f.1 on end # P2SB device pci 1f.2 hidden end # Power Management Controller - device pci 1f.3 off end # Intel HDA/cAVS + device pci 1f.3 on + chip drivers/sof + register "spkr_tplg" = "rt1015" + register "jack_tplg" = "rt5682" + register "mic_tplg" = "_2ch_pdm0" + device generic 0 on + probe AUDIO_AMP RT1015_I2C + probe AUDIO_AMP RT1015P_AUTO + end + end + chip drivers/sof + register "spkr_tplg" = "max98360a" + register "jack_tplg" = "rt5682" + register "mic_tplg" = "_2ch_pdm0" + device generic 0 on + probe AUDIO_AMP MAX98360 + end + end + chip drivers/sof + register "spkr_tplg" = "max98357a" + register "jack_tplg" = "rt5682" + register "mic_tplg" = "_2ch_pdm0" + device generic 0 on + probe AUDIO_AMP UNPROVISIONED + end + end + end # Intel HDA/cAVS device pci 1f.4 off end # SMBus device pci 1f.5 on end # PCH SPI device pci 1f.7 off end # Intel Trace Hub From dfd81cdd3f2359376161125a94202e5759984611 Mon Sep 17 00:00:00 2001 From: Matt DeVillier Date: Wed, 18 Jan 2023 18:58:38 -0600 Subject: [PATCH 114/137] soc/intel/{adl,mtl,tgl}: change selection for DEFAULT_SOFTWARE_CONNECTION_MANAGER Needs to be selected for ChromeOS mainboards even for non-ChromeOS builds, else Thunderbolt/USB4 doesn't work under Windows (and likely Linux as well). TEST=build/boot Windows on drobit/banshee, verify TB functional Change-Id: Iee3f99840f0c6cc384d9fdef6dff55bcbfc0380f Signed-off-by: Matt DeVillier --- src/soc/intel/alderlake/Kconfig | 4 +--- src/soc/intel/meteorlake/Kconfig | 4 +--- src/soc/intel/tigerlake/Kconfig | 4 +--- 3 files changed, 3 insertions(+), 9 deletions(-) diff --git a/src/soc/intel/alderlake/Kconfig b/src/soc/intel/alderlake/Kconfig index 3bc57a0e495..b96c03991fa 100644 --- a/src/soc/intel/alderlake/Kconfig +++ b/src/soc/intel/alderlake/Kconfig @@ -54,6 +54,7 @@ config CPU_SPECIFIC_OPTIONS select CPU_INTEL_FIRMWARE_INTERFACE_TABLE select CPU_SUPPORTS_INTEL_TME select CPU_SUPPORTS_PM_TIMER_EMULATION + select DEFAULT_SOFTWARE_CONNECTION_MANAGER if MAINBOARD_HAS_CHROMEOS select DISPLAY_FSP_VERSION_INFO select DRIVERS_USB_ACPI select EDK2_CPU_TIMER_LIB if PAYLOAD_EDK2 @@ -438,9 +439,6 @@ config ACPI_ADL_IPU_ES_SUPPORT help Enables ACPI entry to provide silicon type information to IPU kernel driver. -config CHROMEOS - select DEFAULT_SOFTWARE_CONNECTION_MANAGER - config ALDERLAKE_ENABLE_SOC_WORKAROUND bool default y diff --git a/src/soc/intel/meteorlake/Kconfig b/src/soc/intel/meteorlake/Kconfig index b84cc552b8f..ee807a59800 100644 --- a/src/soc/intel/meteorlake/Kconfig +++ b/src/soc/intel/meteorlake/Kconfig @@ -16,6 +16,7 @@ config CPU_SPECIFIC_OPTIONS select CPU_INTEL_FIRMWARE_INTERFACE_TABLE select CPU_SUPPORTS_INTEL_TME select CPU_SUPPORTS_PM_TIMER_EMULATION + select DEFAULT_SOFTWARE_CONNECTION_MANAGER if MAINBOARD_HAS_CHROMEOS select DEFAULT_X2APIC_LATE_WORKAROUND select DISPLAY_FSP_VERSION_INFO_2 select DRIVERS_USB_ACPI @@ -333,9 +334,6 @@ config MRC_CHANNEL_WIDTH int default 16 -config CHROMEOS - select DEFAULT_SOFTWARE_CONNECTION_MANAGER - config SOC_INTEL_GFX_FRAMEBUFFER_OFFSET hex default 0x800000 diff --git a/src/soc/intel/tigerlake/Kconfig b/src/soc/intel/tigerlake/Kconfig index 519719fe8db..32920f6f890 100644 --- a/src/soc/intel/tigerlake/Kconfig +++ b/src/soc/intel/tigerlake/Kconfig @@ -18,6 +18,7 @@ config CPU_SPECIFIC_OPTIONS select CPU_INTEL_FIRMWARE_INTERFACE_TABLE select CPU_SUPPORTS_INTEL_TME select CPU_SUPPORTS_PM_TIMER_EMULATION + select DEFAULT_SOFTWARE_CONNECTION_MANAGER if MAINBOARD_HAS_CHROMEOS select DISPLAY_FSP_VERSION_INFO if !FSP_TYPE_IOT select DRIVERS_USB_ACPI select EDK2_CPU_TIMER_LIB if PAYLOAD_EDK2 @@ -295,9 +296,6 @@ config MRC_CHANNEL_WIDTH int default 16 -config CHROMEOS - select DEFAULT_SOFTWARE_CONNECTION_MANAGER - # Intel recommends reserving the following resources per USB4 root port, # from TGL BIOS Spec (doc #611569) Revision 0.7.6 Section 7.2.5.1.5 # - 42 buses From 853f6539b1b1a3ab316a1043b433bc5ed6c10c53 Mon Sep 17 00:00:00 2001 From: Matt DeVillier Date: Thu, 19 Jan 2023 15:25:39 -0600 Subject: [PATCH 115/137] mb/google/hatch/kohaku: Fix touchscreen power sequencing Commit 525c61f74e94c1dbdf4b54ac8157d950695fc03f (mb/google/hatch: Implement touchscreen power sequencing) contains a copy/paste error; KOHAKU's enable GPIO is set twice in ramstage, and the reset GPIO not at all, leading the touchscreen to not be detected. Correct the copy/paste error by replacing the 2nd instance of GPP_C12 with GPP_D15. TEST=build/boot Windows/Linux on KOHAKU, verify touchscreen works. Change-Id: I08d35f1e2a951cdaa463daa34df2134fdc8c65c8 Signed-off-by: Matt DeVillier --- src/mainboard/google/hatch/variants/kohaku/gpio.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/mainboard/google/hatch/variants/kohaku/gpio.c b/src/mainboard/google/hatch/variants/kohaku/gpio.c index 131b91ddd3b..73ecff06b70 100644 --- a/src/mainboard/google/hatch/variants/kohaku/gpio.c +++ b/src/mainboard/google/hatch/variants/kohaku/gpio.c @@ -37,7 +37,7 @@ static const struct pad_config gpio_table[] = { /* C23 : UART2_CTS# ==> NC */ PAD_NC(GPP_C23, NONE), /* D15 : TOUCHSCREEN_RST_L */ - PAD_CFG_GPO(GPP_C12, 1, DEEP), + PAD_CFG_GPO(GPP_D15, 1, DEEP), /* D16 : TOUCHSCREEN_INT_L */ PAD_CFG_GPI_APIC(GPP_D16, NONE, PLTRST, LEVEL, INVERT), /* E23 : GPP_E23 ==> NC */ From 3ae95e856089c3d922e4f05ecf7f7f3bb7e90c81 Mon Sep 17 00:00:00 2001 From: Matt DeVillier Date: Thu, 19 Jan 2023 15:47:13 -0600 Subject: [PATCH 116/137] mb/google/*: disable S0ix / enable S3 Change-Id: I8d0197c94e516db52a5c731e7f32498575c183bf Signed-off-by: Matt DeVillier --- src/mainboard/google/auron/devicetree.cb | 2 +- src/mainboard/google/brya/Kconfig | 4 ++++ .../google/brya/variants/baseboard/brask/devicetree.cb | 2 +- .../google/brya/variants/baseboard/brya/devicetree.cb | 2 +- .../google/brya/variants/baseboard/nissa/devicetree.cb | 2 +- .../google/brya/variants/baseboard/skolas/devicetree.cb | 2 +- src/mainboard/google/dedede/variants/baseboard/devicetree.cb | 2 +- src/mainboard/google/drallion/variants/drallion/devicetree.cb | 2 +- src/mainboard/google/fizz/variants/baseboard/devicetree.cb | 2 +- .../google/guybrush/variants/baseboard/devicetree.cb | 2 +- src/mainboard/google/hatch/variants/baseboard/devicetree.cb | 2 +- src/mainboard/google/octopus/variants/baseboard/devicetree.cb | 2 +- src/mainboard/google/poppy/variants/atlas/devicetree.cb | 2 +- src/mainboard/google/poppy/variants/baseboard/devicetree.cb | 2 +- src/mainboard/google/poppy/variants/nami/devicetree.cb | 2 +- src/mainboard/google/poppy/variants/nautilus/devicetree.cb | 2 +- src/mainboard/google/poppy/variants/nocturne/devicetree.cb | 2 +- src/mainboard/google/poppy/variants/rammus/devicetree.cb | 2 +- src/mainboard/google/poppy/variants/soraka/devicetree.cb | 2 +- src/mainboard/google/puff/variants/baseboard/devicetree.cb | 2 +- src/mainboard/google/reef/variants/baseboard/devicetree.cb | 2 +- src/mainboard/google/reef/variants/coral/devicetree.cb | 2 +- src/mainboard/google/reef/variants/pyro/devicetree.cb | 2 +- src/mainboard/google/reef/variants/sand/devicetree.cb | 2 +- src/mainboard/google/reef/variants/snappy/devicetree.cb | 2 +- src/mainboard/google/rex/variants/baseboard/rex/devicetree.cb | 2 +- src/mainboard/google/sarien/variants/arcada/devicetree.cb | 2 +- src/mainboard/google/sarien/variants/sarien/devicetree.cb | 2 +- src/mainboard/google/volteer/Kconfig | 1 + src/mainboard/google/volteer/variants/baseboard/devicetree.cb | 2 +- 30 files changed, 33 insertions(+), 28 deletions(-) diff --git a/src/mainboard/google/auron/devicetree.cb b/src/mainboard/google/auron/devicetree.cb index 2ded45256d8..930a891d541 100644 --- a/src/mainboard/google/auron/devicetree.cb +++ b/src/mainboard/google/auron/devicetree.cb @@ -17,7 +17,7 @@ chip soc/intel/broadwell chip cpu/intel/haswell device cpu_cluster 0 on ops broadwell_cpu_bus_ops end - register "s0ix_enable" = "1" + register "s0ix_enable" = "0" end device domain 0 on diff --git a/src/mainboard/google/brya/Kconfig b/src/mainboard/google/brya/Kconfig index e26a0d0f26c..e946c189094 100644 --- a/src/mainboard/google/brya/Kconfig +++ b/src/mainboard/google/brya/Kconfig @@ -46,6 +46,7 @@ config BOARD_GOOGLE_BASEBOARD_BRYA select HAVE_SLP_S0_GATE select MEMORY_SOLDERDOWN if !BOARD_GOOGLE_BANSHEE select SOC_INTEL_ALDERLAKE_PCH_P + select SOC_INTEL_ALDERLAKE_S3 select SOC_INTEL_CSE_PRE_CPU_RESET_TELEMETRY select SYSTEM_TYPE_LAPTOP select TPM_GOOGLE_CR50 @@ -61,6 +62,7 @@ config BOARD_GOOGLE_BASEBOARD_BRASK select RT8168_GET_MAC_FROM_VPD select RT8168_SET_LED_MODE select SOC_INTEL_ALDERLAKE_PCH_P + select SOC_INTEL_ALDERLAKE_S3 select SOC_INTEL_CSE_PRE_CPU_RESET_TELEMETRY select TPM_GOOGLE_CR50 select CR50_RESET_CLEAR_EC_AP_IDLE_FLAG @@ -74,6 +76,7 @@ config BOARD_GOOGLE_BASEBOARD_NISSA select MAINBOARD_DISABLE_STAGE_CACHE select MEMORY_SOLDERDOWN select SOC_INTEL_ALDERLAKE_PCH_N + select SOC_INTEL_ALDERLAKE_S3 select SOC_INTEL_CSE_LITE_COMPRESS_ME_RW select SOC_INTEL_CSE_LITE_SYNC_IN_RAMSTAGE select SYSTEM_TYPE_LAPTOP @@ -87,6 +90,7 @@ config BOARD_GOOGLE_BASEBOARD_SKOLAS select HAVE_SLP_S0_GATE select MEMORY_SOLDERDOWN if !BOARD_GOOGLE_BANSHEE select SOC_INTEL_ALDERLAKE_PCH_P + select SOC_INTEL_ALDERLAKE_S3 select SOC_INTEL_CSE_PRE_CPU_RESET_TELEMETRY select SOC_INTEL_RAPTORLAKE select SYSTEM_TYPE_LAPTOP diff --git a/src/mainboard/google/brya/variants/baseboard/brask/devicetree.cb b/src/mainboard/google/brya/variants/baseboard/brask/devicetree.cb index 65e481e226b..f9ece23a738 100644 --- a/src/mainboard/google/brya/variants/baseboard/brask/devicetree.cb +++ b/src/mainboard/google/brya/variants/baseboard/brask/devicetree.cb @@ -15,7 +15,7 @@ chip soc/intel/alderlake register "gen3_dec" = "0x00fc0901" # S0ix enable - register "s0ix_enable" = "1" + register "s0ix_enable" = "0" # DPTF enable register "dptf_enable" = "1" diff --git a/src/mainboard/google/brya/variants/baseboard/brya/devicetree.cb b/src/mainboard/google/brya/variants/baseboard/brya/devicetree.cb index 9c7635a5cfc..835cd1d4f4c 100644 --- a/src/mainboard/google/brya/variants/baseboard/brya/devicetree.cb +++ b/src/mainboard/google/brya/variants/baseboard/brya/devicetree.cb @@ -12,7 +12,7 @@ chip soc/intel/alderlake register "gen3_dec" = "0x00fc0901" # S0ix enable - register "s0ix_enable" = "1" + register "s0ix_enable" = "0" # DPTF enable register "dptf_enable" = "1" diff --git a/src/mainboard/google/brya/variants/baseboard/nissa/devicetree.cb b/src/mainboard/google/brya/variants/baseboard/nissa/devicetree.cb index 3bd2c6efbd9..ee31f741b7b 100644 --- a/src/mainboard/google/brya/variants/baseboard/nissa/devicetree.cb +++ b/src/mainboard/google/brya/variants/baseboard/nissa/devicetree.cb @@ -24,7 +24,7 @@ chip soc/intel/alderlake register "gen3_dec" = "0x00fc0901" # S0ix enable - register "s0ix_enable" = "1" + register "s0ix_enable" = "0" # DPTF enable register "dptf_enable" = "1" diff --git a/src/mainboard/google/brya/variants/baseboard/skolas/devicetree.cb b/src/mainboard/google/brya/variants/baseboard/skolas/devicetree.cb index b4ab818a088..b88872cdd37 100644 --- a/src/mainboard/google/brya/variants/baseboard/skolas/devicetree.cb +++ b/src/mainboard/google/brya/variants/baseboard/skolas/devicetree.cb @@ -12,7 +12,7 @@ chip soc/intel/alderlake register "gen3_dec" = "0x00fc0901" # S0ix enable - register "s0ix_enable" = "1" + register "s0ix_enable" = "0" # DPTF enable register "dptf_enable" = "1" diff --git a/src/mainboard/google/dedede/variants/baseboard/devicetree.cb b/src/mainboard/google/dedede/variants/baseboard/devicetree.cb index 30a971c3267..1a87c49fd5a 100644 --- a/src/mainboard/google/dedede/variants/baseboard/devicetree.cb +++ b/src/mainboard/google/dedede/variants/baseboard/devicetree.cb @@ -150,7 +150,7 @@ chip soc/intel/jasperlake register "SdCardPowerEnableActiveHigh" = "1" # Enable S0ix support - register "s0ix_enable" = "1" + register "s0ix_enable" = "0" # Display related UPDs # Select eDP for port A diff --git a/src/mainboard/google/drallion/variants/drallion/devicetree.cb b/src/mainboard/google/drallion/variants/drallion/devicetree.cb index 09ca824e3cf..772f0e1f213 100644 --- a/src/mainboard/google/drallion/variants/drallion/devicetree.cb +++ b/src/mainboard/google/drallion/variants/drallion/devicetree.cb @@ -39,7 +39,7 @@ chip soc/intel/cannonlake # USB2 PHY Power gating register "PchUsb2PhySusPgDisable" = "1" - register "s0ix_enable" = "1" + register "s0ix_enable" = "0" register "dptf_enable" = "1" register "power_limits_config" = "{ .tdp_pl1_override = 25, diff --git a/src/mainboard/google/fizz/variants/baseboard/devicetree.cb b/src/mainboard/google/fizz/variants/baseboard/devicetree.cb index 5ecc77bc779..631b5d8e73f 100644 --- a/src/mainboard/google/fizz/variants/baseboard/devicetree.cb +++ b/src/mainboard/google/fizz/variants/baseboard/devicetree.cb @@ -62,7 +62,7 @@ chip soc/intel/skylake register "dptf_enable" = "1" # Enable S0ix - register "s0ix_enable" = "1" + register "s0ix_enable" = "0" # FSP Configuration register "SataSalpSupport" = "0" diff --git a/src/mainboard/google/guybrush/variants/baseboard/devicetree.cb b/src/mainboard/google/guybrush/variants/baseboard/devicetree.cb index 03030598d80..6d1fe78f60a 100644 --- a/src/mainboard/google/guybrush/variants/baseboard/devicetree.cb +++ b/src/mainboard/google/guybrush/variants/baseboard/devicetree.cb @@ -55,7 +55,7 @@ chip soc/amd/cezanne }" # Enable S0i3 support - register "s0ix_enable" = "1" + register "s0ix_enable" = "0" # Enable STT support register "stt_control" = "1" diff --git a/src/mainboard/google/hatch/variants/baseboard/devicetree.cb b/src/mainboard/google/hatch/variants/baseboard/devicetree.cb index 850813f8d1a..d240e559f66 100644 --- a/src/mainboard/google/hatch/variants/baseboard/devicetree.cb +++ b/src/mainboard/google/hatch/variants/baseboard/devicetree.cb @@ -28,7 +28,7 @@ chip soc/intel/cannonlake # Enable System Agent dynamic frequency register "SaGv" = "SaGv_Enabled" # Enable S0ix - register "s0ix_enable" = "1" + register "s0ix_enable" = "0" # Enable DPTF register "dptf_enable" = "1" register "power_limits_config" = "{ diff --git a/src/mainboard/google/octopus/variants/baseboard/devicetree.cb b/src/mainboard/google/octopus/variants/baseboard/devicetree.cb index ea2164a9e6e..e8b7c4f2229 100644 --- a/src/mainboard/google/octopus/variants/baseboard/devicetree.cb +++ b/src/mainboard/google/octopus/variants/baseboard/devicetree.cb @@ -55,7 +55,7 @@ chip soc/intel/apollolake register "slp_s3_assertion_width_usecs" = "28000" # Enable lpss s0ix - register "lpss_s0ix_enable" = "1" + register "lpss_s0ix_enable" = "0" # Enable DPTF register "dptf_enable" = "1" diff --git a/src/mainboard/google/poppy/variants/atlas/devicetree.cb b/src/mainboard/google/poppy/variants/atlas/devicetree.cb index a801e2b10e1..d149954ed14 100644 --- a/src/mainboard/google/poppy/variants/atlas/devicetree.cb +++ b/src/mainboard/google/poppy/variants/atlas/devicetree.cb @@ -37,7 +37,7 @@ chip soc/intel/skylake register "dptf_enable" = "1" # Enable S0ix - register "s0ix_enable" = "1" + register "s0ix_enable" = "0" # Disable Command TriState register "CmdTriStateDis" = "1" diff --git a/src/mainboard/google/poppy/variants/baseboard/devicetree.cb b/src/mainboard/google/poppy/variants/baseboard/devicetree.cb index b209fcdd7f1..84b3ebad746 100644 --- a/src/mainboard/google/poppy/variants/baseboard/devicetree.cb +++ b/src/mainboard/google/poppy/variants/baseboard/devicetree.cb @@ -28,7 +28,7 @@ chip soc/intel/skylake register "dptf_enable" = "1" # Enable S0ix - register "s0ix_enable" = "1" + register "s0ix_enable" = "0" # FSP Configuration register "SataSalpSupport" = "0" diff --git a/src/mainboard/google/poppy/variants/nami/devicetree.cb b/src/mainboard/google/poppy/variants/nami/devicetree.cb index be0e6d77fc7..ed5a1180133 100644 --- a/src/mainboard/google/poppy/variants/nami/devicetree.cb +++ b/src/mainboard/google/poppy/variants/nami/devicetree.cb @@ -37,7 +37,7 @@ chip soc/intel/skylake register "dptf_enable" = "1" # Enable S0ix - register "s0ix_enable" = "1" + register "s0ix_enable" = "0" # FSP Configuration register "SataSalpSupport" = "0" diff --git a/src/mainboard/google/poppy/variants/nautilus/devicetree.cb b/src/mainboard/google/poppy/variants/nautilus/devicetree.cb index 73f5afe73fe..ee0b55ff4b1 100644 --- a/src/mainboard/google/poppy/variants/nautilus/devicetree.cb +++ b/src/mainboard/google/poppy/variants/nautilus/devicetree.cb @@ -37,7 +37,7 @@ chip soc/intel/skylake register "dptf_enable" = "1" # Enable S0ix - register "s0ix_enable" = "1" + register "s0ix_enable" = "0" # FSP Configuration register "SataSalpSupport" = "0" diff --git a/src/mainboard/google/poppy/variants/nocturne/devicetree.cb b/src/mainboard/google/poppy/variants/nocturne/devicetree.cb index a193e6a52bf..eae612e610b 100644 --- a/src/mainboard/google/poppy/variants/nocturne/devicetree.cb +++ b/src/mainboard/google/poppy/variants/nocturne/devicetree.cb @@ -30,7 +30,7 @@ chip soc/intel/skylake register "dptf_enable" = "1" # Enable S0ix - register "s0ix_enable" = "1" + register "s0ix_enable" = "0" # Disable Command TriState register "CmdTriStateDis" = "1" diff --git a/src/mainboard/google/poppy/variants/rammus/devicetree.cb b/src/mainboard/google/poppy/variants/rammus/devicetree.cb index beb78c65d9f..7fcc3a16166 100644 --- a/src/mainboard/google/poppy/variants/rammus/devicetree.cb +++ b/src/mainboard/google/poppy/variants/rammus/devicetree.cb @@ -37,7 +37,7 @@ chip soc/intel/skylake register "dptf_enable" = "1" # Enable S0ix - register "s0ix_enable" = "1" + register "s0ix_enable" = "0" # Disable Command TriState register "CmdTriStateDis" = "1" diff --git a/src/mainboard/google/poppy/variants/soraka/devicetree.cb b/src/mainboard/google/poppy/variants/soraka/devicetree.cb index ad758db18b9..d4f45bfc791 100644 --- a/src/mainboard/google/poppy/variants/soraka/devicetree.cb +++ b/src/mainboard/google/poppy/variants/soraka/devicetree.cb @@ -37,7 +37,7 @@ chip soc/intel/skylake register "dptf_enable" = "1" # Enable S0ix - register "s0ix_enable" = "1" + register "s0ix_enable" = "0" # FSP Configuration register "SataSalpSupport" = "0" diff --git a/src/mainboard/google/puff/variants/baseboard/devicetree.cb b/src/mainboard/google/puff/variants/baseboard/devicetree.cb index eff91b370d4..4c8b2096203 100644 --- a/src/mainboard/google/puff/variants/baseboard/devicetree.cb +++ b/src/mainboard/google/puff/variants/baseboard/devicetree.cb @@ -28,7 +28,7 @@ chip soc/intel/cannonlake # Enable System Agent dynamic frequency register "SaGv" = "SaGv_Enabled" # Enable S0ix - register "s0ix_enable" = "1" + register "s0ix_enable" = "0" # Enable DPTF register "dptf_enable" = "1" register "power_limits_config" = "{ diff --git a/src/mainboard/google/reef/variants/baseboard/devicetree.cb b/src/mainboard/google/reef/variants/baseboard/devicetree.cb index de7b04eaa24..93a0b5e489c 100644 --- a/src/mainboard/google/reef/variants/baseboard/devicetree.cb +++ b/src/mainboard/google/reef/variants/baseboard/devicetree.cb @@ -67,7 +67,7 @@ chip soc/intel/apollolake register "hdaudio_bios_config_lockdown" = "1" # Enable lpss s0ix - register "lpss_s0ix_enable" = "1" + register "lpss_s0ix_enable" = "0" # GPE configuration # Note that GPE events called out in ASL code rely on this diff --git a/src/mainboard/google/reef/variants/coral/devicetree.cb b/src/mainboard/google/reef/variants/coral/devicetree.cb index b2f317db2e8..87ab89afa41 100644 --- a/src/mainboard/google/reef/variants/coral/devicetree.cb +++ b/src/mainboard/google/reef/variants/coral/devicetree.cb @@ -67,7 +67,7 @@ chip soc/intel/apollolake register "hdaudio_bios_config_lockdown" = "1" # Enable lpss s0ix - register "lpss_s0ix_enable" = "1" + register "lpss_s0ix_enable" = "0" # GPE configuration # Note that GPE events called out in ASL code rely on this diff --git a/src/mainboard/google/reef/variants/pyro/devicetree.cb b/src/mainboard/google/reef/variants/pyro/devicetree.cb index 587fa701348..9fabec98f9f 100644 --- a/src/mainboard/google/reef/variants/pyro/devicetree.cb +++ b/src/mainboard/google/reef/variants/pyro/devicetree.cb @@ -67,7 +67,7 @@ chip soc/intel/apollolake register "hdaudio_bios_config_lockdown" = "1" # Enable lpss s0ix - register "lpss_s0ix_enable" = "1" + register "lpss_s0ix_enable" = "0" # GPE configuration # Note that GPE events called out in ASL code rely on this diff --git a/src/mainboard/google/reef/variants/sand/devicetree.cb b/src/mainboard/google/reef/variants/sand/devicetree.cb index ffa1835bd8d..124d779fdff 100644 --- a/src/mainboard/google/reef/variants/sand/devicetree.cb +++ b/src/mainboard/google/reef/variants/sand/devicetree.cb @@ -64,7 +64,7 @@ chip soc/intel/apollolake register "hdaudio_bios_config_lockdown" = "1" # Enable lpss s0ix - register "lpss_s0ix_enable" = "1" + register "lpss_s0ix_enable" = "0" # GPE configuration # Note that GPE events called out in ASL code rely on this diff --git a/src/mainboard/google/reef/variants/snappy/devicetree.cb b/src/mainboard/google/reef/variants/snappy/devicetree.cb index eecc1d4adab..7583dbc79db 100644 --- a/src/mainboard/google/reef/variants/snappy/devicetree.cb +++ b/src/mainboard/google/reef/variants/snappy/devicetree.cb @@ -67,7 +67,7 @@ chip soc/intel/apollolake register "hdaudio_bios_config_lockdown" = "1" # Enable lpss s0ix - register "lpss_s0ix_enable" = "1" + register "lpss_s0ix_enable" = "0" # GPE configuration # Note that GPE events called out in ASL code rely on this diff --git a/src/mainboard/google/rex/variants/baseboard/rex/devicetree.cb b/src/mainboard/google/rex/variants/baseboard/rex/devicetree.cb index a3225ca111c..05a5428f144 100644 --- a/src/mainboard/google/rex/variants/baseboard/rex/devicetree.cb +++ b/src/mainboard/google/rex/variants/baseboard/rex/devicetree.cb @@ -12,7 +12,7 @@ chip soc/intel/meteorlake register "gen3_dec" = "0x00fc0901" # S0ix enable - register "s0ix_enable" = "1" + register "s0ix_enable" = "0" # DPTF enable register "dptf_enable" = "1" diff --git a/src/mainboard/google/sarien/variants/arcada/devicetree.cb b/src/mainboard/google/sarien/variants/arcada/devicetree.cb index 86b961d9336..0df0620a5e8 100644 --- a/src/mainboard/google/sarien/variants/arcada/devicetree.cb +++ b/src/mainboard/google/sarien/variants/arcada/devicetree.cb @@ -27,7 +27,7 @@ chip soc/intel/cannonlake # USB2 PHY Power gating register "PchUsb2PhySusPgDisable" = "1" - register "s0ix_enable" = "1" + register "s0ix_enable" = "0" register "dptf_enable" = "1" register "satapwroptimize" = "1" register "power_limits_config" = "{ diff --git a/src/mainboard/google/sarien/variants/sarien/devicetree.cb b/src/mainboard/google/sarien/variants/sarien/devicetree.cb index 903bcc6d432..d26f8545349 100644 --- a/src/mainboard/google/sarien/variants/sarien/devicetree.cb +++ b/src/mainboard/google/sarien/variants/sarien/devicetree.cb @@ -30,7 +30,7 @@ chip soc/intel/cannonlake # USB2 PHY Power gating register "PchUsb2PhySusPgDisable" = "1" - register "s0ix_enable" = "1" + register "s0ix_enable" = "0" register "dptf_enable" = "1" register "satapwroptimize" = "1" register "AcousticNoiseMitigation" = "1" diff --git a/src/mainboard/google/volteer/Kconfig b/src/mainboard/google/volteer/Kconfig index bc71d651c44..5504b4ef128 100644 --- a/src/mainboard/google/volteer/Kconfig +++ b/src/mainboard/google/volteer/Kconfig @@ -37,6 +37,7 @@ config BOARD_GOOGLE_BASEBOARD_VOLTEER select SOC_INTEL_COMMON_BLOCK_TCSS select SOC_INTEL_CSE_LITE_SKU select SOC_INTEL_TIGERLAKE + select SOC_INTEL_TIGERLAKE_S3 select TPM_GOOGLE_TI50 if BOARD_GOOGLE_VOLTEER2_TI50 select TPM_GOOGLE_CR50 if !BOARD_GOOGLE_VOLTEER2_TI50 diff --git a/src/mainboard/google/volteer/variants/baseboard/devicetree.cb b/src/mainboard/google/volteer/variants/baseboard/devicetree.cb index fd3fcf64c24..200d1e127fe 100644 --- a/src/mainboard/google/volteer/variants/baseboard/devicetree.cb +++ b/src/mainboard/google/volteer/variants/baseboard/devicetree.cb @@ -259,7 +259,7 @@ chip soc/intel/tigerlake register "DdiPort4Ddc" = "0" # Enable S0ix - register "s0ix_enable" = "1" + register "s0ix_enable" = "0" # Enable DPTF register "dptf_enable" = "1" From 1124ef1d50f8a4e422c50f45fbccb104a88f85cb Mon Sep 17 00:00:00 2001 From: Matt DeVillier Date: Mon, 23 Jan 2023 10:23:55 -0600 Subject: [PATCH 117/137] soc/intel/jasperlake: Hook up GMA ACPI brightness controls Add function needed to generate ACPI backlight control SSDT, along with Kconfig values for accessing the registers. Tested by adding gfx register on google/magpie. Backlight controls work on Windows 10 and Linux 6.1. Change-Id: Iaa9872cd590c3b1298667cc80354ed3efd91c6c8 Signed-off-by: Matt DeVillier --- src/soc/intel/jasperlake/Kconfig | 12 ++++++++++++ src/soc/intel/jasperlake/Makefile.inc | 1 + src/soc/intel/jasperlake/chip.h | 4 ++++ src/soc/intel/jasperlake/graphics.c | 11 +++++++++++ 4 files changed, 28 insertions(+) create mode 100644 src/soc/intel/jasperlake/graphics.c diff --git a/src/soc/intel/jasperlake/Kconfig b/src/soc/intel/jasperlake/Kconfig index 4ae21b87e49..ac8d17e3799 100644 --- a/src/soc/intel/jasperlake/Kconfig +++ b/src/soc/intel/jasperlake/Kconfig @@ -218,4 +218,16 @@ config SOC_INTEL_JASPERLAKE_DEBUG_CONSENT config PRERAM_CBMEM_CONSOLE_SIZE hex default 0x1400 + +config INTEL_GMA_BCLV_OFFSET + default 0xc8258 + +config INTEL_GMA_BCLV_WIDTH + default 32 + +config INTEL_GMA_BCLM_OFFSET + default 0xc8254 + +config INTEL_GMA_BCLM_WIDTH + default 32 endif diff --git a/src/soc/intel/jasperlake/Makefile.inc b/src/soc/intel/jasperlake/Makefile.inc index 44d09080ea4..27a45c210e8 100644 --- a/src/soc/intel/jasperlake/Makefile.inc +++ b/src/soc/intel/jasperlake/Makefile.inc @@ -32,6 +32,7 @@ ramstage-y += espi.c ramstage-y += finalize.c ramstage-y += fsp_params.c ramstage-y += gpio.c +ramstage-y += graphics.c ramstage-y += lockdown.c ramstage-y += p2sb.c ramstage-y += pmc.c diff --git a/src/soc/intel/jasperlake/chip.h b/src/soc/intel/jasperlake/chip.h index 896a79a0f90..e45e6861225 100644 --- a/src/soc/intel/jasperlake/chip.h +++ b/src/soc/intel/jasperlake/chip.h @@ -4,6 +4,7 @@ #define _SOC_CHIP_H_ #include +#include #include #include #include @@ -432,6 +433,9 @@ struct soc_intel_jasperlake_config { * false: Disabled (more wakes, higher power) */ bool cnvi_reduce_s0ix_pwr_usage; + + /* i915 struct for GMA backlight control */ + struct i915_gpu_controller_info gfx; }; typedef struct soc_intel_jasperlake_config config_t; diff --git a/src/soc/intel/jasperlake/graphics.c b/src/soc/intel/jasperlake/graphics.c new file mode 100644 index 00000000000..773f3c6de8b --- /dev/null +++ b/src/soc/intel/jasperlake/graphics.c @@ -0,0 +1,11 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ + +#include +#include + +const struct i915_gpu_controller_info * +intel_igd_get_controller_info(const struct device *const dev) +{ + const struct soc_intel_jasperlake_config *const chip = dev->chip_info; + return &chip->gfx; +} From b36490d198118d814fd52423c228a0d3efe206df Mon Sep 17 00:00:00 2001 From: Matt DeVillier Date: Mon, 23 Jan 2023 10:25:51 -0600 Subject: [PATCH 118/137] mb/google/dedede: add ACPI brightness controls for iGPU Change-Id: I66daa6bbca15046994dff83bee6e7cf99aae0b33 Signed-off-by: Matt DeVillier --- src/mainboard/google/dedede/Kconfig | 1 + src/mainboard/google/dedede/dsdt.asl | 1 + src/mainboard/google/dedede/variants/baseboard/devicetree.cb | 4 +++- 3 files changed, 5 insertions(+), 1 deletion(-) diff --git a/src/mainboard/google/dedede/Kconfig b/src/mainboard/google/dedede/Kconfig index a24a5a9680f..ca8f1618ee4 100644 --- a/src/mainboard/google/dedede/Kconfig +++ b/src/mainboard/google/dedede/Kconfig @@ -20,6 +20,7 @@ config BOARD_GOOGLE_BASEBOARD_DEDEDE select GOOGLE_SMBIOS_MAINBOARD_VERSION select HAVE_ACPI_RESUME select HAVE_ACPI_TABLES + select INTEL_GMA_HAVE_VBT select INTEL_LPSS_UART_FOR_CONSOLE select MAINBOARD_HAS_CHROMEOS select MAINBOARD_HAS_TPM2 diff --git a/src/mainboard/google/dedede/dsdt.asl b/src/mainboard/google/dedede/dsdt.asl index 56812d5a203..c99f4c76c3e 100644 --- a/src/mainboard/google/dedede/dsdt.asl +++ b/src/mainboard/google/dedede/dsdt.asl @@ -23,6 +23,7 @@ DefinitionBlock( { #include #include + #include } } diff --git a/src/mainboard/google/dedede/variants/baseboard/devicetree.cb b/src/mainboard/google/dedede/variants/baseboard/devicetree.cb index 1a87c49fd5a..48ad65f2f22 100644 --- a/src/mainboard/google/dedede/variants/baseboard/devicetree.cb +++ b/src/mainboard/google/dedede/variants/baseboard/devicetree.cb @@ -208,7 +208,9 @@ chip soc/intel/jasperlake device domain 0 on device pci 00.0 on end # Host Bridge - device pci 02.0 on end # Integrated Graphics Device + device pci 02.0 on + register "gfx" = "GMA_DEFAULT_PANEL(0)" + end # Integrated Graphics Device device pci 04.0 on # Default DPTF Policy for all Dedede boards if not overridden chip drivers/intel/dptf From 3e811578a2aa21f88fb035a6a2fa017927b25627 Mon Sep 17 00:00:00 2001 From: Matt DeVillier Date: Mon, 23 Jan 2023 13:28:23 -0600 Subject: [PATCH 119/137] mb/google/dedede/magolor: Add probe items to mipi camera VCO/NVM Prevents a phantom device from showng under Windows on magolor boards without a mipi camera device. TEST=build/boot google/magpie, verify no phantom mipi device shown under Windows device manager. Change-Id: Iafe5296d7316734e0721f1099af868be26cbe4a1 Signed-off-by: Matt DeVillier --- .../google/dedede/variants/magolor/overridetree.cb | 7 ++++++- 1 file changed, 6 insertions(+), 1 deletion(-) diff --git a/src/mainboard/google/dedede/variants/magolor/overridetree.cb b/src/mainboard/google/dedede/variants/magolor/overridetree.cb index bb5bf24419b..3adafd67fa0 100644 --- a/src/mainboard/google/dedede/variants/magolor/overridetree.cb +++ b/src/mainboard/google/dedede/variants/magolor/overridetree.cb @@ -427,6 +427,7 @@ chip soc/intel/jasperlake device i2c 0C on probe CAMERA_VCM CAMERA_VCM_UNPROVISIONED probe CAMERA_VCM CAMERA_VCM0 + probe CAMERA_WFC CAMERA_OVTI8856 end end chip drivers/intel/mipi_camera @@ -444,7 +445,11 @@ chip soc/intel/jasperlake register "nvm_width" = "0x10" register "nvm_compat" = ""atmel,24c08"" - device i2c 50 on end + device i2c 50 on + probe CAMERA_VCM CAMERA_VCM_UNPROVISIONED + probe CAMERA_VCM CAMERA_VCM0 + probe CAMERA_WFC CAMERA_OVTI8856 + end end end device pci 19.0 on From fc756557e50a750baa8925f0ea4afb5ea1481a63 Mon Sep 17 00:00:00 2001 From: Matt DeVillier Date: Sat, 3 Feb 2018 00:22:06 -0600 Subject: [PATCH 120/137] build: add configs, build scripts, cfbs files for supported boards Change-Id: I9ba1b3dc448cc447ab83d64f08d14406826fcede Signed-off-by: Matt DeVillier --- build-uefi.sh | 43 +++++++++++++++++++++++ cbfs/bootorder.emmc | 7 ++++ cbfs/bootorder.emmc.apl | 1 + cbfs/bootorder.ssd | 1 + cbfs/bootorder.usb | 48 ++++++++++++++++++++++++++ cbfs/links.apl | 2 ++ cbfs/links.bsw | 2 ++ cbfs/links.hswbdw | 6 ++++ cbfs/links.kbl | 5 +++ cbfs/links.sbib | 10 ++++++ cbfs/links.skl | 3 ++ configs/adl/config.banshee.uefi | 19 ++++++++++ configs/apl/config.astronaut.uefi | 16 +++++++++ configs/apl/config.babymega.uefi | 16 +++++++++ configs/apl/config.babytiger.uefi | 16 +++++++++ configs/apl/config.blacktip.uefi | 16 +++++++++ configs/apl/config.blue.uefi | 16 +++++++++ configs/apl/config.bruce.uefi | 16 +++++++++ configs/apl/config.coral.uefi | 15 ++++++++ configs/apl/config.electro.uefi | 16 +++++++++ configs/apl/config.epaulette.uefi | 16 +++++++++ configs/apl/config.lava.uefi | 16 +++++++++ configs/apl/config.nasher.uefi | 16 +++++++++ configs/apl/config.nasher360.uefi | 16 +++++++++ configs/apl/config.pyro.uefi | 15 ++++++++ configs/apl/config.rabbid.uefi | 16 +++++++++ configs/apl/config.reef.uefi | 15 ++++++++ configs/apl/config.robo.uefi | 16 +++++++++ configs/apl/config.robo360.uefi | 16 +++++++++ configs/apl/config.sand.uefi | 15 ++++++++ configs/apl/config.santa.uefi | 16 +++++++++ configs/apl/config.snappy.uefi | 15 ++++++++ configs/apl/config.whitetip.uefi | 16 +++++++++ configs/bdw/config.auron_paine.uefi | 21 +++++++++++ configs/bdw/config.auron_yuna.uefi | 21 +++++++++++ configs/bdw/config.buddy.uefi | 21 +++++++++++ configs/bdw/config.gandof.uefi | 21 +++++++++++ configs/bdw/config.guado.uefi | 21 +++++++++++ configs/bdw/config.librem_13v1.uefi | 14 ++++++++ configs/bdw/config.librem_15v2.uefi | 15 ++++++++ configs/bdw/config.lulu.uefi | 21 +++++++++++ configs/bdw/config.rikku.uefi | 21 +++++++++++ configs/bdw/config.samus.uefi | 21 +++++++++++ configs/bdw/config.tidus.uefi | 21 +++++++++++ configs/bsw/config.banon.uefi | 19 ++++++++++ configs/bsw/config.celes.uefi | 19 ++++++++++ configs/bsw/config.cyan.uefi | 19 ++++++++++ configs/bsw/config.edgar.uefi | 19 ++++++++++ configs/bsw/config.kefka.uefi | 19 ++++++++++ configs/bsw/config.reks.uefi | 19 ++++++++++ configs/bsw/config.relm.uefi | 19 ++++++++++ configs/bsw/config.setzer.uefi | 19 ++++++++++ configs/bsw/config.terra.uefi | 19 ++++++++++ configs/bsw/config.ultima.uefi | 19 ++++++++++ configs/bsw/config.wizpig.uefi | 19 ++++++++++ configs/byt/config.banjo.uefi | 20 +++++++++++ configs/byt/config.candy.uefi | 22 ++++++++++++ configs/byt/config.clapper.uefi | 22 ++++++++++++ configs/byt/config.enguarde.uefi | 20 +++++++++++ configs/byt/config.glimmer.uefi | 20 +++++++++++ configs/byt/config.gnawty.uefi | 20 +++++++++++ configs/byt/config.heli.uefi | 20 +++++++++++ configs/byt/config.kip.uefi | 20 +++++++++++ configs/byt/config.ninja.uefi | 20 +++++++++++ configs/byt/config.orco.uefi | 20 +++++++++++ configs/byt/config.quawks.uefi | 20 +++++++++++ configs/byt/config.squawks.uefi | 20 +++++++++++ configs/byt/config.sumo.uefi | 20 +++++++++++ configs/byt/config.swanky.uefi | 20 +++++++++++ configs/byt/config.winky.uefi | 20 +++++++++++ configs/cml/config.akemi.uefi | 15 ++++++++ configs/cml/config.dooly.uefi | 17 +++++++++ configs/cml/config.dragonair.uefi | 17 +++++++++ configs/cml/config.drallion.uefi | 18 ++++++++++ configs/cml/config.dratini.uefi | 16 +++++++++ configs/cml/config.duffy.uefi | 17 +++++++++ configs/cml/config.faffy.uefi | 17 +++++++++ configs/cml/config.helios.uefi | 16 +++++++++ configs/cml/config.jinlon.uefi | 16 +++++++++ configs/cml/config.kaisa.uefi | 17 +++++++++ configs/cml/config.kindred.uefi | 16 +++++++++ configs/cml/config.kled.uefi | 17 +++++++++ configs/cml/config.kohaku.uefi | 14 ++++++++ configs/cml/config.librem_14.uefi | 12 +++++++ configs/cml/config.librem_mini_v2.uefi | 12 +++++++ configs/cml/config.nightfury.uefi | 14 ++++++++ configs/cml/config.noibat.uefi | 17 +++++++++ configs/cml/config.wyvern.uefi | 17 +++++++++ configs/glk/config.ampton.uefi | 16 +++++++++ configs/glk/config.apel.uefi | 17 +++++++++ configs/glk/config.bloog.uefi | 16 +++++++++ configs/glk/config.blooglet.uefi | 17 +++++++++ configs/glk/config.blooguard.uefi | 17 +++++++++ configs/glk/config.blorb.uefi | 17 +++++++++ configs/glk/config.bluebird.uefi | 17 +++++++++ configs/glk/config.bobba.uefi | 16 +++++++++ configs/glk/config.bobba360.uefi | 17 +++++++++ configs/glk/config.casta.uefi | 16 +++++++++ configs/glk/config.dood.uefi | 16 +++++++++ configs/glk/config.dorp.uefi | 17 +++++++++ configs/glk/config.droid.uefi | 17 +++++++++ configs/glk/config.fleex.uefi | 16 +++++++++ configs/glk/config.foob.uefi | 16 +++++++++ configs/glk/config.foob360.uefi | 17 +++++++++ configs/glk/config.garfour.uefi | 17 +++++++++ configs/glk/config.garg.uefi | 16 +++++++++ configs/glk/config.garg360.uefi | 17 +++++++++ configs/glk/config.grabbiter.uefi | 17 +++++++++ configs/glk/config.laser.uefi | 17 +++++++++ configs/glk/config.laser14.uefi | 17 +++++++++ configs/glk/config.lick.uefi | 14 ++++++++ configs/glk/config.meep.uefi | 16 +++++++++ configs/glk/config.mimrock.uefi | 17 +++++++++ configs/glk/config.nospike.uefi | 17 +++++++++ configs/glk/config.orbatrix.uefi | 17 +++++++++ configs/glk/config.phaser.uefi | 16 +++++++++ configs/glk/config.phaser360.uefi | 17 +++++++++ configs/glk/config.phaser360s.uefi | 17 +++++++++ configs/glk/config.sparky.uefi | 17 +++++++++ configs/glk/config.sparky360.uefi | 17 +++++++++ configs/glk/config.vorticon.uefi | 17 +++++++++ configs/glk/config.vortininja.uefi | 17 +++++++++ configs/hsw/config.falco.uefi | 19 ++++++++++ configs/hsw/config.leon.uefi | 19 ++++++++++ configs/hsw/config.mccloud.uefi | 19 ++++++++++ configs/hsw/config.monroe.uefi | 19 ++++++++++ configs/hsw/config.panther.uefi | 20 +++++++++++ configs/hsw/config.peppy.uefi | 19 ++++++++++ configs/hsw/config.tricky.uefi | 19 ++++++++++ configs/hsw/config.wolf.uefi | 19 ++++++++++ configs/hsw/config.zako.uefi | 19 ++++++++++ configs/jsl/config.bugzzy.uefi | 19 ++++++++++ configs/jsl/config.drawcia.uefi | 17 +++++++++ configs/jsl/config.drawlat.uefi | 18 ++++++++++ configs/jsl/config.drawman.uefi | 18 ++++++++++ configs/jsl/config.lantis.uefi | 19 ++++++++++ configs/jsl/config.magpie.uefi | 18 ++++++++++ configs/kbl/config.atlas.uefi | 16 +++++++++ configs/kbl/config.eve.uefi | 17 +++++++++ configs/kbl/config.fizz.uefi | 17 +++++++++ configs/kbl/config.karma.uefi | 15 ++++++++ configs/kbl/config.leona.uefi | 15 ++++++++ configs/kbl/config.librem_13v4.uefi | 10 ++++++ configs/kbl/config.librem_15v4.uefi | 12 +++++++ configs/kbl/config.nami.uefi | 15 ++++++++ configs/kbl/config.nautilus.uefi | 14 ++++++++ configs/kbl/config.nocturne.uefi | 14 ++++++++ configs/kbl/config.shyvana.uefi | 15 ++++++++ configs/kbl/config.soraka.uefi | 15 ++++++++ configs/skl/config.asuka.uefi | 15 ++++++++ configs/skl/config.caroline.uefi | 17 +++++++++ configs/skl/config.cave.uefi | 15 ++++++++ configs/skl/config.chell.uefi | 17 +++++++++ configs/skl/config.lars.uefi | 15 ++++++++ configs/skl/config.librem_13v2.uefi | 10 ++++++ configs/skl/config.librem_15v3.uefi | 10 ++++++ configs/skl/config.sentry.uefi | 15 ++++++++ configs/snb_ivb/config.butterfly.uefi | 16 +++++++++ configs/snb_ivb/config.link.uefi | 20 +++++++++++ configs/snb_ivb/config.lumpy.uefi | 14 ++++++++ configs/snb_ivb/config.parrot.uefi | 15 ++++++++ configs/snb_ivb/config.stout.uefi | 15 ++++++++ configs/snb_ivb/config.stumpy.uefi | 16 +++++++++ configs/snb_ivb/config.x230.uefi | 9 +++++ configs/str/config.aleena.uefi | 12 +++++++ configs/str/config.barla.uefi | 13 +++++++ configs/str/config.careena.uefi | 12 +++++++ configs/str/config.kasumi.uefi | 13 +++++++ configs/str/config.liara.uefi | 12 +++++++ configs/str/config.treeya.uefi | 12 +++++++ configs/tgl/config.chronicler.uefi | 17 +++++++++ configs/tgl/config.collis.uefi | 17 +++++++++ configs/tgl/config.copano.uefi | 17 +++++++++ configs/tgl/config.delbin.uefi | 17 +++++++++ configs/tgl/config.drobit.uefi | 17 +++++++++ configs/tgl/config.eldrid.uefi | 18 ++++++++++ configs/tgl/config.elemi.uefi | 17 +++++++++ configs/tgl/config.lillipup.uefi | 16 +++++++++ configs/tgl/config.lindar.uefi | 15 ++++++++ configs/tgl/config.voema.uefi | 19 ++++++++++ configs/tgl/config.volet.uefi | 19 ++++++++++ configs/tgl/config.volta.uefi | 20 +++++++++++ configs/tgl/config.voxel.uefi | 19 ++++++++++ configs/whl/config.librem_mini.uefi | 12 +++++++ configs/whl/config.sarien.uefi | 18 ++++++++++ configs/zen2/config.berknip.uefi | 11 ++++++ configs/zen2/config.dirinboz.uefi | 11 ++++++ configs/zen2/config.morphius.uefi | 11 ++++++ shrinkconfigs.sh | 40 +++++++++++++++++++++ 189 files changed, 3139 insertions(+) create mode 100755 build-uefi.sh create mode 100644 cbfs/bootorder.emmc create mode 100644 cbfs/bootorder.emmc.apl create mode 100644 cbfs/bootorder.ssd create mode 100644 cbfs/bootorder.usb create mode 100644 cbfs/links.apl create mode 100644 cbfs/links.bsw create mode 100644 cbfs/links.hswbdw create mode 100644 cbfs/links.kbl create mode 100644 cbfs/links.sbib create mode 100644 cbfs/links.skl create mode 100644 configs/adl/config.banshee.uefi create mode 100644 configs/apl/config.astronaut.uefi create mode 100644 configs/apl/config.babymega.uefi create mode 100644 configs/apl/config.babytiger.uefi create mode 100644 configs/apl/config.blacktip.uefi create mode 100644 configs/apl/config.blue.uefi create mode 100644 configs/apl/config.bruce.uefi create mode 100644 configs/apl/config.coral.uefi create mode 100644 configs/apl/config.electro.uefi create mode 100644 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create mode 100644 configs/bdw/config.lulu.uefi create mode 100644 configs/bdw/config.rikku.uefi create mode 100644 configs/bdw/config.samus.uefi create mode 100644 configs/bdw/config.tidus.uefi create mode 100644 configs/bsw/config.banon.uefi create mode 100644 configs/bsw/config.celes.uefi create mode 100644 configs/bsw/config.cyan.uefi create mode 100644 configs/bsw/config.edgar.uefi create mode 100644 configs/bsw/config.kefka.uefi create mode 100644 configs/bsw/config.reks.uefi create mode 100644 configs/bsw/config.relm.uefi create mode 100644 configs/bsw/config.setzer.uefi create mode 100644 configs/bsw/config.terra.uefi create mode 100644 configs/bsw/config.ultima.uefi create mode 100644 configs/bsw/config.wizpig.uefi create mode 100644 configs/byt/config.banjo.uefi create mode 100644 configs/byt/config.candy.uefi create mode 100644 configs/byt/config.clapper.uefi create mode 100644 configs/byt/config.enguarde.uefi create mode 100644 configs/byt/config.glimmer.uefi create mode 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configs/cml/config.kindred.uefi create mode 100644 configs/cml/config.kled.uefi create mode 100644 configs/cml/config.kohaku.uefi create mode 100644 configs/cml/config.librem_14.uefi create mode 100644 configs/cml/config.librem_mini_v2.uefi create mode 100644 configs/cml/config.nightfury.uefi create mode 100644 configs/cml/config.noibat.uefi create mode 100644 configs/cml/config.wyvern.uefi create mode 100644 configs/glk/config.ampton.uefi create mode 100644 configs/glk/config.apel.uefi create mode 100644 configs/glk/config.bloog.uefi create mode 100644 configs/glk/config.blooglet.uefi create mode 100644 configs/glk/config.blooguard.uefi create mode 100644 configs/glk/config.blorb.uefi create mode 100644 configs/glk/config.bluebird.uefi create mode 100644 configs/glk/config.bobba.uefi create mode 100644 configs/glk/config.bobba360.uefi create mode 100644 configs/glk/config.casta.uefi create mode 100644 configs/glk/config.dood.uefi create mode 100644 configs/glk/config.dorp.uefi create mode 100644 configs/glk/config.droid.uefi create mode 100644 configs/glk/config.fleex.uefi create mode 100644 configs/glk/config.foob.uefi create mode 100644 configs/glk/config.foob360.uefi create mode 100644 configs/glk/config.garfour.uefi create mode 100644 configs/glk/config.garg.uefi create mode 100644 configs/glk/config.garg360.uefi create mode 100644 configs/glk/config.grabbiter.uefi create mode 100644 configs/glk/config.laser.uefi create mode 100644 configs/glk/config.laser14.uefi create mode 100644 configs/glk/config.lick.uefi create mode 100644 configs/glk/config.meep.uefi create mode 100644 configs/glk/config.mimrock.uefi create mode 100644 configs/glk/config.nospike.uefi create mode 100644 configs/glk/config.orbatrix.uefi create mode 100644 configs/glk/config.phaser.uefi create mode 100644 configs/glk/config.phaser360.uefi create mode 100644 configs/glk/config.phaser360s.uefi create mode 100644 configs/glk/config.sparky.uefi create mode 100644 configs/glk/config.sparky360.uefi create mode 100644 configs/glk/config.vorticon.uefi create mode 100644 configs/glk/config.vortininja.uefi create mode 100644 configs/hsw/config.falco.uefi create mode 100644 configs/hsw/config.leon.uefi create mode 100644 configs/hsw/config.mccloud.uefi create mode 100644 configs/hsw/config.monroe.uefi create mode 100644 configs/hsw/config.panther.uefi create mode 100644 configs/hsw/config.peppy.uefi create mode 100644 configs/hsw/config.tricky.uefi create mode 100644 configs/hsw/config.wolf.uefi create mode 100644 configs/hsw/config.zako.uefi create mode 100644 configs/jsl/config.bugzzy.uefi create mode 100644 configs/jsl/config.drawcia.uefi create mode 100644 configs/jsl/config.drawlat.uefi create mode 100644 configs/jsl/config.drawman.uefi create mode 100644 configs/jsl/config.lantis.uefi create mode 100644 configs/jsl/config.magpie.uefi create mode 100644 configs/kbl/config.atlas.uefi create mode 100644 configs/kbl/config.eve.uefi create mode 100644 configs/kbl/config.fizz.uefi create mode 100644 configs/kbl/config.karma.uefi create mode 100644 configs/kbl/config.leona.uefi create mode 100644 configs/kbl/config.librem_13v4.uefi create mode 100644 configs/kbl/config.librem_15v4.uefi create mode 100644 configs/kbl/config.nami.uefi create mode 100644 configs/kbl/config.nautilus.uefi create mode 100644 configs/kbl/config.nocturne.uefi create mode 100644 configs/kbl/config.shyvana.uefi create mode 100644 configs/kbl/config.soraka.uefi create mode 100644 configs/skl/config.asuka.uefi create mode 100644 configs/skl/config.caroline.uefi create mode 100644 configs/skl/config.cave.uefi create mode 100644 configs/skl/config.chell.uefi create mode 100644 configs/skl/config.lars.uefi create mode 100644 configs/skl/config.librem_13v2.uefi create mode 100644 configs/skl/config.librem_15v3.uefi create mode 100644 configs/skl/config.sentry.uefi create mode 100644 configs/snb_ivb/config.butterfly.uefi create mode 100644 configs/snb_ivb/config.link.uefi create mode 100644 configs/snb_ivb/config.lumpy.uefi create mode 100644 configs/snb_ivb/config.parrot.uefi create mode 100644 configs/snb_ivb/config.stout.uefi create mode 100644 configs/snb_ivb/config.stumpy.uefi create mode 100644 configs/snb_ivb/config.x230.uefi create mode 100644 configs/str/config.aleena.uefi create mode 100644 configs/str/config.barla.uefi create mode 100644 configs/str/config.careena.uefi create mode 100644 configs/str/config.kasumi.uefi create mode 100644 configs/str/config.liara.uefi create mode 100644 configs/str/config.treeya.uefi create mode 100644 configs/tgl/config.chronicler.uefi create mode 100644 configs/tgl/config.collis.uefi create mode 100644 configs/tgl/config.copano.uefi create mode 100644 configs/tgl/config.delbin.uefi create mode 100644 configs/tgl/config.drobit.uefi create mode 100644 configs/tgl/config.eldrid.uefi create mode 100644 configs/tgl/config.elemi.uefi create mode 100644 configs/tgl/config.lillipup.uefi create mode 100644 configs/tgl/config.lindar.uefi create mode 100644 configs/tgl/config.voema.uefi create mode 100644 configs/tgl/config.volet.uefi create mode 100644 configs/tgl/config.volta.uefi create mode 100644 configs/tgl/config.voxel.uefi create mode 100644 configs/whl/config.librem_mini.uefi create mode 100644 configs/whl/config.sarien.uefi create mode 100644 configs/zen2/config.berknip.uefi create mode 100644 configs/zen2/config.dirinboz.uefi create mode 100644 configs/zen2/config.morphius.uefi create mode 100644 shrinkconfigs.sh diff --git a/build-uefi.sh b/build-uefi.sh new file mode 100755 index 00000000000..5ce17e196c6 --- /dev/null +++ b/build-uefi.sh @@ -0,0 +1,43 @@ +#!/usr/bin/env bash +# + +set -e + +platforms=('snb_ivb' 'hsw' 'byt' 'bdw' 'bsw' 'skl' 'apl' 'kbl' 'whl' 'glk' \ + 'cml' 'jsl' 'tgl' 'str' 'zen2' 'adl') +build_targets=() + +json_file=cbmodels.json +rom_path=https://www.mrchromebox.tech/files/firmware/full_rom/ +echo -e "{" > $json_file + +if [ -z "$1" ]; then + for subdir in "${platforms[@]}"; do + for cfg in configs/$subdir/config*.*; do + build_targets+=("$(basename $cfg | cut -f2 -d'.')") + done + done +else + build_targets=($@) +fi + +for device in "${build_targets[@]}"; do + filename="coreboot_tiano-${device}-mrchromebox_$(date +"%Y%m%d").rom" + rm -f ~/dev/firmware/${filename}* + rm -rf ./build + cfg_file=$(find ./configs -name "config.$device.uefi") + cp "$cfg_file" .config + make clean + make olddefconfig + make -j$(nproc) + cp ./build/coreboot.rom ./${filename} + sha1sum ${filename} > ${filename}.sha1 + echo -e "\t\"${device}\": {" >> $json_file + echo -e "\t\t\"url\": \"${rom_path}${filename}\"," >> $json_file + echo -e "\t\t\"sha1\": \"$(cat ${filename}.sha1 | awk 'NR==1{print $1}')\"" >> $json_file + echo -e "\t}," >> $json_file + mv ${filename}* ~/dev/firmware/ +done +echo -e "}" >> $json_file +# remove last comma +sed -i 's/\(.*\),/\1/' $json_file diff --git a/cbfs/bootorder.emmc b/cbfs/bootorder.emmc new file mode 100644 index 00000000000..280d61c2a4b --- /dev/null +++ b/cbfs/bootorder.emmc @@ -0,0 +1,7 @@ +/rom@etc/sdcard0 +/rom@etc/sdcard1 +/rom@etc/sdcard2 +/rom@etc/sdcard3 +/rom@etc/sdcard4 +/rom@etc/sdcard5 +/rom@etc/sdcard6 diff --git a/cbfs/bootorder.emmc.apl b/cbfs/bootorder.emmc.apl new file mode 100644 index 00000000000..da6673c3d22 --- /dev/null +++ b/cbfs/bootorder.emmc.apl @@ -0,0 +1 @@ +/pci@i0cf8/*@1c diff --git a/cbfs/bootorder.ssd b/cbfs/bootorder.ssd new file mode 100644 index 00000000000..095fb7237c7 --- /dev/null +++ b/cbfs/bootorder.ssd @@ -0,0 +1 @@ +/pci@i0cf8/*@1f,2/drive@0/disk@0 diff --git a/cbfs/bootorder.usb b/cbfs/bootorder.usb new file mode 100644 index 00000000000..c666c6876a3 --- /dev/null +++ b/cbfs/bootorder.usb @@ -0,0 +1,48 @@ +/pci@i0cf8/usb@14/usb-*@0 +/pci@i0cf8/usb@14/usb-*@1 +/pci@i0cf8/usb@14/usb-*@2 +/pci@i0cf8/usb@14/usb-*@3 +/pci@i0cf8/usb@14/usb-*@4 +/pci@i0cf8/usb@14/usb-*@5 +/pci@i0cf8/usb@14/usb-*@6 +/pci@i0cf8/usb@14/usb-*@7 +/pci@i0cf8/usb@14/usb-*@8 +/pci@i0cf8/usb@14/usb-*@9 +/pci@i0cf8/usb@14/usb-*@a +/pci@i0cf8/usb@14/usb-*@b +/pci@i0cf8/usb@14/usb-*@c +/pci@i0cf8/usb@14/usb-*@d +/pci@i0cf8/usb@14/usb-*@e +/pci@i0cf8/usb@14/usb-*@f +/pci@i0cf8/usb@14/hub@1/usb-*@0 +/pci@i0cf8/usb@14/hub@1/usb-*@1 +/pci@i0cf8/usb@14/hub@1/usb-*@2 +/pci@i0cf8/usb@14/hub@1/usb-*@3 +/pci@i0cf8/usb@14/hub@1/usb-*@4 +/pci@i0cf8/usb@14/hub@1/usb-*@5 +/pci@i0cf8/usb@14/hub@1/usb-*@6 +/pci@i0cf8/usb@14/hub@1/usb-*@7 +/pci@i0cf8/usb@14/hub@1/usb-*@8 +/pci@i0cf8/usb@14/hub@1/usb-*@9 +/pci@i0cf8/usb@14/hub@1/usb-*@a +/pci@i0cf8/usb@14/hub@1/usb-*@b +/pci@i0cf8/usb@14/hub@1/usb-*@c +/pci@i0cf8/usb@14/hub@1/usb-*@d +/pci@i0cf8/usb@14/hub@1/usb-*@e +/pci@i0cf8/usb@14/hub@1/usb-*@f +/pci@i0cf8/usb@1d/hub@1/*@0 +/pci@i0cf8/usb@1d/hub@1/*@1 +/pci@i0cf8/usb@1d/hub@1/*@2 +/pci@i0cf8/usb@1d/hub@1/*@3 +/pci@i0cf8/usb@1d/hub@1/*@4 +/pci@i0cf8/usb@1d/hub@1/*@5 +/pci@i0cf8/usb@1d/hub@1/*@6 +/pci@i0cf8/usb@1d/hub@1/*@7 +/pci@i0cf8/usb@1d/hub@1/usb-*@0 +/pci@i0cf8/usb@1d/hub@1/usb-*@1 +/pci@i0cf8/usb@1d/hub@1/usb-*@2 +/pci@i0cf8/usb@1d/hub@1/usb-*@3 +/pci@i0cf8/usb@1d/hub@1/usb-*@4 +/pci@i0cf8/usb@1d/hub@1/usb-*@5 +/pci@i0cf8/usb@1d/hub@1/usb-*@6 +/pci@i0cf8/usb@1d/hub@1/usb-*@7 diff --git a/cbfs/links.apl b/cbfs/links.apl new file mode 100644 index 00000000000..804f02f14bb --- /dev/null +++ b/cbfs/links.apl @@ -0,0 +1,2 @@ +pci8086,5a84.rom seavgabios.rom +pci8086,5a85.rom seavgabios.rom diff --git a/cbfs/links.bsw b/cbfs/links.bsw new file mode 100644 index 00000000000..234cef3f194 --- /dev/null +++ b/cbfs/links.bsw @@ -0,0 +1,2 @@ +pci8086,22b0.rom pci8086,22b0.rom +pci8086,22b1.rom pci8086,22b0.rom diff --git a/cbfs/links.hswbdw b/cbfs/links.hswbdw new file mode 100644 index 00000000000..4242209ee61 --- /dev/null +++ b/cbfs/links.hswbdw @@ -0,0 +1,6 @@ +pci8086,0a06.rom pci8086,0406.rom # HSW U GT1 +pci8086,0a16.rom pci8086,0406.rom # HSW U GT2 +pci8086,0a26.rom pci8086,0406.rom # HSW U GT3 +pci8086,1606.rom pci8086,0406.rom # BDW U GT1 +pci8086,1616.rom pci8086,0406.rom # BDW U GT2 +pci8086,1626.rom pci8086,0406.rom # BDW U GT3 diff --git a/cbfs/links.kbl b/cbfs/links.kbl new file mode 100644 index 00000000000..0ba983308e3 --- /dev/null +++ b/cbfs/links.kbl @@ -0,0 +1,5 @@ +pci8086,5906.rom seavgabios.rom # Kabylake GT1 SULTM +pci8086,591e.rom seavgabios.rom # Kabylake GT2 SULXM +pci8086,5916.rom seavgabios.rom # Kabylake GT2 SULTM +pci8086,5917.rom seavgabios.rom # Kabylake GT2 SULTMR +pci8086,591b.rom seavgabios.rom # Kabylake GT2 SHALM diff --git a/cbfs/links.sbib b/cbfs/links.sbib new file mode 100644 index 00000000000..66a59191c60 --- /dev/null +++ b/cbfs/links.sbib @@ -0,0 +1,10 @@ +pci8086,0106.rom pci8086,0106.rom +pci8086,0116.rom pci8086,0106.rom +pci8086,0126.rom pci8086,0106.rom +pci8086,0136.rom pci8086,0106.rom +pci8086,0146.rom pci8086,0106.rom +pci8086,0156.rom pci8086,0106.rom +pci8086,0166.rom pci8086,0106.rom +pci8086,0176.rom pci8086,0106.rom +pci8086,0186.rom pci8086,0106.rom +pci8086,0196.rom pci8086,0106.rom diff --git a/cbfs/links.skl b/cbfs/links.skl new file mode 100644 index 00000000000..2f903d66bac --- /dev/null +++ b/cbfs/links.skl @@ -0,0 +1,3 @@ +pci8086,1906.rom pci8086,0406.rom # SKL GT1 ULT +pci8086,1916.rom pci8086,0406.rom # SKL GT2 ULT +pci8086,191e.rom pci8086,0406.rom # SKL GT2 ULX diff --git a/configs/adl/config.banshee.uefi b/configs/adl/config.banshee.uefi new file mode 100644 index 00000000000..04442f556e1 --- /dev/null +++ b/configs/adl/config.banshee.uefi @@ -0,0 +1,19 @@ +CONFIG_LOCALVERSION="MrChromebox-4.19" +CONFIG_VENDOR_GOOGLE=y +CONFIG_NO_POST=y +CONFIG_CBFS_SIZE=0x400000 +# CONFIG_CONSOLE_SERIAL is not set +CONFIG_INTEL_GMA_VBT_FILE="3rdparty/blobs/mainboard/google/brya/banshee/vbt.bin" +CONFIG_IFD_BIN_PATH="3rdparty/blobs/mainboard/google/brya/banshee/flashdescriptor.bin" +CONFIG_ME_BIN_PATH="3rdparty/blobs/mainboard/google/brya/banshee/me.bin" +CONFIG_BOARD_GOOGLE_BANSHEE=y +CONFIG_HAVE_IFD_BIN=y +CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS=y +CONFIG_CPU_UCODE_BINARIES="3rdparty/blobs/mainboard/google/brya/banshee/cpu_microcode_blob.bin" +CONFIG_EC_GOOGLE_CHROMEEC_FIRMWARE_EXTERNAL=y +CONFIG_EC_GOOGLE_CHROMEEC_FIRMWARE_FILE="3rdparty/blobs/mainboard/google/brya/banshee/ec.RW.flat" +CONFIG_HAVE_ME_BIN=y +CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION=y +CONFIG_RUN_FSP_GOP=y +# CONFIG_SET_GOP_DRIVER_VERSION is not set +# CONFIG_SMMSTORE is not set diff --git a/configs/apl/config.astronaut.uefi b/configs/apl/config.astronaut.uefi new file mode 100644 index 00000000000..b389a0a9d38 --- /dev/null +++ b/configs/apl/config.astronaut.uefi @@ -0,0 +1,16 @@ +CONFIG_LOCALVERSION="MrChromebox-4.19" +CONFIG_VENDOR_GOOGLE=y +CONFIG_NO_POST=y +# CONFIG_CONSOLE_SERIAL is not set +CONFIG_INCLUDE_NHLT_BLOBS=y +CONFIG_IFD_BIN_PATH="3rdparty/blobs/mainboard/google/reef/flashdescriptor.bin" +CONFIG_BOARD_GOOGLE_CORAL=y +CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="Astronaut" +CONFIG_NEED_IFWI=y +CONFIG_IFWI_FILE_NAME="3rdparty/blobs/mainboard/google/reef/coral/ifwi.bin" +CONFIG_HAVE_IFD_BIN=y +CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS=y +CONFIG_CPU_UCODE_BINARIES="3rdparty/blobs/soc/intel/apl/cpu_microcode_blob.bin" +CONFIG_EC_GOOGLE_CHROMEEC_FIRMWARE_EXTERNAL=y +CONFIG_EC_GOOGLE_CHROMEEC_FIRMWARE_FILE="3rdparty/blobs/mainboard/google/reef/coral/ec.RW.flat" +CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION=y diff --git a/configs/apl/config.babymega.uefi b/configs/apl/config.babymega.uefi new file mode 100644 index 00000000000..d6f4c74ad8b --- /dev/null +++ b/configs/apl/config.babymega.uefi @@ -0,0 +1,16 @@ +CONFIG_LOCALVERSION="MrChromebox-4.19" +CONFIG_VENDOR_GOOGLE=y +CONFIG_NO_POST=y +# CONFIG_CONSOLE_SERIAL is not set +CONFIG_INCLUDE_NHLT_BLOBS=y +CONFIG_IFD_BIN_PATH="3rdparty/blobs/mainboard/google/reef/flashdescriptor.bin" +CONFIG_BOARD_GOOGLE_CORAL=y +CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="Babymega" +CONFIG_NEED_IFWI=y +CONFIG_IFWI_FILE_NAME="3rdparty/blobs/mainboard/google/reef/coral/ifwi.bin" +CONFIG_HAVE_IFD_BIN=y +CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS=y +CONFIG_CPU_UCODE_BINARIES="3rdparty/blobs/soc/intel/apl/cpu_microcode_blob.bin" +CONFIG_EC_GOOGLE_CHROMEEC_FIRMWARE_EXTERNAL=y +CONFIG_EC_GOOGLE_CHROMEEC_FIRMWARE_FILE="3rdparty/blobs/mainboard/google/reef/coral/ec.RW.flat" +CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION=y diff --git a/configs/apl/config.babytiger.uefi b/configs/apl/config.babytiger.uefi new file mode 100644 index 00000000000..077ce5a3461 --- /dev/null +++ b/configs/apl/config.babytiger.uefi @@ -0,0 +1,16 @@ +CONFIG_LOCALVERSION="MrChromebox-4.19" +CONFIG_VENDOR_GOOGLE=y +CONFIG_NO_POST=y +# CONFIG_CONSOLE_SERIAL is not set +CONFIG_INCLUDE_NHLT_BLOBS=y +CONFIG_IFD_BIN_PATH="3rdparty/blobs/mainboard/google/reef/flashdescriptor.bin" +CONFIG_BOARD_GOOGLE_CORAL=y +CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="Babytiger" +CONFIG_NEED_IFWI=y +CONFIG_IFWI_FILE_NAME="3rdparty/blobs/mainboard/google/reef/coral/ifwi.bin" +CONFIG_HAVE_IFD_BIN=y +CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS=y +CONFIG_CPU_UCODE_BINARIES="3rdparty/blobs/soc/intel/apl/cpu_microcode_blob.bin" +CONFIG_EC_GOOGLE_CHROMEEC_FIRMWARE_EXTERNAL=y +CONFIG_EC_GOOGLE_CHROMEEC_FIRMWARE_FILE="3rdparty/blobs/mainboard/google/reef/coral/ec.RW.flat" +CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION=y diff --git a/configs/apl/config.blacktip.uefi b/configs/apl/config.blacktip.uefi new file mode 100644 index 00000000000..c1eed92fc9b --- /dev/null +++ b/configs/apl/config.blacktip.uefi @@ -0,0 +1,16 @@ +CONFIG_LOCALVERSION="MrChromebox-4.19" +CONFIG_VENDOR_GOOGLE=y +CONFIG_NO_POST=y +# CONFIG_CONSOLE_SERIAL is not set +CONFIG_INCLUDE_NHLT_BLOBS=y +CONFIG_IFD_BIN_PATH="3rdparty/blobs/mainboard/google/reef/flashdescriptor.bin" +CONFIG_BOARD_GOOGLE_CORAL=y +CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="Blacktip" +CONFIG_NEED_IFWI=y +CONFIG_IFWI_FILE_NAME="3rdparty/blobs/mainboard/google/reef/coral/ifwi.bin" +CONFIG_HAVE_IFD_BIN=y +CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS=y +CONFIG_CPU_UCODE_BINARIES="3rdparty/blobs/soc/intel/apl/cpu_microcode_blob.bin" +CONFIG_EC_GOOGLE_CHROMEEC_FIRMWARE_EXTERNAL=y +CONFIG_EC_GOOGLE_CHROMEEC_FIRMWARE_FILE="3rdparty/blobs/mainboard/google/reef/coral/ec.RW.flat" +CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION=y diff --git a/configs/apl/config.blue.uefi b/configs/apl/config.blue.uefi new file mode 100644 index 00000000000..bbf1a8f4bf1 --- /dev/null +++ b/configs/apl/config.blue.uefi @@ -0,0 +1,16 @@ +CONFIG_LOCALVERSION="MrChromebox-4.19" +CONFIG_VENDOR_GOOGLE=y +CONFIG_NO_POST=y +# CONFIG_CONSOLE_SERIAL is not set +CONFIG_INCLUDE_NHLT_BLOBS=y +CONFIG_IFD_BIN_PATH="3rdparty/blobs/mainboard/google/reef/flashdescriptor.bin" +CONFIG_BOARD_GOOGLE_CORAL=y +CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="Blue" +CONFIG_NEED_IFWI=y +CONFIG_IFWI_FILE_NAME="3rdparty/blobs/mainboard/google/reef/coral/ifwi.bin" +CONFIG_HAVE_IFD_BIN=y +CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS=y +CONFIG_CPU_UCODE_BINARIES="3rdparty/blobs/soc/intel/apl/cpu_microcode_blob.bin" +CONFIG_EC_GOOGLE_CHROMEEC_FIRMWARE_EXTERNAL=y +CONFIG_EC_GOOGLE_CHROMEEC_FIRMWARE_FILE="3rdparty/blobs/mainboard/google/reef/coral/ec.RW.flat" +CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION=y diff --git a/configs/apl/config.bruce.uefi b/configs/apl/config.bruce.uefi new file mode 100644 index 00000000000..5190d96adb7 --- /dev/null +++ b/configs/apl/config.bruce.uefi @@ -0,0 +1,16 @@ +CONFIG_LOCALVERSION="MrChromebox-4.19" +CONFIG_VENDOR_GOOGLE=y +CONFIG_NO_POST=y +# CONFIG_CONSOLE_SERIAL is not set +CONFIG_INCLUDE_NHLT_BLOBS=y +CONFIG_IFD_BIN_PATH="3rdparty/blobs/mainboard/google/reef/flashdescriptor.bin" +CONFIG_BOARD_GOOGLE_CORAL=y +CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="Bruce" +CONFIG_NEED_IFWI=y +CONFIG_IFWI_FILE_NAME="3rdparty/blobs/mainboard/google/reef/coral/ifwi.bin" +CONFIG_HAVE_IFD_BIN=y +CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS=y +CONFIG_CPU_UCODE_BINARIES="3rdparty/blobs/soc/intel/apl/cpu_microcode_blob.bin" +CONFIG_EC_GOOGLE_CHROMEEC_FIRMWARE_EXTERNAL=y +CONFIG_EC_GOOGLE_CHROMEEC_FIRMWARE_FILE="3rdparty/blobs/mainboard/google/reef/coral/ec.RW.flat" +CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION=y diff --git a/configs/apl/config.coral.uefi b/configs/apl/config.coral.uefi new file mode 100644 index 00000000000..8af4e00358f --- /dev/null +++ b/configs/apl/config.coral.uefi @@ -0,0 +1,15 @@ +CONFIG_LOCALVERSION="MrChromebox-4.19" +CONFIG_VENDOR_GOOGLE=y +CONFIG_NO_POST=y +# CONFIG_CONSOLE_SERIAL is not set +CONFIG_INCLUDE_NHLT_BLOBS=y +CONFIG_IFD_BIN_PATH="3rdparty/blobs/mainboard/google/reef/flashdescriptor.bin" +CONFIG_BOARD_GOOGLE_CORAL=y +CONFIG_NEED_IFWI=y +CONFIG_IFWI_FILE_NAME="3rdparty/blobs/mainboard/google/reef/coral/ifwi.bin" +CONFIG_HAVE_IFD_BIN=y +CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS=y +CONFIG_CPU_UCODE_BINARIES="3rdparty/blobs/soc/intel/apl/cpu_microcode_blob.bin" +CONFIG_EC_GOOGLE_CHROMEEC_FIRMWARE_EXTERNAL=y +CONFIG_EC_GOOGLE_CHROMEEC_FIRMWARE_FILE="3rdparty/blobs/mainboard/google/reef/coral/ec.RW.flat" +CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION=y diff --git a/configs/apl/config.electro.uefi b/configs/apl/config.electro.uefi new file mode 100644 index 00000000000..d412e6e1924 --- /dev/null +++ b/configs/apl/config.electro.uefi @@ -0,0 +1,16 @@ +CONFIG_LOCALVERSION="MrChromebox-4.19" +CONFIG_VENDOR_GOOGLE=y +CONFIG_NO_POST=y +# CONFIG_CONSOLE_SERIAL is not set +CONFIG_INCLUDE_NHLT_BLOBS=y +CONFIG_IFD_BIN_PATH="3rdparty/blobs/mainboard/google/reef/flashdescriptor.bin" +CONFIG_BOARD_GOOGLE_REEF=y +CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="Electro" +CONFIG_NEED_IFWI=y +CONFIG_IFWI_FILE_NAME="3rdparty/blobs/mainboard/google/reef/reef/ifwi.bin" +CONFIG_HAVE_IFD_BIN=y +CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS=y +CONFIG_CPU_UCODE_BINARIES="3rdparty/blobs/soc/intel/apl/cpu_microcode_blob.bin" +CONFIG_EC_GOOGLE_CHROMEEC_FIRMWARE_EXTERNAL=y +CONFIG_EC_GOOGLE_CHROMEEC_FIRMWARE_FILE="3rdparty/blobs/mainboard/google/reef/reef/ec.RW.flat" +CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION=y diff --git a/configs/apl/config.epaulette.uefi b/configs/apl/config.epaulette.uefi new file mode 100644 index 00000000000..fbd6bebcca5 --- /dev/null +++ b/configs/apl/config.epaulette.uefi @@ -0,0 +1,16 @@ +CONFIG_LOCALVERSION="MrChromebox-4.19" +CONFIG_VENDOR_GOOGLE=y +CONFIG_NO_POST=y +# CONFIG_CONSOLE_SERIAL is not set +CONFIG_INCLUDE_NHLT_BLOBS=y +CONFIG_IFD_BIN_PATH="3rdparty/blobs/mainboard/google/reef/flashdescriptor.bin" +CONFIG_BOARD_GOOGLE_CORAL=y +CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="Epaulette" +CONFIG_NEED_IFWI=y +CONFIG_IFWI_FILE_NAME="3rdparty/blobs/mainboard/google/reef/coral/ifwi.bin" +CONFIG_HAVE_IFD_BIN=y +CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS=y +CONFIG_CPU_UCODE_BINARIES="3rdparty/blobs/soc/intel/apl/cpu_microcode_blob.bin" +CONFIG_EC_GOOGLE_CHROMEEC_FIRMWARE_EXTERNAL=y +CONFIG_EC_GOOGLE_CHROMEEC_FIRMWARE_FILE="3rdparty/blobs/mainboard/google/reef/coral/ec.RW.flat" +CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION=y diff --git a/configs/apl/config.lava.uefi b/configs/apl/config.lava.uefi new file mode 100644 index 00000000000..ff77a0c90db --- /dev/null +++ b/configs/apl/config.lava.uefi @@ -0,0 +1,16 @@ +CONFIG_LOCALVERSION="MrChromebox-4.19" +CONFIG_VENDOR_GOOGLE=y +CONFIG_NO_POST=y +# CONFIG_CONSOLE_SERIAL is not set +CONFIG_INCLUDE_NHLT_BLOBS=y +CONFIG_IFD_BIN_PATH="3rdparty/blobs/mainboard/google/reef/flashdescriptor.bin" +CONFIG_BOARD_GOOGLE_CORAL=y +CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="Lava" +CONFIG_NEED_IFWI=y +CONFIG_IFWI_FILE_NAME="3rdparty/blobs/mainboard/google/reef/coral/ifwi.bin" +CONFIG_HAVE_IFD_BIN=y +CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS=y +CONFIG_CPU_UCODE_BINARIES="3rdparty/blobs/soc/intel/apl/cpu_microcode_blob.bin" +CONFIG_EC_GOOGLE_CHROMEEC_FIRMWARE_EXTERNAL=y +CONFIG_EC_GOOGLE_CHROMEEC_FIRMWARE_FILE="3rdparty/blobs/mainboard/google/reef/coral/ec.RW.flat" +CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION=y diff --git a/configs/apl/config.nasher.uefi b/configs/apl/config.nasher.uefi new file mode 100644 index 00000000000..a11de9863ba --- /dev/null +++ b/configs/apl/config.nasher.uefi @@ -0,0 +1,16 @@ +CONFIG_LOCALVERSION="MrChromebox-4.19" +CONFIG_VENDOR_GOOGLE=y +CONFIG_NO_POST=y +# CONFIG_CONSOLE_SERIAL is not set +CONFIG_INCLUDE_NHLT_BLOBS=y +CONFIG_IFD_BIN_PATH="3rdparty/blobs/mainboard/google/reef/flashdescriptor.bin" +CONFIG_BOARD_GOOGLE_CORAL=y +CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="Nasher" +CONFIG_NEED_IFWI=y +CONFIG_IFWI_FILE_NAME="3rdparty/blobs/mainboard/google/reef/coral/ifwi.bin" +CONFIG_HAVE_IFD_BIN=y +CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS=y +CONFIG_CPU_UCODE_BINARIES="3rdparty/blobs/soc/intel/apl/cpu_microcode_blob.bin" +CONFIG_EC_GOOGLE_CHROMEEC_FIRMWARE_EXTERNAL=y +CONFIG_EC_GOOGLE_CHROMEEC_FIRMWARE_FILE="3rdparty/blobs/mainboard/google/reef/coral/ec.RW.flat" +CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION=y diff --git a/configs/apl/config.nasher360.uefi b/configs/apl/config.nasher360.uefi new file mode 100644 index 00000000000..a1496fc8376 --- /dev/null +++ b/configs/apl/config.nasher360.uefi @@ -0,0 +1,16 @@ +CONFIG_LOCALVERSION="MrChromebox-4.19" +CONFIG_VENDOR_GOOGLE=y +CONFIG_NO_POST=y +# CONFIG_CONSOLE_SERIAL is not set +CONFIG_INCLUDE_NHLT_BLOBS=y +CONFIG_IFD_BIN_PATH="3rdparty/blobs/mainboard/google/reef/flashdescriptor.bin" +CONFIG_BOARD_GOOGLE_CORAL=y +CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="Nasher360" +CONFIG_NEED_IFWI=y +CONFIG_IFWI_FILE_NAME="3rdparty/blobs/mainboard/google/reef/coral/ifwi.bin" +CONFIG_HAVE_IFD_BIN=y +CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS=y +CONFIG_CPU_UCODE_BINARIES="3rdparty/blobs/soc/intel/apl/cpu_microcode_blob.bin" +CONFIG_EC_GOOGLE_CHROMEEC_FIRMWARE_EXTERNAL=y +CONFIG_EC_GOOGLE_CHROMEEC_FIRMWARE_FILE="3rdparty/blobs/mainboard/google/reef/coral/ec.RW.flat" +CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION=y diff --git a/configs/apl/config.pyro.uefi b/configs/apl/config.pyro.uefi new file mode 100644 index 00000000000..196a974e2df --- /dev/null +++ b/configs/apl/config.pyro.uefi @@ -0,0 +1,15 @@ +CONFIG_LOCALVERSION="MrChromebox-4.19" +CONFIG_VENDOR_GOOGLE=y +CONFIG_NO_POST=y +# CONFIG_CONSOLE_SERIAL is not set +CONFIG_INCLUDE_NHLT_BLOBS=y +CONFIG_IFD_BIN_PATH="3rdparty/blobs/mainboard/google/reef/flashdescriptor.bin" +CONFIG_BOARD_GOOGLE_PYRO=y +CONFIG_NEED_IFWI=y +CONFIG_IFWI_FILE_NAME="3rdparty/blobs/mainboard/google/reef/pyro/ifwi.bin" +CONFIG_HAVE_IFD_BIN=y +CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS=y +CONFIG_CPU_UCODE_BINARIES="3rdparty/blobs/soc/intel/apl/cpu_microcode_blob.bin" +CONFIG_EC_GOOGLE_CHROMEEC_FIRMWARE_EXTERNAL=y +CONFIG_EC_GOOGLE_CHROMEEC_FIRMWARE_FILE="3rdparty/blobs/mainboard/google/reef/pyro/ec.RW.flat" +CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION=y diff --git a/configs/apl/config.rabbid.uefi b/configs/apl/config.rabbid.uefi new file mode 100644 index 00000000000..82a5c15e001 --- /dev/null +++ b/configs/apl/config.rabbid.uefi @@ -0,0 +1,16 @@ +CONFIG_LOCALVERSION="MrChromebox-4.19" +CONFIG_VENDOR_GOOGLE=y +CONFIG_NO_POST=y +# CONFIG_CONSOLE_SERIAL is not set +CONFIG_INCLUDE_NHLT_BLOBS=y +CONFIG_IFD_BIN_PATH="3rdparty/blobs/mainboard/google/reef/flashdescriptor.bin" +CONFIG_BOARD_GOOGLE_CORAL=y +CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="Rabbid" +CONFIG_NEED_IFWI=y +CONFIG_IFWI_FILE_NAME="3rdparty/blobs/mainboard/google/reef/coral/ifwi.bin" +CONFIG_HAVE_IFD_BIN=y +CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS=y +CONFIG_CPU_UCODE_BINARIES="3rdparty/blobs/soc/intel/apl/cpu_microcode_blob.bin" +CONFIG_EC_GOOGLE_CHROMEEC_FIRMWARE_EXTERNAL=y +CONFIG_EC_GOOGLE_CHROMEEC_FIRMWARE_FILE="3rdparty/blobs/mainboard/google/reef/coral/ec.RW.flat" +CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION=y diff --git a/configs/apl/config.reef.uefi b/configs/apl/config.reef.uefi new file mode 100644 index 00000000000..8e47bcb5c7f --- /dev/null +++ b/configs/apl/config.reef.uefi @@ -0,0 +1,15 @@ +CONFIG_LOCALVERSION="MrChromebox-4.19" +CONFIG_VENDOR_GOOGLE=y +CONFIG_NO_POST=y +# CONFIG_CONSOLE_SERIAL is not set +CONFIG_INCLUDE_NHLT_BLOBS=y +CONFIG_IFD_BIN_PATH="3rdparty/blobs/mainboard/google/reef/flashdescriptor.bin" +CONFIG_BOARD_GOOGLE_REEF=y +CONFIG_NEED_IFWI=y +CONFIG_IFWI_FILE_NAME="3rdparty/blobs/mainboard/google/reef/reef/ifwi.bin" +CONFIG_HAVE_IFD_BIN=y +CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS=y +CONFIG_CPU_UCODE_BINARIES="3rdparty/blobs/soc/intel/apl/cpu_microcode_blob.bin" +CONFIG_EC_GOOGLE_CHROMEEC_FIRMWARE_EXTERNAL=y +CONFIG_EC_GOOGLE_CHROMEEC_FIRMWARE_FILE="3rdparty/blobs/mainboard/google/reef/reef/ec.RW.flat" +CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION=y diff --git a/configs/apl/config.robo.uefi b/configs/apl/config.robo.uefi new file mode 100644 index 00000000000..347ba3d460c --- /dev/null +++ b/configs/apl/config.robo.uefi @@ -0,0 +1,16 @@ +CONFIG_LOCALVERSION="MrChromebox-4.19" +CONFIG_VENDOR_GOOGLE=y +CONFIG_NO_POST=y +# CONFIG_CONSOLE_SERIAL is not set +CONFIG_INCLUDE_NHLT_BLOBS=y +CONFIG_IFD_BIN_PATH="3rdparty/blobs/mainboard/google/reef/flashdescriptor.bin" +CONFIG_BOARD_GOOGLE_CORAL=y +CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="Robo" +CONFIG_NEED_IFWI=y +CONFIG_IFWI_FILE_NAME="3rdparty/blobs/mainboard/google/reef/coral/ifwi.bin" +CONFIG_HAVE_IFD_BIN=y +CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS=y +CONFIG_CPU_UCODE_BINARIES="3rdparty/blobs/soc/intel/apl/cpu_microcode_blob.bin" +CONFIG_EC_GOOGLE_CHROMEEC_FIRMWARE_EXTERNAL=y +CONFIG_EC_GOOGLE_CHROMEEC_FIRMWARE_FILE="3rdparty/blobs/mainboard/google/reef/coral/ec.RW.flat" +CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION=y diff --git a/configs/apl/config.robo360.uefi b/configs/apl/config.robo360.uefi new file mode 100644 index 00000000000..ba9dc671238 --- /dev/null +++ b/configs/apl/config.robo360.uefi @@ -0,0 +1,16 @@ +CONFIG_LOCALVERSION="MrChromebox-4.19" +CONFIG_VENDOR_GOOGLE=y +CONFIG_NO_POST=y +# CONFIG_CONSOLE_SERIAL is not set +CONFIG_INCLUDE_NHLT_BLOBS=y +CONFIG_IFD_BIN_PATH="3rdparty/blobs/mainboard/google/reef/flashdescriptor.bin" +CONFIG_BOARD_GOOGLE_CORAL=y +CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="Robo360" +CONFIG_NEED_IFWI=y +CONFIG_IFWI_FILE_NAME="3rdparty/blobs/mainboard/google/reef/coral/ifwi.bin" +CONFIG_HAVE_IFD_BIN=y +CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS=y +CONFIG_CPU_UCODE_BINARIES="3rdparty/blobs/soc/intel/apl/cpu_microcode_blob.bin" +CONFIG_EC_GOOGLE_CHROMEEC_FIRMWARE_EXTERNAL=y +CONFIG_EC_GOOGLE_CHROMEEC_FIRMWARE_FILE="3rdparty/blobs/mainboard/google/reef/coral/ec.RW.flat" +CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION=y diff --git a/configs/apl/config.sand.uefi b/configs/apl/config.sand.uefi new file mode 100644 index 00000000000..89ffc4472e2 --- /dev/null +++ b/configs/apl/config.sand.uefi @@ -0,0 +1,15 @@ +CONFIG_LOCALVERSION="MrChromebox-4.19" +CONFIG_VENDOR_GOOGLE=y +CONFIG_NO_POST=y +# CONFIG_CONSOLE_SERIAL is not set +CONFIG_INCLUDE_NHLT_BLOBS=y +CONFIG_IFD_BIN_PATH="3rdparty/blobs/mainboard/google/reef/flashdescriptor.bin" +CONFIG_BOARD_GOOGLE_SAND=y +CONFIG_NEED_IFWI=y +CONFIG_IFWI_FILE_NAME="3rdparty/blobs/mainboard/google/reef/sand/ifwi.bin" +CONFIG_HAVE_IFD_BIN=y +CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS=y +CONFIG_CPU_UCODE_BINARIES="3rdparty/blobs/soc/intel/apl/cpu_microcode_blob.bin" +CONFIG_EC_GOOGLE_CHROMEEC_FIRMWARE_EXTERNAL=y +CONFIG_EC_GOOGLE_CHROMEEC_FIRMWARE_FILE="3rdparty/blobs/mainboard/google/reef/sand/ec.RW.flat" +CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION=y diff --git a/configs/apl/config.santa.uefi b/configs/apl/config.santa.uefi new file mode 100644 index 00000000000..23b059ec205 --- /dev/null +++ b/configs/apl/config.santa.uefi @@ -0,0 +1,16 @@ +CONFIG_LOCALVERSION="MrChromebox-4.19" +CONFIG_VENDOR_GOOGLE=y +CONFIG_NO_POST=y +# CONFIG_CONSOLE_SERIAL is not set +CONFIG_INCLUDE_NHLT_BLOBS=y +CONFIG_IFD_BIN_PATH="3rdparty/blobs/mainboard/google/reef/flashdescriptor.bin" +CONFIG_BOARD_GOOGLE_CORAL=y +CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="Santa" +CONFIG_NEED_IFWI=y +CONFIG_IFWI_FILE_NAME="3rdparty/blobs/mainboard/google/reef/coral/ifwi.bin" +CONFIG_HAVE_IFD_BIN=y +CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS=y +CONFIG_CPU_UCODE_BINARIES="3rdparty/blobs/soc/intel/apl/cpu_microcode_blob.bin" +CONFIG_EC_GOOGLE_CHROMEEC_FIRMWARE_EXTERNAL=y +CONFIG_EC_GOOGLE_CHROMEEC_FIRMWARE_FILE="3rdparty/blobs/mainboard/google/reef/coral/ec.RW.flat" +CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION=y diff --git a/configs/apl/config.snappy.uefi b/configs/apl/config.snappy.uefi new file mode 100644 index 00000000000..233cb101640 --- /dev/null +++ b/configs/apl/config.snappy.uefi @@ -0,0 +1,15 @@ +CONFIG_LOCALVERSION="MrChromebox-4.19" +CONFIG_VENDOR_GOOGLE=y +CONFIG_NO_POST=y +# CONFIG_CONSOLE_SERIAL is not set +CONFIG_INCLUDE_NHLT_BLOBS=y +CONFIG_IFD_BIN_PATH="3rdparty/blobs/mainboard/google/reef/flashdescriptor.bin" +CONFIG_BOARD_GOOGLE_SNAPPY=y +CONFIG_NEED_IFWI=y +CONFIG_IFWI_FILE_NAME="3rdparty/blobs/mainboard/google/reef/snappy/ifwi.bin" +CONFIG_HAVE_IFD_BIN=y +CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS=y +CONFIG_CPU_UCODE_BINARIES="3rdparty/blobs/soc/intel/apl/cpu_microcode_blob.bin" +CONFIG_EC_GOOGLE_CHROMEEC_FIRMWARE_EXTERNAL=y +CONFIG_EC_GOOGLE_CHROMEEC_FIRMWARE_FILE="3rdparty/blobs/mainboard/google/reef/snappy/ec.RW.flat" +CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION=y diff --git a/configs/apl/config.whitetip.uefi b/configs/apl/config.whitetip.uefi new file mode 100644 index 00000000000..d529aaa2d13 --- /dev/null +++ b/configs/apl/config.whitetip.uefi @@ -0,0 +1,16 @@ +CONFIG_LOCALVERSION="MrChromebox-4.19" +CONFIG_VENDOR_GOOGLE=y +CONFIG_NO_POST=y +# CONFIG_CONSOLE_SERIAL is not set +CONFIG_INCLUDE_NHLT_BLOBS=y +CONFIG_IFD_BIN_PATH="3rdparty/blobs/mainboard/google/reef/flashdescriptor.bin" +CONFIG_BOARD_GOOGLE_CORAL=y +CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="Whitetip" +CONFIG_NEED_IFWI=y +CONFIG_IFWI_FILE_NAME="3rdparty/blobs/mainboard/google/reef/coral/ifwi.bin" +CONFIG_HAVE_IFD_BIN=y +CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS=y +CONFIG_CPU_UCODE_BINARIES="3rdparty/blobs/soc/intel/apl/cpu_microcode_blob.bin" +CONFIG_EC_GOOGLE_CHROMEEC_FIRMWARE_EXTERNAL=y +CONFIG_EC_GOOGLE_CHROMEEC_FIRMWARE_FILE="3rdparty/blobs/mainboard/google/reef/coral/ec.RW.flat" +CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION=y diff --git a/configs/bdw/config.auron_paine.uefi b/configs/bdw/config.auron_paine.uefi new file mode 100644 index 00000000000..0571f97fc60 --- /dev/null +++ b/configs/bdw/config.auron_paine.uefi @@ -0,0 +1,21 @@ +CONFIG_LOCALVERSION="MrChromebox-4.19" +CONFIG_VENDOR_GOOGLE=y +CONFIG_NO_POST=y +CONFIG_CBFS_SIZE=0x250000 +CONFIG_IFD_BIN_PATH="3rdparty/blobs/soc/intel/bdw/book/flashdescriptor.bin" +CONFIG_ME_BIN_PATH="3rdparty/blobs/soc/intel/bdw/book/me.bin" +CONFIG_BOARD_GOOGLE_AURON_PAINE=y +CONFIG_HAVE_IFD_BIN=y +# CONFIG_DRIVERS_UART_8250IO is not set +CONFIG_HAVE_MRC=y +CONFIG_MRC_FILE="3rdparty/blobs/soc/intel/bdw/book/mrc.bin" +CONFIG_HAVE_REFCODE_BLOB=y +CONFIG_REFCODE_BLOB_FILE="3rdparty/blobs/soc/intel/bdw/book/refcode.elf" +CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS=y +CONFIG_CPU_UCODE_BINARIES="3rdparty/blobs/soc/intel/bdw/cpu_microcode_blob.bin" +CONFIG_EC_GOOGLE_CHROMEEC_FIRMWARE_EXTERNAL=y +CONFIG_EC_GOOGLE_CHROMEEC_FIRMWARE_FILE="3rdparty/blobs/mainboard/google/auron/paine/ec.RW.flat" +CONFIG_HAVE_ME_BIN=y +CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION=y +CONFIG_NO_GFX_INIT=y +CONFIG_EDK2_GOP_DRIVER=y diff --git a/configs/bdw/config.auron_yuna.uefi b/configs/bdw/config.auron_yuna.uefi new file mode 100644 index 00000000000..ba8dd03105c --- /dev/null +++ b/configs/bdw/config.auron_yuna.uefi @@ -0,0 +1,21 @@ +CONFIG_LOCALVERSION="MrChromebox-4.19" +CONFIG_VENDOR_GOOGLE=y +CONFIG_NO_POST=y +CONFIG_CBFS_SIZE=0x250000 +CONFIG_IFD_BIN_PATH="3rdparty/blobs/soc/intel/bdw/book/flashdescriptor.bin" +CONFIG_ME_BIN_PATH="3rdparty/blobs/soc/intel/bdw/book/me.bin" +CONFIG_BOARD_GOOGLE_AURON_YUNA=y +CONFIG_HAVE_IFD_BIN=y +# CONFIG_DRIVERS_UART_8250IO is not set +CONFIG_HAVE_MRC=y +CONFIG_MRC_FILE="3rdparty/blobs/soc/intel/bdw/book/mrc.bin" +CONFIG_HAVE_REFCODE_BLOB=y +CONFIG_REFCODE_BLOB_FILE="3rdparty/blobs/soc/intel/bdw/book/refcode.elf" +CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS=y +CONFIG_CPU_UCODE_BINARIES="3rdparty/blobs/soc/intel/bdw/cpu_microcode_blob.bin" +CONFIG_EC_GOOGLE_CHROMEEC_FIRMWARE_EXTERNAL=y +CONFIG_EC_GOOGLE_CHROMEEC_FIRMWARE_FILE="3rdparty/blobs/mainboard/google/auron/yuna/ec.RW.flat" +CONFIG_HAVE_ME_BIN=y +CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION=y +CONFIG_NO_GFX_INIT=y +CONFIG_EDK2_GOP_DRIVER=y diff --git a/configs/bdw/config.buddy.uefi b/configs/bdw/config.buddy.uefi new file mode 100644 index 00000000000..300e03a779a --- /dev/null +++ b/configs/bdw/config.buddy.uefi @@ -0,0 +1,21 @@ +CONFIG_LOCALVERSION="MrChromebox-4.19" +CONFIG_VENDOR_GOOGLE=y +CONFIG_NO_POST=y +CONFIG_CBFS_SIZE=0x250000 +CONFIG_IFD_BIN_PATH="3rdparty/blobs/mainboard/google/auron/buddy/flashdescriptor.bin" +CONFIG_ME_BIN_PATH="3rdparty/blobs/soc/intel/bdw/book/me.bin" +CONFIG_BOARD_GOOGLE_BUDDY=y +CONFIG_HAVE_IFD_BIN=y +# CONFIG_DRIVERS_UART_8250IO is not set +CONFIG_HAVE_MRC=y +CONFIG_MRC_FILE="3rdparty/blobs/soc/intel/bdw/book/mrc.bin" +CONFIG_HAVE_REFCODE_BLOB=y +CONFIG_REFCODE_BLOB_FILE="3rdparty/blobs/soc/intel/bdw/book/refcode.elf" +CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS=y +CONFIG_CPU_UCODE_BINARIES="3rdparty/blobs/soc/intel/bdw/cpu_microcode_blob.bin" +CONFIG_EC_GOOGLE_CHROMEEC_FIRMWARE_EXTERNAL=y +CONFIG_EC_GOOGLE_CHROMEEC_FIRMWARE_FILE="3rdparty/blobs/mainboard/google/auron/buddy/ec.RW.flat" +CONFIG_HAVE_ME_BIN=y +CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION=y +CONFIG_NO_GFX_INIT=y +CONFIG_EDK2_GOP_DRIVER=y diff --git a/configs/bdw/config.gandof.uefi b/configs/bdw/config.gandof.uefi new file mode 100644 index 00000000000..9e702cb1c33 --- /dev/null +++ b/configs/bdw/config.gandof.uefi @@ -0,0 +1,21 @@ +CONFIG_LOCALVERSION="MrChromebox-4.19" +CONFIG_VENDOR_GOOGLE=y +CONFIG_NO_POST=y +CONFIG_CBFS_SIZE=0x250000 +CONFIG_IFD_BIN_PATH="3rdparty/blobs/soc/intel/bdw/book/flashdescriptor.bin" +CONFIG_ME_BIN_PATH="3rdparty/blobs/soc/intel/bdw/book/me.bin" +CONFIG_BOARD_GOOGLE_GANDOF=y +CONFIG_HAVE_IFD_BIN=y +# CONFIG_DRIVERS_UART_8250IO is not set +CONFIG_HAVE_MRC=y +CONFIG_MRC_FILE="3rdparty/blobs/soc/intel/bdw/book/mrc.bin" +CONFIG_HAVE_REFCODE_BLOB=y +CONFIG_REFCODE_BLOB_FILE="3rdparty/blobs/soc/intel/bdw/book/refcode.elf" +CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS=y +CONFIG_CPU_UCODE_BINARIES="3rdparty/blobs/soc/intel/bdw/cpu_microcode_blob.bin" +CONFIG_EC_GOOGLE_CHROMEEC_FIRMWARE_EXTERNAL=y +CONFIG_EC_GOOGLE_CHROMEEC_FIRMWARE_FILE="3rdparty/blobs/mainboard/google/auron/gandof/ec.RW.flat" +CONFIG_HAVE_ME_BIN=y +CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION=y +CONFIG_NO_GFX_INIT=y +CONFIG_EDK2_GOP_DRIVER=y diff --git a/configs/bdw/config.guado.uefi b/configs/bdw/config.guado.uefi new file mode 100644 index 00000000000..0dcbcf0fe76 --- /dev/null +++ b/configs/bdw/config.guado.uefi @@ -0,0 +1,21 @@ +CONFIG_LOCALVERSION="MrChromebox-4.19" +CONFIG_VENDOR_GOOGLE=y +CONFIG_NO_POST=y +CONFIG_CBFS_SIZE=0x250000 +CONFIG_IFD_BIN_PATH="3rdparty/blobs/soc/intel/bdw/box/flashdescriptor.bin" +CONFIG_ME_BIN_PATH="3rdparty/blobs/soc/intel/bdw/box/me.bin" +CONFIG_BOARD_GOOGLE_GUADO=y +CONFIG_EDK2_BOOT_TIMEOUT=5 +CONFIG_HAVE_IFD_BIN=y +# CONFIG_DRIVERS_UART_8250IO is not set +CONFIG_POWER_STATE_PREVIOUS_AFTER_FAILURE=y +CONFIG_HAVE_MRC=y +CONFIG_MRC_FILE="3rdparty/blobs/soc/intel/bdw/box/mrc.bin" +CONFIG_HAVE_REFCODE_BLOB=y +CONFIG_REFCODE_BLOB_FILE="3rdparty/blobs/soc/intel/bdw/box/refcode.elf" +CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS=y +CONFIG_CPU_UCODE_BINARIES="3rdparty/blobs/soc/intel/bdw/cpu_microcode_blob.bin" +CONFIG_HAVE_ME_BIN=y +CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION=y +CONFIG_NO_GFX_INIT=y +CONFIG_EDK2_GOP_DRIVER=y diff --git a/configs/bdw/config.librem_13v1.uefi b/configs/bdw/config.librem_13v1.uefi new file mode 100644 index 00000000000..3ac9978286f --- /dev/null +++ b/configs/bdw/config.librem_13v1.uefi @@ -0,0 +1,14 @@ +CONFIG_LOCALVERSION="MrChromebox-4.19" +CONFIG_VENDOR_PURISM=y +CONFIG_CBFS_SIZE=0x5C0000 +CONFIG_IFD_BIN_PATH="3rdparty/purism-blobs/mainboard/purism/librem_bdw/descriptor.bin" +CONFIG_ME_BIN_PATH="3rdparty/purism-blobs/mainboard/purism/librem_bdw/me.bin" +CONFIG_HAVE_IFD_BIN=y +# CONFIG_PCIEXP_CLK_PM is not set +CONFIG_HAVE_MRC=y +CONFIG_MRC_FILE="3rdparty/purism-blobs/mainboard/purism/librem_bdw/mrc.bin" +CONFIG_HAVE_REFCODE_BLOB=y +CONFIG_REFCODE_BLOB_FILE="3rdparty/purism-blobs/mainboard/purism/librem_bdw/refcode.elf" +CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS=y +CONFIG_CPU_UCODE_BINARIES="3rdparty/purism-blobs/mainboard/purism/librem_bdw/cpu_microcode_blob.bin" +CONFIG_HAVE_ME_BIN=y diff --git a/configs/bdw/config.librem_15v2.uefi b/configs/bdw/config.librem_15v2.uefi new file mode 100644 index 00000000000..92c9300f466 --- /dev/null +++ b/configs/bdw/config.librem_15v2.uefi @@ -0,0 +1,15 @@ +CONFIG_LOCALVERSION="MrChromebox-4.19" +CONFIG_VENDOR_PURISM=y +CONFIG_CBFS_SIZE=0x5C0000 +CONFIG_IFD_BIN_PATH="3rdparty/purism-blobs/mainboard/purism/librem_bdw/descriptor.bin" +CONFIG_ME_BIN_PATH="3rdparty/purism-blobs/mainboard/purism/librem_bdw/me.bin" +CONFIG_HAVE_IFD_BIN=y +# CONFIG_PCIEXP_CLK_PM is not set +CONFIG_BOARD_PURISM_LIBREM15_V2=y +CONFIG_HAVE_MRC=y +CONFIG_MRC_FILE="3rdparty/purism-blobs/mainboard/purism/librem_bdw/mrc.bin" +CONFIG_HAVE_REFCODE_BLOB=y +CONFIG_REFCODE_BLOB_FILE="3rdparty/purism-blobs/mainboard/purism/librem_bdw/refcode.elf" +CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS=y +CONFIG_CPU_UCODE_BINARIES="3rdparty/purism-blobs/mainboard/purism/librem_bdw/cpu_microcode_blob.bin" +CONFIG_HAVE_ME_BIN=y diff --git a/configs/bdw/config.lulu.uefi b/configs/bdw/config.lulu.uefi new file mode 100644 index 00000000000..caed2e05986 --- /dev/null +++ b/configs/bdw/config.lulu.uefi @@ -0,0 +1,21 @@ +CONFIG_LOCALVERSION="MrChromebox-4.19" +CONFIG_VENDOR_GOOGLE=y +CONFIG_NO_POST=y +CONFIG_CBFS_SIZE=0x250000 +CONFIG_IFD_BIN_PATH="3rdparty/blobs/soc/intel/bdw/book/flashdescriptor.bin" +CONFIG_ME_BIN_PATH="3rdparty/blobs/soc/intel/bdw/book/me.bin" +CONFIG_BOARD_GOOGLE_LULU=y +CONFIG_HAVE_IFD_BIN=y +# CONFIG_DRIVERS_UART_8250IO is not set +CONFIG_HAVE_MRC=y +CONFIG_MRC_FILE="3rdparty/blobs/soc/intel/bdw/book/mrc.bin" +CONFIG_HAVE_REFCODE_BLOB=y +CONFIG_REFCODE_BLOB_FILE="3rdparty/blobs/soc/intel/bdw/book/refcode.elf" +CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS=y +CONFIG_CPU_UCODE_BINARIES="3rdparty/blobs/soc/intel/bdw/cpu_microcode_blob.bin" +CONFIG_EC_GOOGLE_CHROMEEC_FIRMWARE_EXTERNAL=y +CONFIG_EC_GOOGLE_CHROMEEC_FIRMWARE_FILE="3rdparty/blobs/mainboard/google/auron/lulu/ec.RW.flat" +CONFIG_HAVE_ME_BIN=y +CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION=y +CONFIG_NO_GFX_INIT=y +CONFIG_EDK2_GOP_DRIVER=y diff --git a/configs/bdw/config.rikku.uefi b/configs/bdw/config.rikku.uefi new file mode 100644 index 00000000000..ab75ee3075b --- /dev/null +++ b/configs/bdw/config.rikku.uefi @@ -0,0 +1,21 @@ +CONFIG_LOCALVERSION="MrChromebox-4.19" +CONFIG_VENDOR_GOOGLE=y +CONFIG_NO_POST=y +CONFIG_CBFS_SIZE=0x250000 +CONFIG_IFD_BIN_PATH="3rdparty/blobs/soc/intel/bdw/box/flashdescriptor.bin" +CONFIG_ME_BIN_PATH="3rdparty/blobs/soc/intel/bdw/box/me.bin" +CONFIG_BOARD_GOOGLE_RIKKU=y +CONFIG_EDK2_BOOT_TIMEOUT=5 +CONFIG_HAVE_IFD_BIN=y +# CONFIG_DRIVERS_UART_8250IO is not set +CONFIG_POWER_STATE_PREVIOUS_AFTER_FAILURE=y +CONFIG_HAVE_MRC=y +CONFIG_MRC_FILE="3rdparty/blobs/soc/intel/bdw/box/mrc.bin" +CONFIG_HAVE_REFCODE_BLOB=y +CONFIG_REFCODE_BLOB_FILE="3rdparty/blobs/soc/intel/bdw/box/refcode.elf" +CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS=y +CONFIG_CPU_UCODE_BINARIES="3rdparty/blobs/soc/intel/bdw/cpu_microcode_blob.bin" +CONFIG_HAVE_ME_BIN=y +CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION=y +CONFIG_NO_GFX_INIT=y +CONFIG_EDK2_GOP_DRIVER=y diff --git a/configs/bdw/config.samus.uefi b/configs/bdw/config.samus.uefi new file mode 100644 index 00000000000..83e0973e3a2 --- /dev/null +++ b/configs/bdw/config.samus.uefi @@ -0,0 +1,21 @@ +CONFIG_LOCALVERSION="MrChromebox-4.19" +CONFIG_VENDOR_GOOGLE=y +CONFIG_NO_POST=y +CONFIG_CBFS_SIZE=0x250000 +CONFIG_LINEAR_FRAMEBUFFER_MAX_HEIGHT=1275 +CONFIG_LINEAR_FRAMEBUFFER_MAX_WIDTH=1920 +CONFIG_IFD_BIN_PATH="3rdparty/blobs/mainboard/google/auron/samus/flashdescriptor.bin" +CONFIG_ME_BIN_PATH="3rdparty/blobs/mainboard/google/auron/samus/me.bin" +CONFIG_BOARD_GOOGLE_SAMUS=y +CONFIG_HAVE_IFD_BIN=y +# CONFIG_DRIVERS_UART_8250IO is not set +CONFIG_HAVE_MRC=y +CONFIG_MRC_FILE="3rdparty/blobs/soc/intel/bdw/book/mrc.bin" +CONFIG_HAVE_REFCODE_BLOB=y +CONFIG_REFCODE_BLOB_FILE="3rdparty/blobs/soc/intel/bdw/book/refcode.elf" +CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS=y +CONFIG_CPU_UCODE_BINARIES="3rdparty/blobs/soc/intel/bdw/cpu_microcode_blob.bin" +CONFIG_EC_GOOGLE_CHROMEEC_FIRMWARE_EXTERNAL=y +CONFIG_EC_GOOGLE_CHROMEEC_FIRMWARE_FILE="3rdparty/blobs/mainboard/google/auron/samus/ec.RW.flat" +CONFIG_HAVE_ME_BIN=y +CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION=y diff --git a/configs/bdw/config.tidus.uefi b/configs/bdw/config.tidus.uefi new file mode 100644 index 00000000000..f1bab0a7669 --- /dev/null +++ b/configs/bdw/config.tidus.uefi @@ -0,0 +1,21 @@ +CONFIG_LOCALVERSION="MrChromebox-4.19" +CONFIG_VENDOR_GOOGLE=y +CONFIG_NO_POST=y +CONFIG_CBFS_SIZE=0x250000 +CONFIG_IFD_BIN_PATH="3rdparty/blobs/soc/intel/bdw/box/flashdescriptor.bin" +CONFIG_ME_BIN_PATH="3rdparty/blobs/soc/intel/bdw/box/me.bin" +CONFIG_BOARD_GOOGLE_TIDUS=y +CONFIG_EDK2_BOOT_TIMEOUT=5 +CONFIG_HAVE_IFD_BIN=y +# CONFIG_DRIVERS_UART_8250IO is not set +CONFIG_POWER_STATE_PREVIOUS_AFTER_FAILURE=y +CONFIG_HAVE_MRC=y +CONFIG_MRC_FILE="3rdparty/blobs/soc/intel/bdw/box/mrc.bin" +CONFIG_HAVE_REFCODE_BLOB=y +CONFIG_REFCODE_BLOB_FILE="3rdparty/blobs/soc/intel/bdw/box/refcode.elf" +CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS=y +CONFIG_CPU_UCODE_BINARIES="3rdparty/blobs/soc/intel/bdw/cpu_microcode_blob.bin" +CONFIG_HAVE_ME_BIN=y +CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION=y +CONFIG_NO_GFX_INIT=y +CONFIG_EDK2_GOP_DRIVER=y diff --git a/configs/bsw/config.banon.uefi b/configs/bsw/config.banon.uefi new file mode 100644 index 00000000000..da943c84088 --- /dev/null +++ b/configs/bsw/config.banon.uefi @@ -0,0 +1,19 @@ +CONFIG_LOCALVERSION="MrChromebox-4.19" +CONFIG_VENDOR_GOOGLE=y +CONFIG_NO_POST=y +CONFIG_CBFS_SIZE=0x250000 +CONFIG_IFD_BIN_PATH="3rdparty/blobs/mainboard/google/cyan/banon/flashdescriptor.bin" +CONFIG_ME_BIN_PATH="3rdparty/blobs/soc/intel/bsw/me.bin" +CONFIG_BOARD_GOOGLE_BANON=y +CONFIG_HAVE_IFD_BIN=y +# CONFIG_DRIVERS_UART_8250IO is not set +CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS=y +CONFIG_CPU_UCODE_BINARIES="3rdparty/blobs/soc/intel/bsw/cpu_microcode_blob.bin" +CONFIG_EC_GOOGLE_CHROMEEC_FIRMWARE_EXTERNAL=y +CONFIG_EC_GOOGLE_CHROMEEC_FIRMWARE_FILE="3rdparty/blobs/mainboard/google/cyan/banon/ec.RW.flat" +CONFIG_HAVE_ME_BIN=y +CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION=y +CONFIG_NO_GFX_INIT=y +CONFIG_HAVE_FSP_BIN=y +CONFIG_FSP_FILE="3rdparty/blobs/mainboard/google/cyan/banon/fsp.bin" +CONFIG_EDK2_GOP_DRIVER=y diff --git a/configs/bsw/config.celes.uefi b/configs/bsw/config.celes.uefi new file mode 100644 index 00000000000..caa642317e1 --- /dev/null +++ b/configs/bsw/config.celes.uefi @@ -0,0 +1,19 @@ +CONFIG_LOCALVERSION="MrChromebox-4.19" +CONFIG_VENDOR_GOOGLE=y +CONFIG_NO_POST=y +CONFIG_CBFS_SIZE=0x250000 +CONFIG_IFD_BIN_PATH="3rdparty/blobs/mainboard/google/cyan/celes/flashdescriptor.bin" +CONFIG_ME_BIN_PATH="3rdparty/blobs/soc/intel/bsw/me.bin" +CONFIG_BOARD_GOOGLE_CELES=y +CONFIG_HAVE_IFD_BIN=y +# CONFIG_DRIVERS_UART_8250IO is not set +CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS=y +CONFIG_CPU_UCODE_BINARIES="3rdparty/blobs/soc/intel/bsw/cpu_microcode_blob.bin" +CONFIG_EC_GOOGLE_CHROMEEC_FIRMWARE_EXTERNAL=y +CONFIG_EC_GOOGLE_CHROMEEC_FIRMWARE_FILE="3rdparty/blobs/mainboard/google/cyan/celes/ec.RW.flat" +CONFIG_HAVE_ME_BIN=y +CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION=y +CONFIG_NO_GFX_INIT=y +CONFIG_HAVE_FSP_BIN=y +CONFIG_FSP_FILE="3rdparty/blobs/mainboard/google/cyan/celes/fsp.bin" +CONFIG_EDK2_GOP_DRIVER=y diff --git a/configs/bsw/config.cyan.uefi b/configs/bsw/config.cyan.uefi new file mode 100644 index 00000000000..8a0c49ce02d --- /dev/null +++ b/configs/bsw/config.cyan.uefi @@ -0,0 +1,19 @@ +CONFIG_LOCALVERSION="MrChromebox-4.19" +CONFIG_VENDOR_GOOGLE=y +CONFIG_NO_POST=y +CONFIG_CBFS_SIZE=0x250000 +CONFIG_IFD_BIN_PATH="3rdparty/blobs/mainboard/google/cyan/cyan/flashdescriptor.bin" +CONFIG_ME_BIN_PATH="3rdparty/blobs/soc/intel/bsw/me.bin" +CONFIG_BOARD_GOOGLE_CYAN=y +CONFIG_HAVE_IFD_BIN=y +# CONFIG_DRIVERS_UART_8250IO is not set +CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS=y +CONFIG_CPU_UCODE_BINARIES="3rdparty/blobs/soc/intel/bsw/cpu_microcode_blob.bin" +CONFIG_EC_GOOGLE_CHROMEEC_FIRMWARE_EXTERNAL=y +CONFIG_EC_GOOGLE_CHROMEEC_FIRMWARE_FILE="3rdparty/blobs/mainboard/google/cyan/cyan/ec.RW.flat" +CONFIG_HAVE_ME_BIN=y +CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION=y +CONFIG_NO_GFX_INIT=y +CONFIG_HAVE_FSP_BIN=y +CONFIG_FSP_FILE="3rdparty/blobs/mainboard/google/cyan/cyan/fsp.bin" +CONFIG_EDK2_GOP_DRIVER=y diff --git a/configs/bsw/config.edgar.uefi b/configs/bsw/config.edgar.uefi new file mode 100644 index 00000000000..33d469a21ec --- /dev/null +++ b/configs/bsw/config.edgar.uefi @@ -0,0 +1,19 @@ +CONFIG_LOCALVERSION="MrChromebox-4.19" +CONFIG_VENDOR_GOOGLE=y +CONFIG_NO_POST=y +CONFIG_CBFS_SIZE=0x250000 +CONFIG_IFD_BIN_PATH="3rdparty/blobs/mainboard/google/cyan/edgar/flashdescriptor.bin" +CONFIG_ME_BIN_PATH="3rdparty/blobs/soc/intel/bsw/me.bin" +CONFIG_BOARD_GOOGLE_EDGAR=y +CONFIG_HAVE_IFD_BIN=y +# CONFIG_DRIVERS_UART_8250IO is not set +CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS=y +CONFIG_CPU_UCODE_BINARIES="3rdparty/blobs/soc/intel/bsw/cpu_microcode_blob.bin" +CONFIG_EC_GOOGLE_CHROMEEC_FIRMWARE_EXTERNAL=y +CONFIG_EC_GOOGLE_CHROMEEC_FIRMWARE_FILE="3rdparty/blobs/mainboard/google/cyan/edgar/ec.RW.flat" +CONFIG_HAVE_ME_BIN=y +CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION=y +CONFIG_NO_GFX_INIT=y +CONFIG_HAVE_FSP_BIN=y +CONFIG_FSP_FILE="3rdparty/blobs/mainboard/google/cyan/edgar/fsp.bin" +CONFIG_EDK2_GOP_DRIVER=y diff --git a/configs/bsw/config.kefka.uefi b/configs/bsw/config.kefka.uefi new file mode 100644 index 00000000000..33b22b87955 --- /dev/null +++ b/configs/bsw/config.kefka.uefi @@ -0,0 +1,19 @@ +CONFIG_LOCALVERSION="MrChromebox-4.19" +CONFIG_VENDOR_GOOGLE=y +CONFIG_NO_POST=y +CONFIG_CBFS_SIZE=0x250000 +CONFIG_IFD_BIN_PATH="3rdparty/blobs/mainboard/google/cyan/kefka/flashdescriptor.bin" +CONFIG_ME_BIN_PATH="3rdparty/blobs/soc/intel/bsw/me.bin" +CONFIG_BOARD_GOOGLE_KEFKA=y +CONFIG_HAVE_IFD_BIN=y +# CONFIG_DRIVERS_UART_8250IO is not set +CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS=y +CONFIG_CPU_UCODE_BINARIES="3rdparty/blobs/soc/intel/bsw/cpu_microcode_blob.bin" +CONFIG_EC_GOOGLE_CHROMEEC_FIRMWARE_EXTERNAL=y +CONFIG_EC_GOOGLE_CHROMEEC_FIRMWARE_FILE="3rdparty/blobs/mainboard/google/cyan/kefka/ec.RW.flat" +CONFIG_HAVE_ME_BIN=y +CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION=y +CONFIG_NO_GFX_INIT=y +CONFIG_HAVE_FSP_BIN=y +CONFIG_FSP_FILE="3rdparty/blobs/mainboard/google/cyan/kefka/fsp.bin" +CONFIG_EDK2_GOP_DRIVER=y diff --git a/configs/bsw/config.reks.uefi b/configs/bsw/config.reks.uefi new file mode 100644 index 00000000000..5b247ce6dc7 --- /dev/null +++ b/configs/bsw/config.reks.uefi @@ -0,0 +1,19 @@ +CONFIG_LOCALVERSION="MrChromebox-4.19" +CONFIG_VENDOR_GOOGLE=y +CONFIG_NO_POST=y +CONFIG_CBFS_SIZE=0x250000 +CONFIG_IFD_BIN_PATH="3rdparty/blobs/mainboard/google/cyan/reks/flashdescriptor.bin" +CONFIG_ME_BIN_PATH="3rdparty/blobs/soc/intel/bsw/me.bin" +CONFIG_BOARD_GOOGLE_REKS=y +CONFIG_HAVE_IFD_BIN=y +# CONFIG_DRIVERS_UART_8250IO is not set +CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS=y +CONFIG_CPU_UCODE_BINARIES="3rdparty/blobs/soc/intel/bsw/cpu_microcode_blob.bin" +CONFIG_EC_GOOGLE_CHROMEEC_FIRMWARE_EXTERNAL=y +CONFIG_EC_GOOGLE_CHROMEEC_FIRMWARE_FILE="3rdparty/blobs/mainboard/google/cyan/reks/ec.RW.flat" +CONFIG_HAVE_ME_BIN=y +CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION=y +CONFIG_NO_GFX_INIT=y +CONFIG_HAVE_FSP_BIN=y +CONFIG_FSP_FILE="3rdparty/blobs/mainboard/google/cyan/reks/fsp.bin" +CONFIG_EDK2_GOP_DRIVER=y diff --git a/configs/bsw/config.relm.uefi b/configs/bsw/config.relm.uefi new file mode 100644 index 00000000000..5a3c431366b --- /dev/null +++ b/configs/bsw/config.relm.uefi @@ -0,0 +1,19 @@ +CONFIG_LOCALVERSION="MrChromebox-4.19" +CONFIG_VENDOR_GOOGLE=y +CONFIG_NO_POST=y +CONFIG_CBFS_SIZE=0x250000 +CONFIG_IFD_BIN_PATH="3rdparty/blobs/mainboard/google/cyan/relm/flashdescriptor.bin" +CONFIG_ME_BIN_PATH="3rdparty/blobs/soc/intel/bsw/me.bin" +CONFIG_BOARD_GOOGLE_RELM=y +CONFIG_HAVE_IFD_BIN=y +# CONFIG_DRIVERS_UART_8250IO is not set +CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS=y +CONFIG_CPU_UCODE_BINARIES="3rdparty/blobs/soc/intel/bsw/cpu_microcode_blob.bin" +CONFIG_EC_GOOGLE_CHROMEEC_FIRMWARE_EXTERNAL=y +CONFIG_EC_GOOGLE_CHROMEEC_FIRMWARE_FILE="3rdparty/blobs/mainboard/google/cyan/relm/ec.RW.flat" +CONFIG_HAVE_ME_BIN=y +CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION=y +CONFIG_NO_GFX_INIT=y +CONFIG_HAVE_FSP_BIN=y +CONFIG_FSP_FILE="3rdparty/blobs/mainboard/google/cyan/relm/fsp.bin" +CONFIG_EDK2_GOP_DRIVER=y diff --git a/configs/bsw/config.setzer.uefi b/configs/bsw/config.setzer.uefi new file mode 100644 index 00000000000..c58617312ab --- /dev/null +++ b/configs/bsw/config.setzer.uefi @@ -0,0 +1,19 @@ +CONFIG_LOCALVERSION="MrChromebox-4.19" +CONFIG_VENDOR_GOOGLE=y +CONFIG_NO_POST=y +CONFIG_CBFS_SIZE=0x250000 +CONFIG_IFD_BIN_PATH="3rdparty/blobs/mainboard/google/cyan/setzer/flashdescriptor.bin" +CONFIG_ME_BIN_PATH="3rdparty/blobs/soc/intel/bsw/me.bin" +CONFIG_BOARD_GOOGLE_SETZER=y +CONFIG_HAVE_IFD_BIN=y +# CONFIG_DRIVERS_UART_8250IO is not set +CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS=y +CONFIG_CPU_UCODE_BINARIES="3rdparty/blobs/soc/intel/bsw/cpu_microcode_blob.bin" +CONFIG_EC_GOOGLE_CHROMEEC_FIRMWARE_EXTERNAL=y +CONFIG_EC_GOOGLE_CHROMEEC_FIRMWARE_FILE="3rdparty/blobs/mainboard/google/cyan/setzer/ec.RW.flat" +CONFIG_HAVE_ME_BIN=y +CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION=y +CONFIG_NO_GFX_INIT=y +CONFIG_HAVE_FSP_BIN=y +CONFIG_FSP_FILE="3rdparty/blobs/mainboard/google/cyan/setzer/fsp.bin" +CONFIG_EDK2_GOP_DRIVER=y diff --git a/configs/bsw/config.terra.uefi b/configs/bsw/config.terra.uefi new file mode 100644 index 00000000000..690bda4cad2 --- /dev/null +++ b/configs/bsw/config.terra.uefi @@ -0,0 +1,19 @@ +CONFIG_LOCALVERSION="MrChromebox-4.19" +CONFIG_VENDOR_GOOGLE=y +CONFIG_NO_POST=y +CONFIG_CBFS_SIZE=0x250000 +CONFIG_IFD_BIN_PATH="3rdparty/blobs/mainboard/google/cyan/terra/flashdescriptor.bin" +CONFIG_ME_BIN_PATH="3rdparty/blobs/soc/intel/bsw/me.bin" +CONFIG_BOARD_GOOGLE_TERRA=y +CONFIG_HAVE_IFD_BIN=y +# CONFIG_DRIVERS_UART_8250IO is not set +CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS=y +CONFIG_CPU_UCODE_BINARIES="3rdparty/blobs/soc/intel/bsw/cpu_microcode_blob.bin" +CONFIG_EC_GOOGLE_CHROMEEC_FIRMWARE_EXTERNAL=y +CONFIG_EC_GOOGLE_CHROMEEC_FIRMWARE_FILE="3rdparty/blobs/mainboard/google/cyan/terra/ec.RW.flat" +CONFIG_HAVE_ME_BIN=y +CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION=y +CONFIG_NO_GFX_INIT=y +CONFIG_HAVE_FSP_BIN=y +CONFIG_FSP_FILE="3rdparty/blobs/mainboard/google/cyan/terra/fsp.bin" +CONFIG_EDK2_GOP_DRIVER=y diff --git a/configs/bsw/config.ultima.uefi b/configs/bsw/config.ultima.uefi new file mode 100644 index 00000000000..cb275b2ee0a --- /dev/null +++ b/configs/bsw/config.ultima.uefi @@ -0,0 +1,19 @@ +CONFIG_LOCALVERSION="MrChromebox-4.19" +CONFIG_VENDOR_GOOGLE=y +CONFIG_NO_POST=y +CONFIG_CBFS_SIZE=0x250000 +CONFIG_IFD_BIN_PATH="3rdparty/blobs/mainboard/google/cyan/ultima/flashdescriptor.bin" +CONFIG_ME_BIN_PATH="3rdparty/blobs/soc/intel/bsw/me.bin" +CONFIG_BOARD_GOOGLE_ULTIMA=y +CONFIG_HAVE_IFD_BIN=y +# CONFIG_DRIVERS_UART_8250IO is not set +CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS=y +CONFIG_CPU_UCODE_BINARIES="3rdparty/blobs/soc/intel/bsw/cpu_microcode_blob.bin" +CONFIG_EC_GOOGLE_CHROMEEC_FIRMWARE_EXTERNAL=y +CONFIG_EC_GOOGLE_CHROMEEC_FIRMWARE_FILE="3rdparty/blobs/mainboard/google/cyan/ultima/ec.RW.flat" +CONFIG_HAVE_ME_BIN=y +CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION=y +CONFIG_NO_GFX_INIT=y +CONFIG_HAVE_FSP_BIN=y +CONFIG_FSP_FILE="3rdparty/blobs/mainboard/google/cyan/ultima/fsp.bin" +CONFIG_EDK2_GOP_DRIVER=y diff --git a/configs/bsw/config.wizpig.uefi b/configs/bsw/config.wizpig.uefi new file mode 100644 index 00000000000..f452a45e775 --- /dev/null +++ b/configs/bsw/config.wizpig.uefi @@ -0,0 +1,19 @@ +CONFIG_LOCALVERSION="MrChromebox-4.19" +CONFIG_VENDOR_GOOGLE=y +CONFIG_NO_POST=y +CONFIG_CBFS_SIZE=0x250000 +CONFIG_IFD_BIN_PATH="3rdparty/blobs/mainboard/google/cyan/wizpig/flashdescriptor.bin" +CONFIG_ME_BIN_PATH="3rdparty/blobs/soc/intel/bsw/me.bin" +CONFIG_BOARD_GOOGLE_WIZPIG=y +CONFIG_HAVE_IFD_BIN=y +# CONFIG_DRIVERS_UART_8250IO is not set +CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS=y +CONFIG_CPU_UCODE_BINARIES="3rdparty/blobs/soc/intel/bsw/cpu_microcode_blob.bin" +CONFIG_EC_GOOGLE_CHROMEEC_FIRMWARE_EXTERNAL=y +CONFIG_EC_GOOGLE_CHROMEEC_FIRMWARE_FILE="3rdparty/blobs/mainboard/google/cyan/wizpig/ec.RW.flat" +CONFIG_HAVE_ME_BIN=y +CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION=y +CONFIG_NO_GFX_INIT=y +CONFIG_HAVE_FSP_BIN=y +CONFIG_FSP_FILE="3rdparty/blobs/mainboard/google/cyan/wizpig/fsp.bin" +CONFIG_EDK2_GOP_DRIVER=y diff --git a/configs/byt/config.banjo.uefi b/configs/byt/config.banjo.uefi new file mode 100644 index 00000000000..c0f6fec307f --- /dev/null +++ b/configs/byt/config.banjo.uefi @@ -0,0 +1,20 @@ +CONFIG_LOCALVERSION="MrChromebox-4.19" +CONFIG_VENDOR_GOOGLE=y +CONFIG_NO_POST=y +CONFIG_CBFS_SIZE=0x250000 +CONFIG_IFD_BIN_PATH="3rdparty/blobs/soc/intel/byt/book/flashdescriptor.bin" +CONFIG_ME_BIN_PATH="3rdparty/blobs/soc/intel/byt/me.bin" +CONFIG_BOARD_GOOGLE_BANJO=y +CONFIG_HAVE_IFD_BIN=y +CONFIG_PCIEXP_L1_SUB_STATE=y +# CONFIG_DRIVERS_UART_8250IO is not set +CONFIG_HAVE_MRC=y +CONFIG_MRC_FILE="3rdparty/blobs/soc/intel/byt/mrc.elf" +CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS=y +CONFIG_CPU_UCODE_BINARIES="3rdparty/blobs/soc/intel/byt/cpu_microcode_blob.bin" +CONFIG_EC_GOOGLE_CHROMEEC_FIRMWARE_EXTERNAL=y +CONFIG_EC_GOOGLE_CHROMEEC_FIRMWARE_FILE="3rdparty/blobs/mainboard/google/rambi/banjo/ec.RW.flat" +CONFIG_HAVE_ME_BIN=y +CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION=y +CONFIG_NO_GFX_INIT=y +CONFIG_EDK2_GOP_DRIVER=y diff --git a/configs/byt/config.candy.uefi b/configs/byt/config.candy.uefi new file mode 100644 index 00000000000..aeb5d3001a5 --- /dev/null +++ b/configs/byt/config.candy.uefi @@ -0,0 +1,22 @@ +CONFIG_LOCALVERSION="MrChromebox-4.19" +CONFIG_VENDOR_GOOGLE=y +CONFIG_NO_POST=y +CONFIG_CBFS_SIZE=0x250000 +CONFIG_VGA_BIOS=y +CONFIG_IFD_BIN_PATH="3rdparty/blobs/soc/intel/byt/book/flashdescriptor.bin" +CONFIG_ME_BIN_PATH="3rdparty/blobs/soc/intel/byt/me.bin" +CONFIG_BOARD_GOOGLE_CANDY=y +CONFIG_VGA_BIOS_FILE="3rdparty/blobs/mainboard/google/rambi/candy/vgabios.bin" +CONFIG_HAVE_IFD_BIN=y +CONFIG_PCIEXP_L1_SUB_STATE=y +# CONFIG_DRIVERS_UART_8250IO is not set +CONFIG_HAVE_MRC=y +CONFIG_MRC_FILE="3rdparty/blobs/soc/intel/byt/mrc.elf" +CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS=y +CONFIG_CPU_UCODE_BINARIES="3rdparty/blobs/soc/intel/byt/cpu_microcode_blob.bin" +CONFIG_EC_GOOGLE_CHROMEEC_FIRMWARE_EXTERNAL=y +CONFIG_EC_GOOGLE_CHROMEEC_FIRMWARE_FILE="3rdparty/blobs/mainboard/google/rambi/candy/ec.RW.flat" +CONFIG_HAVE_ME_BIN=y +CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION=y +CONFIG_FRAMEBUFFER_SET_VESA_MODE=y +# CONFIG_INTEL_GMA_ADD_VBT is not set diff --git a/configs/byt/config.clapper.uefi b/configs/byt/config.clapper.uefi new file mode 100644 index 00000000000..f24fc95b3b8 --- /dev/null +++ b/configs/byt/config.clapper.uefi @@ -0,0 +1,22 @@ +CONFIG_LOCALVERSION="MrChromebox-4.19" +CONFIG_VENDOR_GOOGLE=y +CONFIG_NO_POST=y +CONFIG_CBFS_SIZE=0x250000 +CONFIG_VGA_BIOS=y +CONFIG_IFD_BIN_PATH="3rdparty/blobs/soc/intel/byt/book/flashdescriptor.bin" +CONFIG_ME_BIN_PATH="3rdparty/blobs/soc/intel/byt/me.bin" +CONFIG_BOARD_GOOGLE_CLAPPER=y +CONFIG_VGA_BIOS_FILE="3rdparty/blobs/mainboard/google/rambi/clapper/vgabios.bin" +CONFIG_HAVE_IFD_BIN=y +# CONFIG_DRIVERS_UART_8250IO is not set +# CONFIG_S3_VGA_ROM_RUN is not set +CONFIG_HAVE_MRC=y +CONFIG_MRC_FILE="3rdparty/blobs/soc/intel/byt/mrc.elf" +CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS=y +CONFIG_CPU_UCODE_BINARIES="3rdparty/blobs/soc/intel/byt/cpu_microcode_blob.bin" +CONFIG_EC_GOOGLE_CHROMEEC_FIRMWARE_EXTERNAL=y +CONFIG_EC_GOOGLE_CHROMEEC_FIRMWARE_FILE="3rdparty/blobs/mainboard/google/rambi/clapper/ec.RW.flat" +CONFIG_HAVE_ME_BIN=y +CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION=y +CONFIG_FRAMEBUFFER_SET_VESA_MODE=y +# CONFIG_INTEL_GMA_ADD_VBT is not set diff --git a/configs/byt/config.enguarde.uefi b/configs/byt/config.enguarde.uefi new file mode 100644 index 00000000000..c7274b94e71 --- /dev/null +++ b/configs/byt/config.enguarde.uefi @@ -0,0 +1,20 @@ +CONFIG_LOCALVERSION="MrChromebox-4.19" +CONFIG_VENDOR_GOOGLE=y +CONFIG_NO_POST=y +CONFIG_CBFS_SIZE=0x250000 +CONFIG_IFD_BIN_PATH="3rdparty/blobs/soc/intel/byt/book/flashdescriptor.bin" +CONFIG_ME_BIN_PATH="3rdparty/blobs/soc/intel/byt/me.bin" +CONFIG_BOARD_GOOGLE_ENGUARDE=y +CONFIG_HAVE_IFD_BIN=y +CONFIG_PCIEXP_L1_SUB_STATE=y +# CONFIG_DRIVERS_UART_8250IO is not set +CONFIG_HAVE_MRC=y +CONFIG_MRC_FILE="3rdparty/blobs/soc/intel/byt/mrc.elf" +CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS=y +CONFIG_CPU_UCODE_BINARIES="3rdparty/blobs/soc/intel/byt/cpu_microcode_blob.bin" +CONFIG_EC_GOOGLE_CHROMEEC_FIRMWARE_EXTERNAL=y +CONFIG_EC_GOOGLE_CHROMEEC_FIRMWARE_FILE="3rdparty/blobs/mainboard/google/rambi/enguarde/ec.RW.flat" +CONFIG_HAVE_ME_BIN=y +CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION=y +CONFIG_NO_GFX_INIT=y +CONFIG_EDK2_GOP_DRIVER=y diff --git a/configs/byt/config.glimmer.uefi b/configs/byt/config.glimmer.uefi new file mode 100644 index 00000000000..90ca522f695 --- /dev/null +++ b/configs/byt/config.glimmer.uefi @@ -0,0 +1,20 @@ +CONFIG_LOCALVERSION="MrChromebox-4.19" +CONFIG_VENDOR_GOOGLE=y +CONFIG_NO_POST=y +CONFIG_CBFS_SIZE=0x250000 +CONFIG_IFD_BIN_PATH="3rdparty/blobs/soc/intel/byt/book/flashdescriptor.bin" +CONFIG_ME_BIN_PATH="3rdparty/blobs/soc/intel/byt/me.bin" +CONFIG_BOARD_GOOGLE_GLIMMER=y +CONFIG_HAVE_IFD_BIN=y +CONFIG_PCIEXP_L1_SUB_STATE=y +# CONFIG_DRIVERS_UART_8250IO is not set +CONFIG_HAVE_MRC=y +CONFIG_MRC_FILE="3rdparty/blobs/soc/intel/byt/mrc.elf" +CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS=y +CONFIG_CPU_UCODE_BINARIES="3rdparty/blobs/soc/intel/byt/cpu_microcode_blob.bin" +CONFIG_EC_GOOGLE_CHROMEEC_FIRMWARE_EXTERNAL=y +CONFIG_EC_GOOGLE_CHROMEEC_FIRMWARE_FILE="3rdparty/blobs/mainboard/google/rambi/glimmer/ec.RW.flat" +CONFIG_HAVE_ME_BIN=y +CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION=y +CONFIG_NO_GFX_INIT=y +CONFIG_EDK2_GOP_DRIVER=y diff --git a/configs/byt/config.gnawty.uefi b/configs/byt/config.gnawty.uefi new file mode 100644 index 00000000000..fcb70005a77 --- /dev/null +++ b/configs/byt/config.gnawty.uefi @@ -0,0 +1,20 @@ +CONFIG_LOCALVERSION="MrChromebox-4.19" +CONFIG_VENDOR_GOOGLE=y +CONFIG_NO_POST=y +CONFIG_CBFS_SIZE=0x250000 +CONFIG_IFD_BIN_PATH="3rdparty/blobs/soc/intel/byt/book/flashdescriptor.bin" +CONFIG_ME_BIN_PATH="3rdparty/blobs/soc/intel/byt/me.bin" +CONFIG_BOARD_GOOGLE_GNAWTY=y +CONFIG_HAVE_IFD_BIN=y +CONFIG_PCIEXP_L1_SUB_STATE=y +# CONFIG_DRIVERS_UART_8250IO is not set +CONFIG_HAVE_MRC=y +CONFIG_MRC_FILE="3rdparty/blobs/soc/intel/byt/mrc.elf" +CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS=y +CONFIG_CPU_UCODE_BINARIES="3rdparty/blobs/soc/intel/byt/cpu_microcode_blob.bin" +CONFIG_EC_GOOGLE_CHROMEEC_FIRMWARE_EXTERNAL=y +CONFIG_EC_GOOGLE_CHROMEEC_FIRMWARE_FILE="3rdparty/blobs/mainboard/google/rambi/gnawty/ec.RW.flat" +CONFIG_HAVE_ME_BIN=y +CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION=y +CONFIG_NO_GFX_INIT=y +CONFIG_EDK2_GOP_DRIVER=y diff --git a/configs/byt/config.heli.uefi b/configs/byt/config.heli.uefi new file mode 100644 index 00000000000..4d762739642 --- /dev/null +++ b/configs/byt/config.heli.uefi @@ -0,0 +1,20 @@ +CONFIG_LOCALVERSION="MrChromebox-4.19" +CONFIG_VENDOR_GOOGLE=y +CONFIG_NO_POST=y +CONFIG_CBFS_SIZE=0x250000 +CONFIG_IFD_BIN_PATH="3rdparty/blobs/soc/intel/byt/book/flashdescriptor.bin" +CONFIG_ME_BIN_PATH="3rdparty/blobs/soc/intel/byt/me.bin" +CONFIG_BOARD_GOOGLE_HELI=y +CONFIG_HAVE_IFD_BIN=y +CONFIG_PCIEXP_L1_SUB_STATE=y +# CONFIG_DRIVERS_UART_8250IO is not set +CONFIG_HAVE_MRC=y +CONFIG_MRC_FILE="3rdparty/blobs/soc/intel/byt/mrc.elf" +CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS=y +CONFIG_CPU_UCODE_BINARIES="3rdparty/blobs/soc/intel/byt/cpu_microcode_blob.bin" +CONFIG_EC_GOOGLE_CHROMEEC_FIRMWARE_EXTERNAL=y +CONFIG_EC_GOOGLE_CHROMEEC_FIRMWARE_FILE="3rdparty/blobs/mainboard/google/rambi/heli/ec.RW.flat" +CONFIG_HAVE_ME_BIN=y +CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION=y +CONFIG_NO_GFX_INIT=y +CONFIG_EDK2_GOP_DRIVER=y diff --git a/configs/byt/config.kip.uefi b/configs/byt/config.kip.uefi new file mode 100644 index 00000000000..c24c9d1880c --- /dev/null +++ b/configs/byt/config.kip.uefi @@ -0,0 +1,20 @@ +CONFIG_LOCALVERSION="MrChromebox-4.19" +CONFIG_VENDOR_GOOGLE=y +CONFIG_NO_POST=y +CONFIG_CBFS_SIZE=0x250000 +CONFIG_IFD_BIN_PATH="3rdparty/blobs/soc/intel/byt/book/flashdescriptor.bin" +CONFIG_ME_BIN_PATH="3rdparty/blobs/soc/intel/byt/me.bin" +CONFIG_BOARD_GOOGLE_KIP=y +CONFIG_HAVE_IFD_BIN=y +CONFIG_PCIEXP_L1_SUB_STATE=y +# CONFIG_DRIVERS_UART_8250IO is not set +CONFIG_HAVE_MRC=y +CONFIG_MRC_FILE="3rdparty/blobs/soc/intel/byt/mrc.elf" +CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS=y +CONFIG_CPU_UCODE_BINARIES="3rdparty/blobs/soc/intel/byt/cpu_microcode_blob.bin" +CONFIG_EC_GOOGLE_CHROMEEC_FIRMWARE_EXTERNAL=y +CONFIG_EC_GOOGLE_CHROMEEC_FIRMWARE_FILE="3rdparty/blobs/mainboard/google/rambi/kip/ec.RW.flat" +CONFIG_HAVE_ME_BIN=y +CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION=y +CONFIG_NO_GFX_INIT=y +CONFIG_EDK2_GOP_DRIVER=y diff --git a/configs/byt/config.ninja.uefi b/configs/byt/config.ninja.uefi new file mode 100644 index 00000000000..e9e53445355 --- /dev/null +++ b/configs/byt/config.ninja.uefi @@ -0,0 +1,20 @@ +CONFIG_LOCALVERSION="MrChromebox-4.19" +CONFIG_VENDOR_GOOGLE=y +CONFIG_NO_POST=y +CONFIG_CBFS_SIZE=0x250000 +CONFIG_IFD_BIN_PATH="3rdparty/blobs/soc/intel/byt/box/flashdescriptor.bin" +CONFIG_ME_BIN_PATH="3rdparty/blobs/soc/intel/byt/me.bin" +CONFIG_BOARD_GOOGLE_NINJA=y +CONFIG_HAVE_IFD_BIN=y +CONFIG_PCIEXP_L1_SUB_STATE=y +# CONFIG_DRIVERS_UART_8250IO is not set +CONFIG_HAVE_MRC=y +CONFIG_MRC_FILE="3rdparty/blobs/soc/intel/byt/mrc.elf" +CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS=y +CONFIG_CPU_UCODE_BINARIES="3rdparty/blobs/soc/intel/byt/cpu_microcode_blob.bin" +CONFIG_EC_GOOGLE_CHROMEEC_FIRMWARE_EXTERNAL=y +CONFIG_EC_GOOGLE_CHROMEEC_FIRMWARE_FILE="3rdparty/blobs/mainboard/google/rambi/ninja/ec.RW.flat" +CONFIG_HAVE_ME_BIN=y +CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION=y +CONFIG_NO_GFX_INIT=y +CONFIG_EDK2_GOP_DRIVER=y diff --git a/configs/byt/config.orco.uefi b/configs/byt/config.orco.uefi new file mode 100644 index 00000000000..2f66d311187 --- /dev/null +++ b/configs/byt/config.orco.uefi @@ -0,0 +1,20 @@ +CONFIG_LOCALVERSION="MrChromebox-4.19" +CONFIG_VENDOR_GOOGLE=y +CONFIG_NO_POST=y +CONFIG_CBFS_SIZE=0x250000 +CONFIG_IFD_BIN_PATH="3rdparty/blobs/soc/intel/byt/book/flashdescriptor.bin" +CONFIG_ME_BIN_PATH="3rdparty/blobs/soc/intel/byt/me.bin" +CONFIG_BOARD_GOOGLE_ORCO=y +CONFIG_HAVE_IFD_BIN=y +CONFIG_PCIEXP_L1_SUB_STATE=y +# CONFIG_DRIVERS_UART_8250IO is not set +CONFIG_HAVE_MRC=y +CONFIG_MRC_FILE="3rdparty/blobs/soc/intel/byt/mrc.elf" +CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS=y +CONFIG_CPU_UCODE_BINARIES="3rdparty/blobs/soc/intel/byt/cpu_microcode_blob.bin" +CONFIG_EC_GOOGLE_CHROMEEC_FIRMWARE_EXTERNAL=y +CONFIG_EC_GOOGLE_CHROMEEC_FIRMWARE_FILE="3rdparty/blobs/mainboard/google/rambi/orco/ec.RW.flat" +CONFIG_HAVE_ME_BIN=y +CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION=y +CONFIG_NO_GFX_INIT=y +CONFIG_EDK2_GOP_DRIVER=y diff --git a/configs/byt/config.quawks.uefi b/configs/byt/config.quawks.uefi new file mode 100644 index 00000000000..a30d8dccea6 --- /dev/null +++ b/configs/byt/config.quawks.uefi @@ -0,0 +1,20 @@ +CONFIG_LOCALVERSION="MrChromebox-4.19" +CONFIG_VENDOR_GOOGLE=y +CONFIG_NO_POST=y +CONFIG_CBFS_SIZE=0x250000 +CONFIG_IFD_BIN_PATH="3rdparty/blobs/soc/intel/byt/book/flashdescriptor.bin" +CONFIG_ME_BIN_PATH="3rdparty/blobs/soc/intel/byt/me.bin" +CONFIG_BOARD_GOOGLE_QUAWKS=y +CONFIG_HAVE_IFD_BIN=y +CONFIG_PCIEXP_L1_SUB_STATE=y +# CONFIG_DRIVERS_UART_8250IO is not set +CONFIG_HAVE_MRC=y +CONFIG_MRC_FILE="3rdparty/blobs/soc/intel/byt/mrc.elf" +CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS=y +CONFIG_CPU_UCODE_BINARIES="3rdparty/blobs/soc/intel/byt/cpu_microcode_blob.bin" +CONFIG_EC_GOOGLE_CHROMEEC_FIRMWARE_EXTERNAL=y +CONFIG_EC_GOOGLE_CHROMEEC_FIRMWARE_FILE="3rdparty/blobs/mainboard/google/rambi/quawks/ec.RW.flat" +CONFIG_HAVE_ME_BIN=y +CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION=y +CONFIG_NO_GFX_INIT=y +CONFIG_EDK2_GOP_DRIVER=y diff --git a/configs/byt/config.squawks.uefi b/configs/byt/config.squawks.uefi new file mode 100644 index 00000000000..993f2829022 --- /dev/null +++ b/configs/byt/config.squawks.uefi @@ -0,0 +1,20 @@ +CONFIG_LOCALVERSION="MrChromebox-4.19" +CONFIG_VENDOR_GOOGLE=y +CONFIG_NO_POST=y +CONFIG_CBFS_SIZE=0x250000 +CONFIG_IFD_BIN_PATH="3rdparty/blobs/soc/intel/byt/book/flashdescriptor.bin" +CONFIG_ME_BIN_PATH="3rdparty/blobs/soc/intel/byt/me.bin" +CONFIG_BOARD_GOOGLE_SQUAWKS=y +CONFIG_HAVE_IFD_BIN=y +CONFIG_PCIEXP_L1_SUB_STATE=y +# CONFIG_DRIVERS_UART_8250IO is not set +CONFIG_HAVE_MRC=y +CONFIG_MRC_FILE="3rdparty/blobs/soc/intel/byt/mrc.elf" +CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS=y +CONFIG_CPU_UCODE_BINARIES="3rdparty/blobs/soc/intel/byt/cpu_microcode_blob.bin" +CONFIG_EC_GOOGLE_CHROMEEC_FIRMWARE_EXTERNAL=y +CONFIG_EC_GOOGLE_CHROMEEC_FIRMWARE_FILE="3rdparty/blobs/mainboard/google/rambi/squawks/ec.RW.flat" +CONFIG_HAVE_ME_BIN=y +CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION=y +CONFIG_NO_GFX_INIT=y +CONFIG_EDK2_GOP_DRIVER=y diff --git a/configs/byt/config.sumo.uefi b/configs/byt/config.sumo.uefi new file mode 100644 index 00000000000..46769501744 --- /dev/null +++ b/configs/byt/config.sumo.uefi @@ -0,0 +1,20 @@ +CONFIG_LOCALVERSION="MrChromebox-4.19" +CONFIG_VENDOR_GOOGLE=y +CONFIG_NO_POST=y +CONFIG_CBFS_SIZE=0x250000 +CONFIG_IFD_BIN_PATH="3rdparty/blobs/soc/intel/byt/book/flashdescriptor.bin" +CONFIG_ME_BIN_PATH="3rdparty/blobs/soc/intel/byt/me.bin" +CONFIG_BOARD_GOOGLE_SUMO=y +CONFIG_HAVE_IFD_BIN=y +CONFIG_PCIEXP_L1_SUB_STATE=y +# CONFIG_DRIVERS_UART_8250IO is not set +CONFIG_HAVE_MRC=y +CONFIG_MRC_FILE="3rdparty/blobs/soc/intel/byt/mrc.elf" +CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS=y +CONFIG_CPU_UCODE_BINARIES="3rdparty/blobs/soc/intel/byt/cpu_microcode_blob.bin" +CONFIG_EC_GOOGLE_CHROMEEC_FIRMWARE_EXTERNAL=y +CONFIG_EC_GOOGLE_CHROMEEC_FIRMWARE_FILE="3rdparty/blobs/mainboard/google/rambi/sumo/ec.RW.flat" +CONFIG_HAVE_ME_BIN=y +CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION=y +CONFIG_NO_GFX_INIT=y +CONFIG_EDK2_GOP_DRIVER=y diff --git a/configs/byt/config.swanky.uefi b/configs/byt/config.swanky.uefi new file mode 100644 index 00000000000..8cf65c55ac6 --- /dev/null +++ b/configs/byt/config.swanky.uefi @@ -0,0 +1,20 @@ +CONFIG_LOCALVERSION="MrChromebox-4.19" +CONFIG_VENDOR_GOOGLE=y +CONFIG_NO_POST=y +CONFIG_CBFS_SIZE=0x250000 +CONFIG_IFD_BIN_PATH="3rdparty/blobs/soc/intel/byt/book/flashdescriptor.bin" +CONFIG_ME_BIN_PATH="3rdparty/blobs/soc/intel/byt/me.bin" +CONFIG_BOARD_GOOGLE_SWANKY=y +CONFIG_HAVE_IFD_BIN=y +CONFIG_PCIEXP_L1_SUB_STATE=y +# CONFIG_DRIVERS_UART_8250IO is not set +CONFIG_HAVE_MRC=y +CONFIG_MRC_FILE="3rdparty/blobs/soc/intel/byt/mrc.elf" +CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS=y +CONFIG_CPU_UCODE_BINARIES="3rdparty/blobs/soc/intel/byt/cpu_microcode_blob.bin" +CONFIG_EC_GOOGLE_CHROMEEC_FIRMWARE_EXTERNAL=y +CONFIG_EC_GOOGLE_CHROMEEC_FIRMWARE_FILE="3rdparty/blobs/mainboard/google/rambi/swanky/ec.RW.flat" +CONFIG_HAVE_ME_BIN=y +CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION=y +CONFIG_NO_GFX_INIT=y +CONFIG_EDK2_GOP_DRIVER=y diff --git a/configs/byt/config.winky.uefi b/configs/byt/config.winky.uefi new file mode 100644 index 00000000000..4e1f97ef882 --- /dev/null +++ b/configs/byt/config.winky.uefi @@ -0,0 +1,20 @@ +CONFIG_LOCALVERSION="MrChromebox-4.19" +CONFIG_VENDOR_GOOGLE=y +CONFIG_NO_POST=y +CONFIG_CBFS_SIZE=0x250000 +CONFIG_IFD_BIN_PATH="3rdparty/blobs/soc/intel/byt/book/flashdescriptor.bin" +CONFIG_ME_BIN_PATH="3rdparty/blobs/soc/intel/byt/me.bin" +CONFIG_BOARD_GOOGLE_WINKY=y +CONFIG_HAVE_IFD_BIN=y +CONFIG_PCIEXP_L1_SUB_STATE=y +# CONFIG_DRIVERS_UART_8250IO is not set +CONFIG_HAVE_MRC=y +CONFIG_MRC_FILE="3rdparty/blobs/soc/intel/byt/mrc.elf" +CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS=y +CONFIG_CPU_UCODE_BINARIES="3rdparty/blobs/soc/intel/byt/cpu_microcode_blob.bin" +CONFIG_EC_GOOGLE_CHROMEEC_FIRMWARE_EXTERNAL=y +CONFIG_EC_GOOGLE_CHROMEEC_FIRMWARE_FILE="3rdparty/blobs/mainboard/google/rambi/winky/ec.RW.flat" +CONFIG_HAVE_ME_BIN=y +CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION=y +CONFIG_NO_GFX_INIT=y +CONFIG_EDK2_GOP_DRIVER=y diff --git a/configs/cml/config.akemi.uefi b/configs/cml/config.akemi.uefi new file mode 100644 index 00000000000..041482c5c64 --- /dev/null +++ b/configs/cml/config.akemi.uefi @@ -0,0 +1,15 @@ +CONFIG_LOCALVERSION="MrChromebox-4.19" +CONFIG_VENDOR_GOOGLE=y +CONFIG_NO_POST=y +CONFIG_CBFS_SIZE=0x450000 +# CONFIG_CONSOLE_SERIAL is not set +CONFIG_IFD_BIN_PATH="3rdparty/blobs/mainboard/google/hatch/akemi/flashdescriptor.bin" +CONFIG_ME_BIN_PATH="3rdparty/blobs/mainboard/google/hatch/akemi/me.bin" +CONFIG_BOARD_GOOGLE_AKEMI=y +CONFIG_HAVE_IFD_BIN=y +CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS=y +CONFIG_CPU_UCODE_BINARIES="3rdparty/blobs/soc/intel/cml/cpu_microcode_blob.bin" +CONFIG_EC_GOOGLE_CHROMEEC_FIRMWARE_EXTERNAL=y +CONFIG_EC_GOOGLE_CHROMEEC_FIRMWARE_FILE="3rdparty/blobs/mainboard/google/hatch/akemi/ec.RW.flat" +CONFIG_HAVE_ME_BIN=y +CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION=y diff --git a/configs/cml/config.dooly.uefi b/configs/cml/config.dooly.uefi new file mode 100644 index 00000000000..1a91b13b40a --- /dev/null +++ b/configs/cml/config.dooly.uefi @@ -0,0 +1,17 @@ +CONFIG_LOCALVERSION="MrChromebox-4.19" +CONFIG_VENDOR_GOOGLE=y +CONFIG_NO_POST=y +CONFIG_CBFS_SIZE=0x450000 +# CONFIG_CONSOLE_SERIAL is not set +CONFIG_IFD_BIN_PATH="3rdparty/blobs/mainboard/google/hatch/dooly/flashdescriptor.bin" +CONFIG_ME_BIN_PATH="3rdparty/blobs/mainboard/google/hatch/puff_legacy/me.bin" +CONFIG_BOARD_GOOGLE_DOOLY=y +CONFIG_EDK2_BOOT_TIMEOUT=5 +CONFIG_HAVE_IFD_BIN=y +CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS=y +CONFIG_CPU_UCODE_BINARIES="3rdparty/blobs/soc/intel/cml/cpu_microcode_blob.bin" +CONFIG_EC_GOOGLE_CHROMEEC_FIRMWARE_EXTERNAL=y +CONFIG_EC_GOOGLE_CHROMEEC_FIRMWARE_FILE="3rdparty/blobs/mainboard/google/hatch/puff/ec.RW.flat" +CONFIG_HAVE_ME_BIN=y +CONFIG_NO_GFX_INIT=y +CONFIG_EDK2_GOP_DRIVER=y diff --git a/configs/cml/config.dragonair.uefi b/configs/cml/config.dragonair.uefi new file mode 100644 index 00000000000..6f4652bfd48 --- /dev/null +++ b/configs/cml/config.dragonair.uefi @@ -0,0 +1,17 @@ +CONFIG_LOCALVERSION="MrChromebox-4.19" +CONFIG_VENDOR_GOOGLE=y +CONFIG_NO_POST=y +CONFIG_CBFS_SIZE=0x450000 +# CONFIG_CONSOLE_SERIAL is not set +CONFIG_IFD_BIN_PATH="3rdparty/blobs/mainboard/google/hatch/dratini/flashdescriptor.bin" +CONFIG_ME_BIN_PATH="3rdparty/blobs/mainboard/google/hatch/dratini/me.bin" +CONFIG_BOARD_GOOGLE_DRATINI=y +CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="Dragonair" +CONFIG_HAVE_IFD_BIN=y +CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS=y +CONFIG_CPU_UCODE_BINARIES="3rdparty/blobs/soc/intel/cml/cpu_microcode_blob.bin" +CONFIG_EC_GOOGLE_CHROMEEC_FIRMWARE_EXTERNAL=y +CONFIG_EC_GOOGLE_CHROMEEC_FIRMWARE_FILE="3rdparty/blobs/mainboard/google/hatch/dratini/ec.RW.flat" +CONFIG_HAVE_ME_BIN=y +CONFIG_NO_GFX_INIT=y +CONFIG_EDK2_GOP_DRIVER=y diff --git a/configs/cml/config.drallion.uefi b/configs/cml/config.drallion.uefi new file mode 100644 index 00000000000..69fed192bbc --- /dev/null +++ b/configs/cml/config.drallion.uefi @@ -0,0 +1,18 @@ +CONFIG_LOCALVERSION="MrChromebox-4.19" +CONFIG_VENDOR_GOOGLE=y +CONFIG_NO_POST=y +# CONFIG_CONSOLE_SERIAL is not set +CONFIG_INTEL_GMA_VBT_FILE="3rdparty/blobs/mainboard/google/drallion/vbt.bin" +CONFIG_IFD_BIN_PATH="3rdparty/blobs/mainboard/google/drallion/flashdescriptor.bin" +CONFIG_ME_BIN_PATH="3rdparty/blobs/mainboard/google/drallion/me.bin" +CONFIG_BOARD_GOOGLE_DRALLION=y +CONFIG_HAVE_IFD_BIN=y +CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS=y +CONFIG_CPU_UCODE_BINARIES="3rdparty/blobs/mainboard/google/drallion/cpu_microcode_blob.bin" +CONFIG_HAVE_ME_BIN=y +CONFIG_HAVE_EC_BIN=y +CONFIG_EC_BIN_PATH="3rdparty/blobs/mainboard/google/drallion/ec.bin" +CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION=y +CONFIG_RUN_FSP_GOP=y +CONFIG_SUBSYSTEM_VENDOR_ID=0x1028 +CONFIG_DRIVERS_PS2_KEYBOARD=y diff --git a/configs/cml/config.dratini.uefi b/configs/cml/config.dratini.uefi new file mode 100644 index 00000000000..959da24d68f --- /dev/null +++ b/configs/cml/config.dratini.uefi @@ -0,0 +1,16 @@ +CONFIG_LOCALVERSION="MrChromebox-4.19" +CONFIG_VENDOR_GOOGLE=y +CONFIG_NO_POST=y +CONFIG_CBFS_SIZE=0x450000 +# CONFIG_CONSOLE_SERIAL is not set +CONFIG_IFD_BIN_PATH="3rdparty/blobs/mainboard/google/hatch/dratini/flashdescriptor.bin" +CONFIG_ME_BIN_PATH="3rdparty/blobs/mainboard/google/hatch/dratini/me.bin" +CONFIG_BOARD_GOOGLE_DRATINI=y +CONFIG_HAVE_IFD_BIN=y +CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS=y +CONFIG_CPU_UCODE_BINARIES="3rdparty/blobs/soc/intel/cml/cpu_microcode_blob.bin" +CONFIG_EC_GOOGLE_CHROMEEC_FIRMWARE_EXTERNAL=y +CONFIG_EC_GOOGLE_CHROMEEC_FIRMWARE_FILE="3rdparty/blobs/mainboard/google/hatch/dratini/ec.RW.flat" +CONFIG_HAVE_ME_BIN=y +CONFIG_NO_GFX_INIT=y +CONFIG_EDK2_GOP_DRIVER=y diff --git a/configs/cml/config.duffy.uefi b/configs/cml/config.duffy.uefi new file mode 100644 index 00000000000..1678af93087 --- /dev/null +++ b/configs/cml/config.duffy.uefi @@ -0,0 +1,17 @@ +CONFIG_LOCALVERSION="MrChromebox-4.19" +CONFIG_VENDOR_GOOGLE=y +CONFIG_NO_POST=y +CONFIG_CBFS_SIZE=0x450000 +# CONFIG_CONSOLE_SERIAL is not set +CONFIG_IFD_BIN_PATH="3rdparty/blobs/mainboard/google/hatch/puff/flashdescriptor.bin" +CONFIG_ME_BIN_PATH="3rdparty/blobs/mainboard/google/hatch/puff/me.bin" +CONFIG_BOARD_GOOGLE_DUFFY=y +CONFIG_EDK2_BOOT_TIMEOUT=5 +CONFIG_HAVE_IFD_BIN=y +CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS=y +CONFIG_CPU_UCODE_BINARIES="3rdparty/blobs/soc/intel/cml/cpu_microcode_blob.bin" +CONFIG_EC_GOOGLE_CHROMEEC_FIRMWARE_EXTERNAL=y +CONFIG_EC_GOOGLE_CHROMEEC_FIRMWARE_FILE="3rdparty/blobs/mainboard/google/hatch/puff/ec.RW.flat" +CONFIG_HAVE_ME_BIN=y +CONFIG_NO_GFX_INIT=y +CONFIG_EDK2_GOP_DRIVER=y diff --git a/configs/cml/config.faffy.uefi b/configs/cml/config.faffy.uefi new file mode 100644 index 00000000000..c87a930e68e --- /dev/null +++ b/configs/cml/config.faffy.uefi @@ -0,0 +1,17 @@ +CONFIG_LOCALVERSION="MrChromebox-4.19" +CONFIG_VENDOR_GOOGLE=y +CONFIG_NO_POST=y +CONFIG_CBFS_SIZE=0x450000 +# CONFIG_CONSOLE_SERIAL is not set +CONFIG_IFD_BIN_PATH="3rdparty/blobs/mainboard/google/hatch/puff/flashdescriptor.bin" +CONFIG_ME_BIN_PATH="3rdparty/blobs/mainboard/google/hatch/puff/me.bin" +CONFIG_BOARD_GOOGLE_FAFFY=y +CONFIG_EDK2_BOOT_TIMEOUT=5 +CONFIG_HAVE_IFD_BIN=y +CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS=y +CONFIG_CPU_UCODE_BINARIES="3rdparty/blobs/soc/intel/cml/cpu_microcode_blob.bin" +CONFIG_EC_GOOGLE_CHROMEEC_FIRMWARE_EXTERNAL=y +CONFIG_EC_GOOGLE_CHROMEEC_FIRMWARE_FILE="3rdparty/blobs/mainboard/google/hatch/puff/ec.RW.flat" +CONFIG_HAVE_ME_BIN=y +CONFIG_NO_GFX_INIT=y +CONFIG_EDK2_GOP_DRIVER=y diff --git a/configs/cml/config.helios.uefi b/configs/cml/config.helios.uefi new file mode 100644 index 00000000000..6a50279c98a --- /dev/null +++ b/configs/cml/config.helios.uefi @@ -0,0 +1,16 @@ +CONFIG_LOCALVERSION="MrChromebox-4.19" +CONFIG_VENDOR_GOOGLE=y +CONFIG_NO_POST=y +CONFIG_CBFS_SIZE=0x450000 +# CONFIG_CONSOLE_SERIAL is not set +CONFIG_IFD_BIN_PATH="3rdparty/blobs/mainboard/google/hatch/helios/flashdescriptor.bin" +CONFIG_ME_BIN_PATH="3rdparty/blobs/mainboard/google/hatch/helios/me.bin" +CONFIG_BOARD_GOOGLE_HELIOS=y +CONFIG_HAVE_IFD_BIN=y +CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS=y +CONFIG_CPU_UCODE_BINARIES="3rdparty/blobs/soc/intel/cml/cpu_microcode_blob.bin" +CONFIG_EC_GOOGLE_CHROMEEC_FIRMWARE_EXTERNAL=y +CONFIG_EC_GOOGLE_CHROMEEC_FIRMWARE_FILE="3rdparty/blobs/mainboard/google/hatch/helios/ec.RW.flat" +CONFIG_HAVE_ME_BIN=y +CONFIG_NO_GFX_INIT=y +CONFIG_EDK2_GOP_DRIVER=y diff --git a/configs/cml/config.jinlon.uefi b/configs/cml/config.jinlon.uefi new file mode 100644 index 00000000000..2d3ccedc906 --- /dev/null +++ b/configs/cml/config.jinlon.uefi @@ -0,0 +1,16 @@ +CONFIG_LOCALVERSION="MrChromebox-4.19" +CONFIG_VENDOR_GOOGLE=y +CONFIG_NO_POST=y +CONFIG_CBFS_SIZE=0x450000 +# CONFIG_CONSOLE_SERIAL is not set +CONFIG_IFD_BIN_PATH="3rdparty/blobs/mainboard/google/hatch/jinlon/flashdescriptor.bin" +CONFIG_ME_BIN_PATH="3rdparty/blobs/mainboard/google/hatch/jinlon/me.bin" +CONFIG_BOARD_GOOGLE_JINLON=y +CONFIG_HAVE_IFD_BIN=y +CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS=y +CONFIG_CPU_UCODE_BINARIES="3rdparty/blobs/soc/intel/cml/cpu_microcode_blob.bin" +CONFIG_EC_GOOGLE_CHROMEEC_FIRMWARE_EXTERNAL=y +CONFIG_EC_GOOGLE_CHROMEEC_FIRMWARE_FILE="3rdparty/blobs/mainboard/google/hatch/jinlon/ec.RW.flat" +CONFIG_HAVE_ME_BIN=y +CONFIG_NO_GFX_INIT=y +CONFIG_EDK2_GOP_DRIVER=y diff --git a/configs/cml/config.kaisa.uefi b/configs/cml/config.kaisa.uefi new file mode 100644 index 00000000000..49566702a80 --- /dev/null +++ b/configs/cml/config.kaisa.uefi @@ -0,0 +1,17 @@ +CONFIG_LOCALVERSION="MrChromebox-4.19" +CONFIG_VENDOR_GOOGLE=y +CONFIG_NO_POST=y +CONFIG_CBFS_SIZE=0x450000 +# CONFIG_CONSOLE_SERIAL is not set +CONFIG_IFD_BIN_PATH="3rdparty/blobs/mainboard/google/hatch/puff/flashdescriptor.bin" +CONFIG_ME_BIN_PATH="3rdparty/blobs/mainboard/google/hatch/puff/me.bin" +CONFIG_BOARD_GOOGLE_KAISA=y +CONFIG_EDK2_BOOT_TIMEOUT=5 +CONFIG_HAVE_IFD_BIN=y +CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS=y +CONFIG_CPU_UCODE_BINARIES="3rdparty/blobs/soc/intel/cml/cpu_microcode_blob.bin" +CONFIG_EC_GOOGLE_CHROMEEC_FIRMWARE_EXTERNAL=y +CONFIG_EC_GOOGLE_CHROMEEC_FIRMWARE_FILE="3rdparty/blobs/mainboard/google/hatch/puff/ec.RW.flat" +CONFIG_HAVE_ME_BIN=y +CONFIG_NO_GFX_INIT=y +CONFIG_EDK2_GOP_DRIVER=y diff --git a/configs/cml/config.kindred.uefi b/configs/cml/config.kindred.uefi new file mode 100644 index 00000000000..3a22ebf2028 --- /dev/null +++ b/configs/cml/config.kindred.uefi @@ -0,0 +1,16 @@ +CONFIG_LOCALVERSION="MrChromebox-4.19" +CONFIG_VENDOR_GOOGLE=y +CONFIG_NO_POST=y +CONFIG_CBFS_SIZE=0x450000 +# CONFIG_CONSOLE_SERIAL is not set +CONFIG_IFD_BIN_PATH="3rdparty/blobs/mainboard/google/hatch/kindred/flashdescriptor.bin" +CONFIG_ME_BIN_PATH="3rdparty/blobs/mainboard/google/hatch/kindred/me.bin" +CONFIG_BOARD_GOOGLE_KINDRED=y +CONFIG_HAVE_IFD_BIN=y +CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS=y +CONFIG_CPU_UCODE_BINARIES="3rdparty/blobs/soc/intel/cml/cpu_microcode_blob.bin" +CONFIG_EC_GOOGLE_CHROMEEC_FIRMWARE_EXTERNAL=y +CONFIG_EC_GOOGLE_CHROMEEC_FIRMWARE_FILE="3rdparty/blobs/mainboard/google/hatch/kindred/ec.RW.flat" +CONFIG_HAVE_ME_BIN=y +CONFIG_NO_GFX_INIT=y +CONFIG_EDK2_GOP_DRIVER=y diff --git a/configs/cml/config.kled.uefi b/configs/cml/config.kled.uefi new file mode 100644 index 00000000000..7f6cf7b055c --- /dev/null +++ b/configs/cml/config.kled.uefi @@ -0,0 +1,17 @@ +CONFIG_LOCALVERSION="MrChromebox-4.19" +CONFIG_VENDOR_GOOGLE=y +CONFIG_NO_POST=y +CONFIG_CBFS_SIZE=0x450000 +# CONFIG_CONSOLE_SERIAL is not set +CONFIG_IFD_BIN_PATH="3rdparty/blobs/mainboard/google/hatch/kindred/flashdescriptor.bin" +CONFIG_ME_BIN_PATH="3rdparty/blobs/mainboard/google/hatch/kindred/me.bin" +CONFIG_BOARD_GOOGLE_KINDRED=y +CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="Kled" +CONFIG_HAVE_IFD_BIN=y +CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS=y +CONFIG_CPU_UCODE_BINARIES="3rdparty/blobs/soc/intel/cml/cpu_microcode_blob.bin" +CONFIG_EC_GOOGLE_CHROMEEC_FIRMWARE_EXTERNAL=y +CONFIG_EC_GOOGLE_CHROMEEC_FIRMWARE_FILE="3rdparty/blobs/mainboard/google/hatch/kindred/ec.RW.flat" +CONFIG_HAVE_ME_BIN=y +CONFIG_NO_GFX_INIT=y +CONFIG_EDK2_GOP_DRIVER=y diff --git a/configs/cml/config.kohaku.uefi b/configs/cml/config.kohaku.uefi new file mode 100644 index 00000000000..3f51d0435f1 --- /dev/null +++ b/configs/cml/config.kohaku.uefi @@ -0,0 +1,14 @@ +CONFIG_LOCALVERSION="MrChromebox-4.19" +CONFIG_VENDOR_GOOGLE=y +CONFIG_NO_POST=y +CONFIG_CBFS_SIZE=0x450000 +# CONFIG_CONSOLE_SERIAL is not set +CONFIG_IFD_BIN_PATH="3rdparty/blobs/mainboard/google/hatch/kohaku/flashdescriptor.bin" +CONFIG_ME_BIN_PATH="3rdparty/blobs/mainboard/google/hatch/kohaku/me.bin" +CONFIG_BOARD_GOOGLE_KOHAKU=y +CONFIG_HAVE_IFD_BIN=y +CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS=y +CONFIG_CPU_UCODE_BINARIES="3rdparty/blobs/soc/intel/cml/cpu_microcode_blob.bin" +CONFIG_EC_GOOGLE_CHROMEEC_FIRMWARE_EXTERNAL=y +CONFIG_EC_GOOGLE_CHROMEEC_FIRMWARE_FILE="3rdparty/blobs/mainboard/google/hatch/kohaku/ec.RW.flat" +CONFIG_HAVE_ME_BIN=y diff --git a/configs/cml/config.librem_14.uefi b/configs/cml/config.librem_14.uefi new file mode 100644 index 00000000000..dfd6eb91e27 --- /dev/null +++ b/configs/cml/config.librem_14.uefi @@ -0,0 +1,12 @@ +CONFIG_LOCALVERSION="MrChromebox-4.19" +CONFIG_VENDOR_PURISM=y +CONFIG_CBFS_SIZE=0x900000 +CONFIG_IFD_BIN_PATH="3rdparty/purism-blobs/mainboard/purism/librem_cnl/librem_14/flashdescriptor.bin" +CONFIG_ME_BIN_PATH="3rdparty/purism-blobs/mainboard/purism/librem_cnl/librem_14/me.bin" +CONFIG_HAVE_IFD_BIN=y +CONFIG_BOARD_PURISM_LIBREM_14=y +CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS=y +CONFIG_CPU_UCODE_BINARIES="3rdparty/purism-blobs/mainboard/purism/librem_cnl/cpu_microcode_blob.bin" +CONFIG_HAVE_ME_BIN=y +CONFIG_NO_GFX_INIT=y +CONFIG_EDK2_GOP_DRIVER=y diff --git a/configs/cml/config.librem_mini_v2.uefi b/configs/cml/config.librem_mini_v2.uefi new file mode 100644 index 00000000000..bf57a331241 --- /dev/null +++ b/configs/cml/config.librem_mini_v2.uefi @@ -0,0 +1,12 @@ +CONFIG_LOCALVERSION="MrChromebox-4.19" +CONFIG_VENDOR_PURISM=y +CONFIG_CBFS_SIZE=0xA00000 +CONFIG_IFD_BIN_PATH="3rdparty/purism-blobs/mainboard/purism/librem_cnl/mini_v2/flashdescriptor.bin" +CONFIG_ME_BIN_PATH="3rdparty/purism-blobs/mainboard/purism/librem_cnl/mini_v2/me.bin" +CONFIG_HAVE_IFD_BIN=y +CONFIG_BOARD_PURISM_LIBREM_MINI_V2=y +CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS=y +CONFIG_CPU_UCODE_BINARIES="3rdparty/purism-blobs/mainboard/purism/librem_cnl/cpu_microcode_blob.bin" +CONFIG_HAVE_ME_BIN=y +CONFIG_NO_GFX_INIT=y +CONFIG_EDK2_GOP_DRIVER=y diff --git a/configs/cml/config.nightfury.uefi b/configs/cml/config.nightfury.uefi new file mode 100644 index 00000000000..d59eb3b42bf --- /dev/null +++ b/configs/cml/config.nightfury.uefi @@ -0,0 +1,14 @@ +CONFIG_LOCALVERSION="MrChromebox-4.19" +CONFIG_VENDOR_GOOGLE=y +CONFIG_NO_POST=y +CONFIG_CBFS_SIZE=0x450000 +# CONFIG_CONSOLE_SERIAL is not set +CONFIG_IFD_BIN_PATH="3rdparty/blobs/mainboard/google/hatch/nightfury/flashdescriptor.bin" +CONFIG_ME_BIN_PATH="3rdparty/blobs/mainboard/google/hatch/nightfury/me.bin" +CONFIG_BOARD_GOOGLE_NIGHTFURY=y +CONFIG_HAVE_IFD_BIN=y +CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS=y +CONFIG_CPU_UCODE_BINARIES="3rdparty/blobs/soc/intel/cml/cpu_microcode_blob.bin" +CONFIG_EC_GOOGLE_CHROMEEC_FIRMWARE_EXTERNAL=y +CONFIG_EC_GOOGLE_CHROMEEC_FIRMWARE_FILE="3rdparty/blobs/mainboard/google/hatch/nightfury/ec.RW.flat" +CONFIG_HAVE_ME_BIN=y diff --git a/configs/cml/config.noibat.uefi b/configs/cml/config.noibat.uefi new file mode 100644 index 00000000000..38957b76107 --- /dev/null +++ b/configs/cml/config.noibat.uefi @@ -0,0 +1,17 @@ +CONFIG_LOCALVERSION="MrChromebox-4.19" +CONFIG_VENDOR_GOOGLE=y +CONFIG_NO_POST=y +CONFIG_CBFS_SIZE=0x450000 +# CONFIG_CONSOLE_SERIAL is not set +CONFIG_IFD_BIN_PATH="3rdparty/blobs/mainboard/google/hatch/noibat/flashdescriptor.bin" +CONFIG_ME_BIN_PATH="3rdparty/blobs/mainboard/google/hatch/puff/me.bin" +CONFIG_BOARD_GOOGLE_NOIBAT=y +CONFIG_EDK2_BOOT_TIMEOUT=5 +CONFIG_HAVE_IFD_BIN=y +CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS=y +CONFIG_CPU_UCODE_BINARIES="3rdparty/blobs/soc/intel/cml/cpu_microcode_blob.bin" +CONFIG_EC_GOOGLE_CHROMEEC_FIRMWARE_EXTERNAL=y +CONFIG_EC_GOOGLE_CHROMEEC_FIRMWARE_FILE="3rdparty/blobs/mainboard/google/hatch/puff/ec.RW.flat" +CONFIG_HAVE_ME_BIN=y +CONFIG_NO_GFX_INIT=y +CONFIG_EDK2_GOP_DRIVER=y diff --git a/configs/cml/config.wyvern.uefi b/configs/cml/config.wyvern.uefi new file mode 100644 index 00000000000..3d798d41850 --- /dev/null +++ b/configs/cml/config.wyvern.uefi @@ -0,0 +1,17 @@ +CONFIG_LOCALVERSION="MrChromebox-4.19" +CONFIG_VENDOR_GOOGLE=y +CONFIG_NO_POST=y +CONFIG_CBFS_SIZE=0x450000 +# CONFIG_CONSOLE_SERIAL is not set +CONFIG_IFD_BIN_PATH="3rdparty/blobs/mainboard/google/hatch/wyvern/flashdescriptor.bin" +CONFIG_ME_BIN_PATH="3rdparty/blobs/mainboard/google/hatch/puff/me.bin" +CONFIG_BOARD_GOOGLE_WYVERN=y +CONFIG_EDK2_BOOT_TIMEOUT=5 +CONFIG_HAVE_IFD_BIN=y +CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS=y +CONFIG_CPU_UCODE_BINARIES="3rdparty/blobs/soc/intel/cml/cpu_microcode_blob.bin" +CONFIG_EC_GOOGLE_CHROMEEC_FIRMWARE_EXTERNAL=y +CONFIG_EC_GOOGLE_CHROMEEC_FIRMWARE_FILE="3rdparty/blobs/mainboard/google/hatch/puff/ec.RW.flat" +CONFIG_HAVE_ME_BIN=y +CONFIG_NO_GFX_INIT=y +CONFIG_EDK2_GOP_DRIVER=y diff --git a/configs/glk/config.ampton.uefi b/configs/glk/config.ampton.uefi new file mode 100644 index 00000000000..5e2de15aa54 --- /dev/null +++ b/configs/glk/config.ampton.uefi @@ -0,0 +1,16 @@ +CONFIG_LOCALVERSION="MrChromebox-4.19" +CONFIG_VENDOR_GOOGLE=y +CONFIG_NO_POST=y +# CONFIG_CONSOLE_SERIAL is not set +CONFIG_INCLUDE_NHLT_BLOBS=y +CONFIG_IFD_BIN_PATH="3rdparty/blobs/mainboard/google/octopus/ampton/flashdescriptor.bin" +CONFIG_BOARD_GOOGLE_AMPTON=y +CONFIG_NEED_IFWI=y +CONFIG_IFWI_FILE_NAME="3rdparty/blobs/mainboard/google/octopus/ampton/ifwi.bin" +CONFIG_HAVE_IFD_BIN=y +CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS=y +CONFIG_CPU_UCODE_BINARIES="3rdparty/blobs/mainboard/google/octopus/ampton/cpu_microcode_blob.bin" +CONFIG_EC_GOOGLE_CHROMEEC_FIRMWARE_EXTERNAL=y +CONFIG_EC_GOOGLE_CHROMEEC_FIRMWARE_FILE="3rdparty/blobs/mainboard/google/octopus/ampton/ec.RW.flat" +CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION=y +CONFIG_ADD_FSP_BINARIES=y diff --git a/configs/glk/config.apel.uefi b/configs/glk/config.apel.uefi new file mode 100644 index 00000000000..a1a7a3d4a7e --- /dev/null +++ b/configs/glk/config.apel.uefi @@ -0,0 +1,17 @@ +CONFIG_LOCALVERSION="MrChromebox-4.19" +CONFIG_VENDOR_GOOGLE=y +CONFIG_NO_POST=y +# CONFIG_CONSOLE_SERIAL is not set +CONFIG_INCLUDE_NHLT_BLOBS=y +CONFIG_IFD_BIN_PATH="3rdparty/blobs/mainboard/google/octopus/ampton/flashdescriptor.bin" +CONFIG_BOARD_GOOGLE_AMPTON=y +CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="Apel" +CONFIG_NEED_IFWI=y +CONFIG_IFWI_FILE_NAME="3rdparty/blobs/mainboard/google/octopus/ampton/ifwi.bin" +CONFIG_HAVE_IFD_BIN=y +CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS=y +CONFIG_CPU_UCODE_BINARIES="3rdparty/blobs/mainboard/google/octopus/ampton/cpu_microcode_blob.bin" +CONFIG_EC_GOOGLE_CHROMEEC_FIRMWARE_EXTERNAL=y +CONFIG_EC_GOOGLE_CHROMEEC_FIRMWARE_FILE="3rdparty/blobs/mainboard/google/octopus/ampton/ec.RW.flat" +CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION=y +CONFIG_ADD_FSP_BINARIES=y diff --git a/configs/glk/config.bloog.uefi b/configs/glk/config.bloog.uefi new file mode 100644 index 00000000000..690b01e80f4 --- /dev/null +++ b/configs/glk/config.bloog.uefi @@ -0,0 +1,16 @@ +CONFIG_LOCALVERSION="MrChromebox-4.19" +CONFIG_VENDOR_GOOGLE=y +CONFIG_NO_POST=y +# CONFIG_CONSOLE_SERIAL is not set +CONFIG_INCLUDE_NHLT_BLOBS=y +CONFIG_IFD_BIN_PATH="3rdparty/blobs/mainboard/google/octopus/bloog/flashdescriptor.bin" +CONFIG_BOARD_GOOGLE_BLOOG=y +CONFIG_NEED_IFWI=y +CONFIG_IFWI_FILE_NAME="3rdparty/blobs/mainboard/google/octopus/bloog/ifwi.bin" +CONFIG_HAVE_IFD_BIN=y +CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS=y +CONFIG_CPU_UCODE_BINARIES="3rdparty/blobs/mainboard/google/octopus/bloog/cpu_microcode_blob.bin" +CONFIG_EC_GOOGLE_CHROMEEC_FIRMWARE_EXTERNAL=y +CONFIG_EC_GOOGLE_CHROMEEC_FIRMWARE_FILE="3rdparty/blobs/mainboard/google/octopus/bloog/ec.RW.flat" +CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION=y +CONFIG_ADD_FSP_BINARIES=y diff --git a/configs/glk/config.blooglet.uefi b/configs/glk/config.blooglet.uefi new file mode 100644 index 00000000000..13ff971686b --- /dev/null +++ b/configs/glk/config.blooglet.uefi @@ -0,0 +1,17 @@ +CONFIG_LOCALVERSION="MrChromebox-4.19" +CONFIG_VENDOR_GOOGLE=y +CONFIG_NO_POST=y +# CONFIG_CONSOLE_SERIAL is not set +CONFIG_INCLUDE_NHLT_BLOBS=y +CONFIG_IFD_BIN_PATH="3rdparty/blobs/mainboard/google/octopus/bloog/flashdescriptor.bin" +CONFIG_BOARD_GOOGLE_BLOOG=y +CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="Blooglet" +CONFIG_NEED_IFWI=y +CONFIG_IFWI_FILE_NAME="3rdparty/blobs/mainboard/google/octopus/bloog/ifwi.bin" +CONFIG_HAVE_IFD_BIN=y +CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS=y +CONFIG_CPU_UCODE_BINARIES="3rdparty/blobs/mainboard/google/octopus/bloog/cpu_microcode_blob.bin" +CONFIG_EC_GOOGLE_CHROMEEC_FIRMWARE_EXTERNAL=y +CONFIG_EC_GOOGLE_CHROMEEC_FIRMWARE_FILE="3rdparty/blobs/mainboard/google/octopus/bloog/ec.RW.flat" +CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION=y +CONFIG_ADD_FSP_BINARIES=y diff --git a/configs/glk/config.blooguard.uefi b/configs/glk/config.blooguard.uefi new file mode 100644 index 00000000000..cb60a9d5da8 --- /dev/null +++ b/configs/glk/config.blooguard.uefi @@ -0,0 +1,17 @@ +CONFIG_LOCALVERSION="MrChromebox-4.19" +CONFIG_VENDOR_GOOGLE=y +CONFIG_NO_POST=y +# CONFIG_CONSOLE_SERIAL is not set +CONFIG_INCLUDE_NHLT_BLOBS=y +CONFIG_IFD_BIN_PATH="3rdparty/blobs/mainboard/google/octopus/bloog/flashdescriptor.bin" +CONFIG_BOARD_GOOGLE_BLOOG=y +CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="Blooguard" +CONFIG_NEED_IFWI=y +CONFIG_IFWI_FILE_NAME="3rdparty/blobs/mainboard/google/octopus/bloog/ifwi.bin" +CONFIG_HAVE_IFD_BIN=y +CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS=y +CONFIG_CPU_UCODE_BINARIES="3rdparty/blobs/mainboard/google/octopus/bloog/cpu_microcode_blob.bin" +CONFIG_EC_GOOGLE_CHROMEEC_FIRMWARE_EXTERNAL=y +CONFIG_EC_GOOGLE_CHROMEEC_FIRMWARE_FILE="3rdparty/blobs/mainboard/google/octopus/bloog/ec.RW.flat" +CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION=y +CONFIG_ADD_FSP_BINARIES=y diff --git a/configs/glk/config.blorb.uefi b/configs/glk/config.blorb.uefi new file mode 100644 index 00000000000..16e919f09a8 --- /dev/null +++ b/configs/glk/config.blorb.uefi @@ -0,0 +1,17 @@ +CONFIG_LOCALVERSION="MrChromebox-4.19" +CONFIG_VENDOR_GOOGLE=y +CONFIG_NO_POST=y +# CONFIG_CONSOLE_SERIAL is not set +CONFIG_INCLUDE_NHLT_BLOBS=y +CONFIG_IFD_BIN_PATH="3rdparty/blobs/mainboard/google/octopus/bobba/flashdescriptor.bin" +CONFIG_BOARD_GOOGLE_BOBBA=y +CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="Blorb" +CONFIG_NEED_IFWI=y +CONFIG_IFWI_FILE_NAME="3rdparty/blobs/mainboard/google/octopus/bobba/ifwi.bin" +CONFIG_HAVE_IFD_BIN=y +CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS=y +CONFIG_CPU_UCODE_BINARIES="3rdparty/blobs/mainboard/google/octopus/bobba/cpu_microcode_blob.bin" +CONFIG_EC_GOOGLE_CHROMEEC_FIRMWARE_EXTERNAL=y +CONFIG_EC_GOOGLE_CHROMEEC_FIRMWARE_FILE="3rdparty/blobs/mainboard/google/octopus/bobba/ec.RW.flat" +CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION=y +CONFIG_ADD_FSP_BINARIES=y diff --git a/configs/glk/config.bluebird.uefi b/configs/glk/config.bluebird.uefi new file mode 100644 index 00000000000..e43e5a17cd1 --- /dev/null +++ b/configs/glk/config.bluebird.uefi @@ -0,0 +1,17 @@ +CONFIG_LOCALVERSION="MrChromebox-4.19" +CONFIG_VENDOR_GOOGLE=y +CONFIG_NO_POST=y +# CONFIG_CONSOLE_SERIAL is not set +CONFIG_INCLUDE_NHLT_BLOBS=y +CONFIG_IFD_BIN_PATH="3rdparty/blobs/mainboard/google/octopus/casta/flashdescriptor.bin" +CONFIG_BOARD_GOOGLE_CASTA=y +CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="Bluebird" +CONFIG_NEED_IFWI=y +CONFIG_IFWI_FILE_NAME="3rdparty/blobs/mainboard/google/octopus/casta/ifwi.bin" +CONFIG_HAVE_IFD_BIN=y +CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS=y +CONFIG_CPU_UCODE_BINARIES="3rdparty/blobs/mainboard/google/octopus/casta/cpu_microcode_blob.bin" +CONFIG_EC_GOOGLE_CHROMEEC_FIRMWARE_EXTERNAL=y +CONFIG_EC_GOOGLE_CHROMEEC_FIRMWARE_FILE="3rdparty/blobs/mainboard/google/octopus/casta/ec.RW.flat" +CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION=y +CONFIG_ADD_FSP_BINARIES=y diff --git a/configs/glk/config.bobba.uefi b/configs/glk/config.bobba.uefi new file mode 100644 index 00000000000..50d240a9236 --- /dev/null +++ b/configs/glk/config.bobba.uefi @@ -0,0 +1,16 @@ +CONFIG_LOCALVERSION="MrChromebox-4.19" +CONFIG_VENDOR_GOOGLE=y +CONFIG_NO_POST=y +# CONFIG_CONSOLE_SERIAL is not set +CONFIG_INCLUDE_NHLT_BLOBS=y +CONFIG_IFD_BIN_PATH="3rdparty/blobs/mainboard/google/octopus/bobba/flashdescriptor.bin" +CONFIG_BOARD_GOOGLE_BOBBA=y +CONFIG_NEED_IFWI=y +CONFIG_IFWI_FILE_NAME="3rdparty/blobs/mainboard/google/octopus/bobba/ifwi.bin" +CONFIG_HAVE_IFD_BIN=y +CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS=y +CONFIG_CPU_UCODE_BINARIES="3rdparty/blobs/mainboard/google/octopus/bobba/cpu_microcode_blob.bin" +CONFIG_EC_GOOGLE_CHROMEEC_FIRMWARE_EXTERNAL=y +CONFIG_EC_GOOGLE_CHROMEEC_FIRMWARE_FILE="3rdparty/blobs/mainboard/google/octopus/bobba/ec.RW.flat" +CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION=y +CONFIG_ADD_FSP_BINARIES=y diff --git a/configs/glk/config.bobba360.uefi b/configs/glk/config.bobba360.uefi new file mode 100644 index 00000000000..3bd759379b4 --- /dev/null +++ b/configs/glk/config.bobba360.uefi @@ -0,0 +1,17 @@ +CONFIG_LOCALVERSION="MrChromebox-4.19" +CONFIG_VENDOR_GOOGLE=y +CONFIG_NO_POST=y +# CONFIG_CONSOLE_SERIAL is not set +CONFIG_INCLUDE_NHLT_BLOBS=y +CONFIG_IFD_BIN_PATH="3rdparty/blobs/mainboard/google/octopus/bobba/flashdescriptor.bin" +CONFIG_BOARD_GOOGLE_BOBBA=y +CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="Bobba360" +CONFIG_NEED_IFWI=y +CONFIG_IFWI_FILE_NAME="3rdparty/blobs/mainboard/google/octopus/bobba/ifwi.bin" +CONFIG_HAVE_IFD_BIN=y +CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS=y +CONFIG_CPU_UCODE_BINARIES="3rdparty/blobs/mainboard/google/octopus/bobba/cpu_microcode_blob.bin" +CONFIG_EC_GOOGLE_CHROMEEC_FIRMWARE_EXTERNAL=y +CONFIG_EC_GOOGLE_CHROMEEC_FIRMWARE_FILE="3rdparty/blobs/mainboard/google/octopus/bobba/ec.RW.flat" +CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION=y +CONFIG_ADD_FSP_BINARIES=y diff --git a/configs/glk/config.casta.uefi b/configs/glk/config.casta.uefi new file mode 100644 index 00000000000..e812b91a3d8 --- /dev/null +++ b/configs/glk/config.casta.uefi @@ -0,0 +1,16 @@ +CONFIG_LOCALVERSION="MrChromebox-4.19" +CONFIG_VENDOR_GOOGLE=y +CONFIG_NO_POST=y +# CONFIG_CONSOLE_SERIAL is not set +CONFIG_INCLUDE_NHLT_BLOBS=y +CONFIG_IFD_BIN_PATH="3rdparty/blobs/mainboard/google/octopus/casta/flashdescriptor.bin" +CONFIG_BOARD_GOOGLE_CASTA=y +CONFIG_NEED_IFWI=y +CONFIG_IFWI_FILE_NAME="3rdparty/blobs/mainboard/google/octopus/casta/ifwi.bin" +CONFIG_HAVE_IFD_BIN=y +CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS=y +CONFIG_CPU_UCODE_BINARIES="3rdparty/blobs/mainboard/google/octopus/casta/cpu_microcode_blob.bin" +CONFIG_EC_GOOGLE_CHROMEEC_FIRMWARE_EXTERNAL=y +CONFIG_EC_GOOGLE_CHROMEEC_FIRMWARE_FILE="3rdparty/blobs/mainboard/google/octopus/casta/ec.RW.flat" +CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION=y +CONFIG_ADD_FSP_BINARIES=y diff --git a/configs/glk/config.dood.uefi b/configs/glk/config.dood.uefi new file mode 100644 index 00000000000..19f06075c48 --- /dev/null +++ b/configs/glk/config.dood.uefi @@ -0,0 +1,16 @@ +CONFIG_LOCALVERSION="MrChromebox-4.19" +CONFIG_VENDOR_GOOGLE=y +CONFIG_NO_POST=y +# CONFIG_CONSOLE_SERIAL is not set +CONFIG_INCLUDE_NHLT_BLOBS=y +CONFIG_IFD_BIN_PATH="3rdparty/blobs/mainboard/google/octopus/dood/flashdescriptor.bin" +CONFIG_BOARD_GOOGLE_DOOD=y +CONFIG_NEED_IFWI=y +CONFIG_IFWI_FILE_NAME="3rdparty/blobs/mainboard/google/octopus/dood/ifwi.bin" +CONFIG_HAVE_IFD_BIN=y +CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS=y +CONFIG_CPU_UCODE_BINARIES="3rdparty/blobs/mainboard/google/octopus/dood/cpu_microcode_blob.bin" +CONFIG_EC_GOOGLE_CHROMEEC_FIRMWARE_EXTERNAL=y +CONFIG_EC_GOOGLE_CHROMEEC_FIRMWARE_FILE="3rdparty/blobs/mainboard/google/octopus/dood/ec.RW.flat" +CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION=y +CONFIG_ADD_FSP_BINARIES=y diff --git a/configs/glk/config.dorp.uefi b/configs/glk/config.dorp.uefi new file mode 100644 index 00000000000..91e36aada38 --- /dev/null +++ b/configs/glk/config.dorp.uefi @@ -0,0 +1,17 @@ +CONFIG_LOCALVERSION="MrChromebox-4.19" +CONFIG_VENDOR_GOOGLE=y +CONFIG_NO_POST=y +# CONFIG_CONSOLE_SERIAL is not set +CONFIG_INCLUDE_NHLT_BLOBS=y +CONFIG_IFD_BIN_PATH="3rdparty/blobs/mainboard/google/octopus/meep/flashdescriptor.bin" +CONFIG_BOARD_GOOGLE_MEEP=y +CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="Dorp" +CONFIG_NEED_IFWI=y +CONFIG_IFWI_FILE_NAME="3rdparty/blobs/mainboard/google/octopus/meep/ifwi.bin" +CONFIG_HAVE_IFD_BIN=y +CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS=y +CONFIG_CPU_UCODE_BINARIES="3rdparty/blobs/mainboard/google/octopus/meep/cpu_microcode_blob.bin" +CONFIG_EC_GOOGLE_CHROMEEC_FIRMWARE_EXTERNAL=y +CONFIG_EC_GOOGLE_CHROMEEC_FIRMWARE_FILE="3rdparty/blobs/mainboard/google/octopus/meep/ec.RW.flat" +CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION=y +CONFIG_ADD_FSP_BINARIES=y diff --git a/configs/glk/config.droid.uefi b/configs/glk/config.droid.uefi new file mode 100644 index 00000000000..c2af9063d54 --- /dev/null +++ b/configs/glk/config.droid.uefi @@ -0,0 +1,17 @@ +CONFIG_LOCALVERSION="MrChromebox-4.19" +CONFIG_VENDOR_GOOGLE=y +CONFIG_NO_POST=y +# CONFIG_CONSOLE_SERIAL is not set +CONFIG_INCLUDE_NHLT_BLOBS=y +CONFIG_IFD_BIN_PATH="3rdparty/blobs/mainboard/google/octopus/bobba/flashdescriptor.bin" +CONFIG_BOARD_GOOGLE_BOBBA=y +CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="Droid" +CONFIG_NEED_IFWI=y +CONFIG_IFWI_FILE_NAME="3rdparty/blobs/mainboard/google/octopus/bobba/ifwi.bin" +CONFIG_HAVE_IFD_BIN=y +CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS=y +CONFIG_CPU_UCODE_BINARIES="3rdparty/blobs/mainboard/google/octopus/bobba/cpu_microcode_blob.bin" +CONFIG_EC_GOOGLE_CHROMEEC_FIRMWARE_EXTERNAL=y +CONFIG_EC_GOOGLE_CHROMEEC_FIRMWARE_FILE="3rdparty/blobs/mainboard/google/octopus/bobba/ec.RW.flat" +CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION=y +CONFIG_ADD_FSP_BINARIES=y diff --git a/configs/glk/config.fleex.uefi b/configs/glk/config.fleex.uefi new file mode 100644 index 00000000000..91472c04cc8 --- /dev/null +++ b/configs/glk/config.fleex.uefi @@ -0,0 +1,16 @@ +CONFIG_LOCALVERSION="MrChromebox-4.19" +CONFIG_VENDOR_GOOGLE=y +CONFIG_NO_POST=y +# CONFIG_CONSOLE_SERIAL is not set +CONFIG_INCLUDE_NHLT_BLOBS=y +CONFIG_IFD_BIN_PATH="3rdparty/blobs/mainboard/google/octopus/fleex/flashdescriptor.bin" +CONFIG_BOARD_GOOGLE_FLEEX=y +CONFIG_NEED_IFWI=y +CONFIG_IFWI_FILE_NAME="3rdparty/blobs/mainboard/google/octopus/fleex/ifwi.bin" +CONFIG_HAVE_IFD_BIN=y +CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS=y +CONFIG_CPU_UCODE_BINARIES="3rdparty/blobs/mainboard/google/octopus/fleex/cpu_microcode_blob.bin" +CONFIG_EC_GOOGLE_CHROMEEC_FIRMWARE_EXTERNAL=y +CONFIG_EC_GOOGLE_CHROMEEC_FIRMWARE_FILE="3rdparty/blobs/mainboard/google/octopus/fleex/ec.RW.flat" +CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION=y +CONFIG_ADD_FSP_BINARIES=y diff --git a/configs/glk/config.foob.uefi b/configs/glk/config.foob.uefi new file mode 100644 index 00000000000..57dbedb61d1 --- /dev/null +++ b/configs/glk/config.foob.uefi @@ -0,0 +1,16 @@ +CONFIG_LOCALVERSION="MrChromebox-4.19" +CONFIG_VENDOR_GOOGLE=y +CONFIG_NO_POST=y +# CONFIG_CONSOLE_SERIAL is not set +CONFIG_INCLUDE_NHLT_BLOBS=y +CONFIG_IFD_BIN_PATH="3rdparty/blobs/mainboard/google/octopus/foob/flashdescriptor.bin" +CONFIG_BOARD_GOOGLE_FOOB=y +CONFIG_NEED_IFWI=y +CONFIG_IFWI_FILE_NAME="3rdparty/blobs/mainboard/google/octopus/foob/ifwi.bin" +CONFIG_HAVE_IFD_BIN=y +CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS=y +CONFIG_CPU_UCODE_BINARIES="3rdparty/blobs/mainboard/google/octopus/foob/cpu_microcode_blob.bin" +CONFIG_EC_GOOGLE_CHROMEEC_FIRMWARE_EXTERNAL=y +CONFIG_EC_GOOGLE_CHROMEEC_FIRMWARE_FILE="3rdparty/blobs/mainboard/google/octopus/foob/ec.RW.flat" +CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION=y +CONFIG_ADD_FSP_BINARIES=y diff --git a/configs/glk/config.foob360.uefi b/configs/glk/config.foob360.uefi new file mode 100644 index 00000000000..136cb234f65 --- /dev/null +++ b/configs/glk/config.foob360.uefi @@ -0,0 +1,17 @@ +CONFIG_LOCALVERSION="MrChromebox-4.19" +CONFIG_VENDOR_GOOGLE=y +CONFIG_NO_POST=y +# CONFIG_CONSOLE_SERIAL is not set +CONFIG_INCLUDE_NHLT_BLOBS=y +CONFIG_IFD_BIN_PATH="3rdparty/blobs/mainboard/google/octopus/foob/flashdescriptor.bin" +CONFIG_BOARD_GOOGLE_FOOB=y +CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="Foob360" +CONFIG_NEED_IFWI=y +CONFIG_IFWI_FILE_NAME="3rdparty/blobs/mainboard/google/octopus/foob/ifwi.bin" +CONFIG_HAVE_IFD_BIN=y +CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS=y +CONFIG_CPU_UCODE_BINARIES="3rdparty/blobs/mainboard/google/octopus/foob/cpu_microcode_blob.bin" +CONFIG_EC_GOOGLE_CHROMEEC_FIRMWARE_EXTERNAL=y +CONFIG_EC_GOOGLE_CHROMEEC_FIRMWARE_FILE="3rdparty/blobs/mainboard/google/octopus/foob/ec.RW.flat" +CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION=y +CONFIG_ADD_FSP_BINARIES=y diff --git a/configs/glk/config.garfour.uefi b/configs/glk/config.garfour.uefi new file mode 100644 index 00000000000..fb14d10e874 --- /dev/null +++ b/configs/glk/config.garfour.uefi @@ -0,0 +1,17 @@ +CONFIG_LOCALVERSION="MrChromebox-4.19" +CONFIG_VENDOR_GOOGLE=y +CONFIG_NO_POST=y +# CONFIG_CONSOLE_SERIAL is not set +CONFIG_INCLUDE_NHLT_BLOBS=y +CONFIG_IFD_BIN_PATH="3rdparty/blobs/mainboard/google/octopus/garg/flashdescriptor.bin" +CONFIG_BOARD_GOOGLE_GARG=y +CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="Garfour" +CONFIG_NEED_IFWI=y +CONFIG_IFWI_FILE_NAME="3rdparty/blobs/mainboard/google/octopus/garg/ifwi.bin" +CONFIG_HAVE_IFD_BIN=y +CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS=y +CONFIG_CPU_UCODE_BINARIES="3rdparty/blobs/mainboard/google/octopus/garg/cpu_microcode_blob.bin" +CONFIG_EC_GOOGLE_CHROMEEC_FIRMWARE_EXTERNAL=y +CONFIG_EC_GOOGLE_CHROMEEC_FIRMWARE_FILE="3rdparty/blobs/mainboard/google/octopus/garg/ec.RW.flat" +CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION=y +CONFIG_ADD_FSP_BINARIES=y diff --git a/configs/glk/config.garg.uefi b/configs/glk/config.garg.uefi new file mode 100644 index 00000000000..e04f83f2d80 --- /dev/null +++ b/configs/glk/config.garg.uefi @@ -0,0 +1,16 @@ +CONFIG_LOCALVERSION="MrChromebox-4.19" +CONFIG_VENDOR_GOOGLE=y +CONFIG_NO_POST=y +# CONFIG_CONSOLE_SERIAL is not set +CONFIG_INCLUDE_NHLT_BLOBS=y +CONFIG_IFD_BIN_PATH="3rdparty/blobs/mainboard/google/octopus/garg/flashdescriptor.bin" +CONFIG_BOARD_GOOGLE_GARG=y +CONFIG_NEED_IFWI=y +CONFIG_IFWI_FILE_NAME="3rdparty/blobs/mainboard/google/octopus/garg/ifwi.bin" +CONFIG_HAVE_IFD_BIN=y +CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS=y +CONFIG_CPU_UCODE_BINARIES="3rdparty/blobs/mainboard/google/octopus/garg/cpu_microcode_blob.bin" +CONFIG_EC_GOOGLE_CHROMEEC_FIRMWARE_EXTERNAL=y +CONFIG_EC_GOOGLE_CHROMEEC_FIRMWARE_FILE="3rdparty/blobs/mainboard/google/octopus/garg/ec.RW.flat" +CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION=y +CONFIG_ADD_FSP_BINARIES=y diff --git a/configs/glk/config.garg360.uefi b/configs/glk/config.garg360.uefi new file mode 100644 index 00000000000..8e50cc63842 --- /dev/null +++ b/configs/glk/config.garg360.uefi @@ -0,0 +1,17 @@ +CONFIG_LOCALVERSION="MrChromebox-4.19" +CONFIG_VENDOR_GOOGLE=y +CONFIG_NO_POST=y +# CONFIG_CONSOLE_SERIAL is not set +CONFIG_INCLUDE_NHLT_BLOBS=y +CONFIG_IFD_BIN_PATH="3rdparty/blobs/mainboard/google/octopus/garg/flashdescriptor.bin" +CONFIG_BOARD_GOOGLE_GARG=y +CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="Garg360" +CONFIG_NEED_IFWI=y +CONFIG_IFWI_FILE_NAME="3rdparty/blobs/mainboard/google/octopus/garg/ifwi.bin" +CONFIG_HAVE_IFD_BIN=y +CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS=y +CONFIG_CPU_UCODE_BINARIES="3rdparty/blobs/mainboard/google/octopus/garg/cpu_microcode_blob.bin" +CONFIG_EC_GOOGLE_CHROMEEC_FIRMWARE_EXTERNAL=y +CONFIG_EC_GOOGLE_CHROMEEC_FIRMWARE_FILE="3rdparty/blobs/mainboard/google/octopus/garg/ec.RW.flat" +CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION=y +CONFIG_ADD_FSP_BINARIES=y diff --git a/configs/glk/config.grabbiter.uefi b/configs/glk/config.grabbiter.uefi new file mode 100644 index 00000000000..f0dfa1d995e --- /dev/null +++ b/configs/glk/config.grabbiter.uefi @@ -0,0 +1,17 @@ +CONFIG_LOCALVERSION="MrChromebox-4.19" +CONFIG_VENDOR_GOOGLE=y +CONFIG_NO_POST=y +# CONFIG_CONSOLE_SERIAL is not set +CONFIG_INCLUDE_NHLT_BLOBS=y +CONFIG_IFD_BIN_PATH="3rdparty/blobs/mainboard/google/octopus/fleex/flashdescriptor.bin" +CONFIG_BOARD_GOOGLE_FLEEX=y +CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="Grabbiter" +CONFIG_NEED_IFWI=y +CONFIG_IFWI_FILE_NAME="3rdparty/blobs/mainboard/google/octopus/fleex/ifwi.bin" +CONFIG_HAVE_IFD_BIN=y +CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS=y +CONFIG_CPU_UCODE_BINARIES="3rdparty/blobs/mainboard/google/octopus/fleex/cpu_microcode_blob.bin" +CONFIG_EC_GOOGLE_CHROMEEC_FIRMWARE_EXTERNAL=y +CONFIG_EC_GOOGLE_CHROMEEC_FIRMWARE_FILE="3rdparty/blobs/mainboard/google/octopus/fleex/ec.RW.flat" +CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION=y +CONFIG_ADD_FSP_BINARIES=y diff --git a/configs/glk/config.laser.uefi b/configs/glk/config.laser.uefi new file mode 100644 index 00000000000..f159b67538e --- /dev/null +++ b/configs/glk/config.laser.uefi @@ -0,0 +1,17 @@ +CONFIG_LOCALVERSION="MrChromebox-4.19" +CONFIG_VENDOR_GOOGLE=y +CONFIG_NO_POST=y +# CONFIG_CONSOLE_SERIAL is not set +CONFIG_INCLUDE_NHLT_BLOBS=y +CONFIG_IFD_BIN_PATH="3rdparty/blobs/mainboard/google/octopus/phaser/flashdescriptor.bin" +CONFIG_BOARD_GOOGLE_PHASER=y +CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="Laser" +CONFIG_NEED_IFWI=y +CONFIG_IFWI_FILE_NAME="3rdparty/blobs/mainboard/google/octopus/phaser/ifwi.bin" +CONFIG_HAVE_IFD_BIN=y +CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS=y +CONFIG_CPU_UCODE_BINARIES="3rdparty/blobs/mainboard/google/octopus/phaser/cpu_microcode_blob.bin" +CONFIG_EC_GOOGLE_CHROMEEC_FIRMWARE_EXTERNAL=y +CONFIG_EC_GOOGLE_CHROMEEC_FIRMWARE_FILE="3rdparty/blobs/mainboard/google/octopus/phaser/ec.RW.flat" +CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION=y +CONFIG_ADD_FSP_BINARIES=y diff --git a/configs/glk/config.laser14.uefi b/configs/glk/config.laser14.uefi new file mode 100644 index 00000000000..005156207e4 --- /dev/null +++ b/configs/glk/config.laser14.uefi @@ -0,0 +1,17 @@ +CONFIG_LOCALVERSION="MrChromebox-4.19" +CONFIG_VENDOR_GOOGLE=y +CONFIG_NO_POST=y +# CONFIG_CONSOLE_SERIAL is not set +CONFIG_INCLUDE_NHLT_BLOBS=y +CONFIG_IFD_BIN_PATH="3rdparty/blobs/mainboard/google/octopus/phaser/flashdescriptor.bin" +CONFIG_BOARD_GOOGLE_PHASER=y +CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="Laser14" +CONFIG_NEED_IFWI=y +CONFIG_IFWI_FILE_NAME="3rdparty/blobs/mainboard/google/octopus/phaser/ifwi.bin" +CONFIG_HAVE_IFD_BIN=y +CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS=y +CONFIG_CPU_UCODE_BINARIES="3rdparty/blobs/mainboard/google/octopus/phaser/cpu_microcode_blob.bin" +CONFIG_EC_GOOGLE_CHROMEEC_FIRMWARE_EXTERNAL=y +CONFIG_EC_GOOGLE_CHROMEEC_FIRMWARE_FILE="3rdparty/blobs/mainboard/google/octopus/phaser/ec.RW.flat" +CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION=y +CONFIG_ADD_FSP_BINARIES=y diff --git a/configs/glk/config.lick.uefi b/configs/glk/config.lick.uefi new file mode 100644 index 00000000000..2e5d0c1486e --- /dev/null +++ b/configs/glk/config.lick.uefi @@ -0,0 +1,14 @@ +CONFIG_LOCALVERSION="MrChromebox-4.19" +CONFIG_VENDOR_GOOGLE=y +CONFIG_NO_POST=y +# CONFIG_CONSOLE_SERIAL is not set +CONFIG_INCLUDE_NHLT_BLOBS=y +CONFIG_IFD_BIN_PATH="3rdparty/blobs/mainboard/google/octopus/lick/flashdescriptor.bin" +CONFIG_BOARD_GOOGLE_LICK=y +CONFIG_NEED_IFWI=y +CONFIG_IFWI_FILE_NAME="3rdparty/blobs/mainboard/google/octopus/lick/ifwi.bin" +CONFIG_HAVE_IFD_BIN=y +CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS=y +CONFIG_CPU_UCODE_BINARIES="3rdparty/blobs/mainboard/google/octopus/lick/cpu_microcode_blob.bin" +CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION=y +CONFIG_ADD_FSP_BINARIES=y diff --git a/configs/glk/config.meep.uefi b/configs/glk/config.meep.uefi new file mode 100644 index 00000000000..36af80dbf2f --- /dev/null +++ b/configs/glk/config.meep.uefi @@ -0,0 +1,16 @@ +CONFIG_LOCALVERSION="MrChromebox-4.19" +CONFIG_VENDOR_GOOGLE=y +CONFIG_NO_POST=y +# CONFIG_CONSOLE_SERIAL is not set +CONFIG_INCLUDE_NHLT_BLOBS=y +CONFIG_IFD_BIN_PATH="3rdparty/blobs/mainboard/google/octopus/meep/flashdescriptor.bin" +CONFIG_BOARD_GOOGLE_MEEP=y +CONFIG_NEED_IFWI=y +CONFIG_IFWI_FILE_NAME="3rdparty/blobs/mainboard/google/octopus/meep/ifwi.bin" +CONFIG_HAVE_IFD_BIN=y +CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS=y +CONFIG_CPU_UCODE_BINARIES="3rdparty/blobs/mainboard/google/octopus/meep/cpu_microcode_blob.bin" +CONFIG_EC_GOOGLE_CHROMEEC_FIRMWARE_EXTERNAL=y +CONFIG_EC_GOOGLE_CHROMEEC_FIRMWARE_FILE="3rdparty/blobs/mainboard/google/octopus/meep/ec.RW.flat" +CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION=y +CONFIG_ADD_FSP_BINARIES=y diff --git a/configs/glk/config.mimrock.uefi b/configs/glk/config.mimrock.uefi new file mode 100644 index 00000000000..5835c98dd52 --- /dev/null +++ b/configs/glk/config.mimrock.uefi @@ -0,0 +1,17 @@ +CONFIG_LOCALVERSION="MrChromebox-4.19" +CONFIG_VENDOR_GOOGLE=y +CONFIG_NO_POST=y +# CONFIG_CONSOLE_SERIAL is not set +CONFIG_INCLUDE_NHLT_BLOBS=y +CONFIG_IFD_BIN_PATH="3rdparty/blobs/mainboard/google/octopus/mimrock/flashdescriptor.bin" +CONFIG_BOARD_GOOGLE_MEEP=y +CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="Mimrock" +CONFIG_NEED_IFWI=y +CONFIG_IFWI_FILE_NAME="3rdparty/blobs/mainboard/google/octopus/mimrock/ifwi.bin" +CONFIG_HAVE_IFD_BIN=y +CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS=y +CONFIG_CPU_UCODE_BINARIES="3rdparty/blobs/mainboard/google/octopus/mimrock/cpu_microcode_blob.bin" +CONFIG_EC_GOOGLE_CHROMEEC_FIRMWARE_EXTERNAL=y +CONFIG_EC_GOOGLE_CHROMEEC_FIRMWARE_FILE="3rdparty/blobs/mainboard/google/octopus/meep/ec.RW.flat" +CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION=y +CONFIG_ADD_FSP_BINARIES=y diff --git a/configs/glk/config.nospike.uefi b/configs/glk/config.nospike.uefi new file mode 100644 index 00000000000..1865c951ec6 --- /dev/null +++ b/configs/glk/config.nospike.uefi @@ -0,0 +1,17 @@ +CONFIG_LOCALVERSION="MrChromebox-4.19" +CONFIG_VENDOR_GOOGLE=y +CONFIG_NO_POST=y +# CONFIG_CONSOLE_SERIAL is not set +CONFIG_INCLUDE_NHLT_BLOBS=y +CONFIG_IFD_BIN_PATH="3rdparty/blobs/mainboard/google/octopus/ampton/flashdescriptor.bin" +CONFIG_BOARD_GOOGLE_AMPTON=y +CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="Nospike" +CONFIG_NEED_IFWI=y +CONFIG_IFWI_FILE_NAME="3rdparty/blobs/mainboard/google/octopus/ampton/ifwi.bin" +CONFIG_HAVE_IFD_BIN=y +CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS=y +CONFIG_CPU_UCODE_BINARIES="3rdparty/blobs/mainboard/google/octopus/ampton/cpu_microcode_blob.bin" +CONFIG_EC_GOOGLE_CHROMEEC_FIRMWARE_EXTERNAL=y +CONFIG_EC_GOOGLE_CHROMEEC_FIRMWARE_FILE="3rdparty/blobs/mainboard/google/octopus/ampton/ec.RW.flat" +CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION=y +CONFIG_ADD_FSP_BINARIES=y diff --git a/configs/glk/config.orbatrix.uefi b/configs/glk/config.orbatrix.uefi new file mode 100644 index 00000000000..20723cec924 --- /dev/null +++ b/configs/glk/config.orbatrix.uefi @@ -0,0 +1,17 @@ +CONFIG_LOCALVERSION="MrChromebox-4.19" +CONFIG_VENDOR_GOOGLE=y +CONFIG_NO_POST=y +# CONFIG_CONSOLE_SERIAL is not set +CONFIG_INCLUDE_NHLT_BLOBS=y +CONFIG_IFD_BIN_PATH="3rdparty/blobs/mainboard/google/octopus/fleex/flashdescriptor.bin" +CONFIG_BOARD_GOOGLE_FLEEX=y +CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="Orbatrix" +CONFIG_NEED_IFWI=y +CONFIG_IFWI_FILE_NAME="3rdparty/blobs/mainboard/google/octopus/fleex/ifwi.bin" +CONFIG_HAVE_IFD_BIN=y +CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS=y +CONFIG_CPU_UCODE_BINARIES="3rdparty/blobs/mainboard/google/octopus/fleex/cpu_microcode_blob.bin" +CONFIG_EC_GOOGLE_CHROMEEC_FIRMWARE_EXTERNAL=y +CONFIG_EC_GOOGLE_CHROMEEC_FIRMWARE_FILE="3rdparty/blobs/mainboard/google/octopus/fleex/ec.RW.flat" +CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION=y +CONFIG_ADD_FSP_BINARIES=y diff --git a/configs/glk/config.phaser.uefi b/configs/glk/config.phaser.uefi new file mode 100644 index 00000000000..bbd6f0570fc --- /dev/null +++ b/configs/glk/config.phaser.uefi @@ -0,0 +1,16 @@ +CONFIG_LOCALVERSION="MrChromebox-4.19" +CONFIG_VENDOR_GOOGLE=y +CONFIG_NO_POST=y +# CONFIG_CONSOLE_SERIAL is not set +CONFIG_INCLUDE_NHLT_BLOBS=y +CONFIG_IFD_BIN_PATH="3rdparty/blobs/mainboard/google/octopus/phaser/flashdescriptor.bin" +CONFIG_BOARD_GOOGLE_PHASER=y +CONFIG_NEED_IFWI=y +CONFIG_IFWI_FILE_NAME="3rdparty/blobs/mainboard/google/octopus/phaser/ifwi.bin" +CONFIG_HAVE_IFD_BIN=y +CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS=y +CONFIG_CPU_UCODE_BINARIES="3rdparty/blobs/mainboard/google/octopus/phaser/cpu_microcode_blob.bin" +CONFIG_EC_GOOGLE_CHROMEEC_FIRMWARE_EXTERNAL=y +CONFIG_EC_GOOGLE_CHROMEEC_FIRMWARE_FILE="3rdparty/blobs/mainboard/google/octopus/phaser/ec.RW.flat" +CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION=y +CONFIG_ADD_FSP_BINARIES=y diff --git a/configs/glk/config.phaser360.uefi b/configs/glk/config.phaser360.uefi new file mode 100644 index 00000000000..ddbdd003af8 --- /dev/null +++ b/configs/glk/config.phaser360.uefi @@ -0,0 +1,17 @@ +CONFIG_LOCALVERSION="MrChromebox-4.19" +CONFIG_VENDOR_GOOGLE=y +CONFIG_NO_POST=y +# CONFIG_CONSOLE_SERIAL is not set +CONFIG_INCLUDE_NHLT_BLOBS=y +CONFIG_IFD_BIN_PATH="3rdparty/blobs/mainboard/google/octopus/phaser/flashdescriptor.bin" +CONFIG_BOARD_GOOGLE_PHASER=y +CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="Phaser360" +CONFIG_NEED_IFWI=y +CONFIG_IFWI_FILE_NAME="3rdparty/blobs/mainboard/google/octopus/phaser/ifwi.bin" +CONFIG_HAVE_IFD_BIN=y +CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS=y +CONFIG_CPU_UCODE_BINARIES="3rdparty/blobs/mainboard/google/octopus/phaser/cpu_microcode_blob.bin" +CONFIG_EC_GOOGLE_CHROMEEC_FIRMWARE_EXTERNAL=y +CONFIG_EC_GOOGLE_CHROMEEC_FIRMWARE_FILE="3rdparty/blobs/mainboard/google/octopus/phaser/ec.RW.flat" +CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION=y +CONFIG_ADD_FSP_BINARIES=y diff --git a/configs/glk/config.phaser360s.uefi b/configs/glk/config.phaser360s.uefi new file mode 100644 index 00000000000..ddd2eb0c2a3 --- /dev/null +++ b/configs/glk/config.phaser360s.uefi @@ -0,0 +1,17 @@ +CONFIG_LOCALVERSION="MrChromebox-4.19" +CONFIG_VENDOR_GOOGLE=y +CONFIG_NO_POST=y +# CONFIG_CONSOLE_SERIAL is not set +CONFIG_INCLUDE_NHLT_BLOBS=y +CONFIG_IFD_BIN_PATH="3rdparty/blobs/mainboard/google/octopus/phaser/flashdescriptor.bin" +CONFIG_BOARD_GOOGLE_PHASER=y +CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="Phaser360s" +CONFIG_NEED_IFWI=y +CONFIG_IFWI_FILE_NAME="3rdparty/blobs/mainboard/google/octopus/phaser/ifwi.bin" +CONFIG_HAVE_IFD_BIN=y +CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS=y +CONFIG_CPU_UCODE_BINARIES="3rdparty/blobs/mainboard/google/octopus/phaser/cpu_microcode_blob.bin" +CONFIG_EC_GOOGLE_CHROMEEC_FIRMWARE_EXTERNAL=y +CONFIG_EC_GOOGLE_CHROMEEC_FIRMWARE_FILE="3rdparty/blobs/mainboard/google/octopus/phaser/ec.RW.flat" +CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION=y +CONFIG_ADD_FSP_BINARIES=y diff --git a/configs/glk/config.sparky.uefi b/configs/glk/config.sparky.uefi new file mode 100644 index 00000000000..217deb7d09d --- /dev/null +++ b/configs/glk/config.sparky.uefi @@ -0,0 +1,17 @@ +CONFIG_LOCALVERSION="MrChromebox-4.19" +CONFIG_VENDOR_GOOGLE=y +CONFIG_NO_POST=y +# CONFIG_CONSOLE_SERIAL is not set +CONFIG_INCLUDE_NHLT_BLOBS=y +CONFIG_IFD_BIN_PATH="3rdparty/blobs/mainboard/google/octopus/bobba/flashdescriptor.bin" +CONFIG_BOARD_GOOGLE_BOBBA=y +CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="Sparky" +CONFIG_NEED_IFWI=y +CONFIG_IFWI_FILE_NAME="3rdparty/blobs/mainboard/google/octopus/bobba/ifwi.bin" +CONFIG_HAVE_IFD_BIN=y +CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS=y +CONFIG_CPU_UCODE_BINARIES="3rdparty/blobs/mainboard/google/octopus/bobba/cpu_microcode_blob.bin" +CONFIG_EC_GOOGLE_CHROMEEC_FIRMWARE_EXTERNAL=y +CONFIG_EC_GOOGLE_CHROMEEC_FIRMWARE_FILE="3rdparty/blobs/mainboard/google/octopus/bobba/ec.RW.flat" +CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION=y +CONFIG_ADD_FSP_BINARIES=y diff --git a/configs/glk/config.sparky360.uefi b/configs/glk/config.sparky360.uefi new file mode 100644 index 00000000000..f3249596644 --- /dev/null +++ b/configs/glk/config.sparky360.uefi @@ -0,0 +1,17 @@ +CONFIG_LOCALVERSION="MrChromebox-4.19" +CONFIG_VENDOR_GOOGLE=y +CONFIG_NO_POST=y +# CONFIG_CONSOLE_SERIAL is not set +CONFIG_INCLUDE_NHLT_BLOBS=y +CONFIG_IFD_BIN_PATH="3rdparty/blobs/mainboard/google/octopus/bobba/flashdescriptor.bin" +CONFIG_BOARD_GOOGLE_BOBBA=y +CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="Sparky360" +CONFIG_NEED_IFWI=y +CONFIG_IFWI_FILE_NAME="3rdparty/blobs/mainboard/google/octopus/bobba/ifwi.bin" +CONFIG_HAVE_IFD_BIN=y +CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS=y +CONFIG_CPU_UCODE_BINARIES="3rdparty/blobs/mainboard/google/octopus/bobba/cpu_microcode_blob.bin" +CONFIG_EC_GOOGLE_CHROMEEC_FIRMWARE_EXTERNAL=y +CONFIG_EC_GOOGLE_CHROMEEC_FIRMWARE_FILE="3rdparty/blobs/mainboard/google/octopus/bobba/ec.RW.flat" +CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION=y +CONFIG_ADD_FSP_BINARIES=y diff --git a/configs/glk/config.vorticon.uefi b/configs/glk/config.vorticon.uefi new file mode 100644 index 00000000000..a015326a8bc --- /dev/null +++ b/configs/glk/config.vorticon.uefi @@ -0,0 +1,17 @@ +CONFIG_LOCALVERSION="MrChromebox-4.19" +CONFIG_VENDOR_GOOGLE=y +CONFIG_NO_POST=y +# CONFIG_CONSOLE_SERIAL is not set +CONFIG_INCLUDE_NHLT_BLOBS=y +CONFIG_IFD_BIN_PATH="3rdparty/blobs/mainboard/google/octopus/meep/flashdescriptor.bin" +CONFIG_BOARD_GOOGLE_MEEP=y +CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="Vorticon" +CONFIG_NEED_IFWI=y +CONFIG_IFWI_FILE_NAME="3rdparty/blobs/mainboard/google/octopus/meep/ifwi.bin" +CONFIG_HAVE_IFD_BIN=y +CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS=y +CONFIG_CPU_UCODE_BINARIES="3rdparty/blobs/mainboard/google/octopus/meep/cpu_microcode_blob.bin" +CONFIG_EC_GOOGLE_CHROMEEC_FIRMWARE_EXTERNAL=y +CONFIG_EC_GOOGLE_CHROMEEC_FIRMWARE_FILE="3rdparty/blobs/mainboard/google/octopus/meep/ec.RW.flat" +CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION=y +CONFIG_ADD_FSP_BINARIES=y diff --git a/configs/glk/config.vortininja.uefi b/configs/glk/config.vortininja.uefi new file mode 100644 index 00000000000..609c2aa06a1 --- /dev/null +++ b/configs/glk/config.vortininja.uefi @@ -0,0 +1,17 @@ +CONFIG_LOCALVERSION="MrChromebox-4.19" +CONFIG_VENDOR_GOOGLE=y +CONFIG_NO_POST=y +# CONFIG_CONSOLE_SERIAL is not set +CONFIG_INCLUDE_NHLT_BLOBS=y +CONFIG_IFD_BIN_PATH="3rdparty/blobs/mainboard/google/octopus/meep/flashdescriptor.bin" +CONFIG_BOARD_GOOGLE_MEEP=y +CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="Vortininja" +CONFIG_NEED_IFWI=y +CONFIG_IFWI_FILE_NAME="3rdparty/blobs/mainboard/google/octopus/meep/ifwi.bin" +CONFIG_HAVE_IFD_BIN=y +CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS=y +CONFIG_CPU_UCODE_BINARIES="3rdparty/blobs/mainboard/google/octopus/meep/cpu_microcode_blob.bin" +CONFIG_EC_GOOGLE_CHROMEEC_FIRMWARE_EXTERNAL=y +CONFIG_EC_GOOGLE_CHROMEEC_FIRMWARE_FILE="3rdparty/blobs/mainboard/google/octopus/meep/ec.RW.flat" +CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION=y +CONFIG_ADD_FSP_BINARIES=y diff --git a/configs/hsw/config.falco.uefi b/configs/hsw/config.falco.uefi new file mode 100644 index 00000000000..3d3b436fcb8 --- /dev/null +++ b/configs/hsw/config.falco.uefi @@ -0,0 +1,19 @@ +CONFIG_LOCALVERSION="MrChromebox-4.19" +CONFIG_VENDOR_GOOGLE=y +CONFIG_NO_POST=y +CONFIG_CBFS_SIZE=0x250000 +CONFIG_IFD_BIN_PATH="3rdparty/blobs/soc/intel/hsw/book/flashdescriptor.bin" +CONFIG_ME_BIN_PATH="3rdparty/blobs/soc/intel/hsw/book/me.bin" +CONFIG_BOARD_GOOGLE_FALCO=y +CONFIG_HAVE_IFD_BIN=y +# CONFIG_DRIVERS_UART_8250IO is not set +CONFIG_HAVE_MRC=y +CONFIG_MRC_FILE="3rdparty/blobs/soc/intel/hsw/book/mrc.bin" +CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS=y +CONFIG_CPU_UCODE_BINARIES="3rdparty/blobs/soc/intel/hsw/cpu_microcode_blob.bin" +CONFIG_EC_GOOGLE_CHROMEEC_FIRMWARE_EXTERNAL=y +CONFIG_EC_GOOGLE_CHROMEEC_FIRMWARE_FILE="3rdparty/blobs/mainboard/google/slippy/falco/ec.RW.flat" +CONFIG_HAVE_ME_BIN=y +CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION=y +CONFIG_NO_GFX_INIT=y +CONFIG_EDK2_GOP_DRIVER=y diff --git a/configs/hsw/config.leon.uefi b/configs/hsw/config.leon.uefi new file mode 100644 index 00000000000..3e883ac01bc --- /dev/null +++ b/configs/hsw/config.leon.uefi @@ -0,0 +1,19 @@ +CONFIG_LOCALVERSION="MrChromebox-4.19" +CONFIG_VENDOR_GOOGLE=y +CONFIG_NO_POST=y +CONFIG_CBFS_SIZE=0x250000 +CONFIG_IFD_BIN_PATH="3rdparty/blobs/soc/intel/hsw/book/flashdescriptor.bin" +CONFIG_ME_BIN_PATH="3rdparty/blobs/soc/intel/hsw/book/me.bin" +CONFIG_BOARD_GOOGLE_LEON=y +CONFIG_HAVE_IFD_BIN=y +# CONFIG_DRIVERS_UART_8250IO is not set +CONFIG_HAVE_MRC=y +CONFIG_MRC_FILE="3rdparty/blobs/soc/intel/hsw/book/mrc.bin" +CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS=y +CONFIG_CPU_UCODE_BINARIES="3rdparty/blobs/soc/intel/hsw/cpu_microcode_blob.bin" +CONFIG_EC_GOOGLE_CHROMEEC_FIRMWARE_EXTERNAL=y +CONFIG_EC_GOOGLE_CHROMEEC_FIRMWARE_FILE="3rdparty/blobs/mainboard/google/slippy/leon/ec.RW.flat" +CONFIG_HAVE_ME_BIN=y +CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION=y +CONFIG_NO_GFX_INIT=y +CONFIG_EDK2_GOP_DRIVER=y diff --git a/configs/hsw/config.mccloud.uefi b/configs/hsw/config.mccloud.uefi new file mode 100644 index 00000000000..9f09b3e6378 --- /dev/null +++ b/configs/hsw/config.mccloud.uefi @@ -0,0 +1,19 @@ +CONFIG_LOCALVERSION="MrChromebox-4.19" +CONFIG_VENDOR_GOOGLE=y +CONFIG_NO_POST=y +CONFIG_CBFS_SIZE=0x250000 +CONFIG_IFD_BIN_PATH="3rdparty/blobs/soc/intel/hsw/box/flashdescriptor.bin" +CONFIG_ME_BIN_PATH="3rdparty/blobs/soc/intel/hsw/box/me.bin" +CONFIG_BOARD_GOOGLE_MCCLOUD=y +CONFIG_EDK2_BOOT_TIMEOUT=5 +CONFIG_HAVE_IFD_BIN=y +# CONFIG_DRIVERS_UART_8250IO is not set +CONFIG_POWER_STATE_PREVIOUS_AFTER_FAILURE=y +CONFIG_HAVE_MRC=y +CONFIG_MRC_FILE="3rdparty/blobs/soc/intel/hsw/box/mrc.bin" +CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS=y +CONFIG_CPU_UCODE_BINARIES="3rdparty/blobs/soc/intel/hsw/cpu_microcode_blob.bin" +CONFIG_HAVE_ME_BIN=y +CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION=y +CONFIG_NO_GFX_INIT=y +CONFIG_EDK2_GOP_DRIVER=y diff --git a/configs/hsw/config.monroe.uefi b/configs/hsw/config.monroe.uefi new file mode 100644 index 00000000000..6096bf22c16 --- /dev/null +++ b/configs/hsw/config.monroe.uefi @@ -0,0 +1,19 @@ +CONFIG_LOCALVERSION="MrChromebox-4.19" +CONFIG_VENDOR_GOOGLE=y +CONFIG_NO_POST=y +CONFIG_CBFS_SIZE=0x250000 +CONFIG_IFD_BIN_PATH="3rdparty/blobs/soc/intel/hsw/box/flashdescriptor.bin" +CONFIG_ME_BIN_PATH="3rdparty/blobs/soc/intel/hsw/box/me.bin" +CONFIG_BOARD_GOOGLE_MONROE=y +CONFIG_EDK2_BOOT_TIMEOUT=5 +CONFIG_HAVE_IFD_BIN=y +# CONFIG_DRIVERS_UART_8250IO is not set +CONFIG_POWER_STATE_PREVIOUS_AFTER_FAILURE=y +CONFIG_HAVE_MRC=y +CONFIG_MRC_FILE="3rdparty/blobs/soc/intel/hsw/box/mrc.bin" +CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS=y +CONFIG_CPU_UCODE_BINARIES="3rdparty/blobs/soc/intel/hsw/cpu_microcode_blob.bin" +CONFIG_HAVE_ME_BIN=y +CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION=y +CONFIG_NO_GFX_INIT=y +CONFIG_EDK2_GOP_DRIVER=y diff --git a/configs/hsw/config.panther.uefi b/configs/hsw/config.panther.uefi new file mode 100644 index 00000000000..3195dc97ad6 --- /dev/null +++ b/configs/hsw/config.panther.uefi @@ -0,0 +1,20 @@ +CONFIG_LOCALVERSION="MrChromebox-4.19" +CONFIG_VENDOR_GOOGLE=y +CONFIG_NO_POST=y +CONFIG_CBFS_SIZE=0x250000 +CONFIG_INTEL_GMA_VBT_FILE="3rdparty/blobs/soc/intel/hsw/box/vbt.bin" +CONFIG_IFD_BIN_PATH="3rdparty/blobs/soc/intel/hsw/box/flashdescriptor.bin" +CONFIG_ME_BIN_PATH="3rdparty/blobs/soc/intel/hsw/box/me.bin" +CONFIG_BOARD_GOOGLE_PANTHER=y +CONFIG_EDK2_BOOT_TIMEOUT=5 +CONFIG_HAVE_IFD_BIN=y +# CONFIG_DRIVERS_UART_8250IO is not set +CONFIG_POWER_STATE_PREVIOUS_AFTER_FAILURE=y +CONFIG_HAVE_MRC=y +CONFIG_MRC_FILE="3rdparty/blobs/soc/intel/hsw/box/mrc.bin" +CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS=y +CONFIG_CPU_UCODE_BINARIES="3rdparty/blobs/soc/intel/hsw/cpu_microcode_blob.bin" +CONFIG_HAVE_ME_BIN=y +CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION=y +CONFIG_NO_GFX_INIT=y +CONFIG_EDK2_GOP_DRIVER=y diff --git a/configs/hsw/config.peppy.uefi b/configs/hsw/config.peppy.uefi new file mode 100644 index 00000000000..9661cae2909 --- /dev/null +++ b/configs/hsw/config.peppy.uefi @@ -0,0 +1,19 @@ +CONFIG_LOCALVERSION="MrChromebox-4.19" +CONFIG_VENDOR_GOOGLE=y +CONFIG_NO_POST=y +CONFIG_CBFS_SIZE=0x250000 +CONFIG_IFD_BIN_PATH="3rdparty/blobs/soc/intel/hsw/book/flashdescriptor.bin" +CONFIG_ME_BIN_PATH="3rdparty/blobs/soc/intel/hsw/book/me.bin" +CONFIG_BOARD_GOOGLE_PEPPY=y +CONFIG_HAVE_IFD_BIN=y +# CONFIG_DRIVERS_UART_8250IO is not set +CONFIG_HAVE_MRC=y +CONFIG_MRC_FILE="3rdparty/blobs/soc/intel/hsw/book/mrc.bin" +CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS=y +CONFIG_CPU_UCODE_BINARIES="3rdparty/blobs/soc/intel/hsw/cpu_microcode_blob.bin" +CONFIG_EC_GOOGLE_CHROMEEC_FIRMWARE_EXTERNAL=y +CONFIG_EC_GOOGLE_CHROMEEC_FIRMWARE_FILE="3rdparty/blobs/mainboard/google/slippy/peppy/ec.RW.flat" +CONFIG_HAVE_ME_BIN=y +CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION=y +CONFIG_NO_GFX_INIT=y +CONFIG_EDK2_GOP_DRIVER=y diff --git a/configs/hsw/config.tricky.uefi b/configs/hsw/config.tricky.uefi new file mode 100644 index 00000000000..ccb6505a7fc --- /dev/null +++ b/configs/hsw/config.tricky.uefi @@ -0,0 +1,19 @@ +CONFIG_LOCALVERSION="MrChromebox-4.19" +CONFIG_VENDOR_GOOGLE=y +CONFIG_NO_POST=y +CONFIG_CBFS_SIZE=0x250000 +CONFIG_IFD_BIN_PATH="3rdparty/blobs/soc/intel/hsw/box/flashdescriptor.bin" +CONFIG_ME_BIN_PATH="3rdparty/blobs/soc/intel/hsw/box/me.bin" +CONFIG_BOARD_GOOGLE_TRICKY=y +CONFIG_EDK2_BOOT_TIMEOUT=5 +CONFIG_HAVE_IFD_BIN=y +# CONFIG_DRIVERS_UART_8250IO is not set +CONFIG_POWER_STATE_PREVIOUS_AFTER_FAILURE=y +CONFIG_HAVE_MRC=y +CONFIG_MRC_FILE="3rdparty/blobs/soc/intel/hsw/box/mrc.bin" +CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS=y +CONFIG_CPU_UCODE_BINARIES="3rdparty/blobs/soc/intel/hsw/cpu_microcode_blob.bin" +CONFIG_HAVE_ME_BIN=y +CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION=y +CONFIG_NO_GFX_INIT=y +CONFIG_EDK2_GOP_DRIVER=y diff --git a/configs/hsw/config.wolf.uefi b/configs/hsw/config.wolf.uefi new file mode 100644 index 00000000000..f9fe039a171 --- /dev/null +++ b/configs/hsw/config.wolf.uefi @@ -0,0 +1,19 @@ +CONFIG_LOCALVERSION="MrChromebox-4.19" +CONFIG_VENDOR_GOOGLE=y +CONFIG_NO_POST=y +CONFIG_CBFS_SIZE=0x250000 +CONFIG_IFD_BIN_PATH="3rdparty/blobs/soc/intel/hsw/book/flashdescriptor.bin" +CONFIG_ME_BIN_PATH="3rdparty/blobs/soc/intel/hsw/book/me.bin" +CONFIG_BOARD_GOOGLE_WOLF=y +CONFIG_HAVE_IFD_BIN=y +# CONFIG_DRIVERS_UART_8250IO is not set +CONFIG_HAVE_MRC=y +CONFIG_MRC_FILE="3rdparty/blobs/soc/intel/hsw/book/mrc.bin" +CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS=y +CONFIG_CPU_UCODE_BINARIES="3rdparty/blobs/soc/intel/hsw/cpu_microcode_blob.bin" +CONFIG_EC_GOOGLE_CHROMEEC_FIRMWARE_EXTERNAL=y +CONFIG_EC_GOOGLE_CHROMEEC_FIRMWARE_FILE="3rdparty/blobs/mainboard/google/slippy/wolf/ec.RW.flat" +CONFIG_HAVE_ME_BIN=y +CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION=y +CONFIG_NO_GFX_INIT=y +CONFIG_EDK2_GOP_DRIVER=y diff --git a/configs/hsw/config.zako.uefi b/configs/hsw/config.zako.uefi new file mode 100644 index 00000000000..58efd9b500a --- /dev/null +++ b/configs/hsw/config.zako.uefi @@ -0,0 +1,19 @@ +CONFIG_LOCALVERSION="MrChromebox-4.19" +CONFIG_VENDOR_GOOGLE=y +CONFIG_NO_POST=y +CONFIG_CBFS_SIZE=0x250000 +CONFIG_IFD_BIN_PATH="3rdparty/blobs/soc/intel/hsw/box/flashdescriptor.bin" +CONFIG_ME_BIN_PATH="3rdparty/blobs/soc/intel/hsw/box/me.bin" +CONFIG_BOARD_GOOGLE_ZAKO=y +CONFIG_EDK2_BOOT_TIMEOUT=5 +CONFIG_HAVE_IFD_BIN=y +# CONFIG_DRIVERS_UART_8250IO is not set +CONFIG_POWER_STATE_PREVIOUS_AFTER_FAILURE=y +CONFIG_HAVE_MRC=y +CONFIG_MRC_FILE="3rdparty/blobs/soc/intel/hsw/box/mrc.bin" +CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS=y +CONFIG_CPU_UCODE_BINARIES="3rdparty/blobs/soc/intel/hsw/cpu_microcode_blob.bin" +CONFIG_HAVE_ME_BIN=y +CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION=y +CONFIG_NO_GFX_INIT=y +CONFIG_EDK2_GOP_DRIVER=y diff --git a/configs/jsl/config.bugzzy.uefi b/configs/jsl/config.bugzzy.uefi new file mode 100644 index 00000000000..0b442a027ac --- /dev/null +++ b/configs/jsl/config.bugzzy.uefi @@ -0,0 +1,19 @@ +CONFIG_LOCALVERSION="MrChromebox-4.19" +CONFIG_VENDOR_GOOGLE=y +CONFIG_NO_POST=y +CONFIG_CBFS_SIZE=0x450000 +# CONFIG_CONSOLE_SERIAL is not set +CONFIG_INTEL_GMA_VBT_FILE="3rdparty/blobs/mainboard/google/dedede/bugzzy/vbt.bin" +CONFIG_IFD_BIN_PATH="3rdparty/blobs/mainboard/google/dedede/bugzzy/flashdescriptor.bin" +CONFIG_ME_BIN_PATH="3rdparty/blobs/mainboard/google/dedede/bugzzy/me.bin" +CONFIG_BOARD_GOOGLE_BUGZZY=y +CONFIG_HAVE_IFD_BIN=y +CONFIG_FSP_M_FILE="3rdparty/blobs/mainboard/google/dedede/bugzzy/fspm.bin" +CONFIG_FSP_S_FILE="3rdparty/blobs/mainboard/google/dedede/bugzzy/fsps.bin" +CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS=y +CONFIG_CPU_UCODE_BINARIES="3rdparty/blobs/mainboard/google/dedede/bugzzy/cpu_microcode_blob.bin" +CONFIG_HAVE_ME_BIN=y +CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION=y +CONFIG_RUN_FSP_GOP=y +# CONFIG_SET_GOP_DRIVER_VERSION is not set +CONFIG_ADD_FSP_BINARIES=y diff --git a/configs/jsl/config.drawcia.uefi b/configs/jsl/config.drawcia.uefi new file mode 100644 index 00000000000..2e9b57e1c31 --- /dev/null +++ b/configs/jsl/config.drawcia.uefi @@ -0,0 +1,17 @@ +CONFIG_LOCALVERSION="MrChromebox-4.19" +CONFIG_VENDOR_GOOGLE=y +CONFIG_NO_POST=y +CONFIG_CBFS_SIZE=0x450000 +# CONFIG_CONSOLE_SERIAL is not set +CONFIG_IFD_BIN_PATH="3rdparty/blobs/mainboard/google/dedede/drawcia/flashdescriptor.bin" +CONFIG_ME_BIN_PATH="3rdparty/blobs/mainboard/google/dedede/drawcia/me.bin" +CONFIG_BOARD_GOOGLE_DRAWCIA=y +CONFIG_HAVE_IFD_BIN=y +CONFIG_FSP_M_FILE="3rdparty/blobs/mainboard/google/dedede/drawcia/fspm.bin" +CONFIG_FSP_S_FILE="3rdparty/blobs/mainboard/google/dedede/drawcia/fsps.bin" +CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS=y +CONFIG_CPU_UCODE_BINARIES="3rdparty/blobs/mainboard/google/dedede/drawcia/cpu_microcode_blob.bin" +CONFIG_HAVE_ME_BIN=y +CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION=y +# CONFIG_SET_GOP_DRIVER_VERSION is not set +CONFIG_ADD_FSP_BINARIES=y diff --git a/configs/jsl/config.drawlat.uefi b/configs/jsl/config.drawlat.uefi new file mode 100644 index 00000000000..2a9e06aae92 --- /dev/null +++ b/configs/jsl/config.drawlat.uefi @@ -0,0 +1,18 @@ +CONFIG_LOCALVERSION="MrChromebox-4.19" +CONFIG_VENDOR_GOOGLE=y +CONFIG_NO_POST=y +CONFIG_CBFS_SIZE=0x450000 +# CONFIG_CONSOLE_SERIAL is not set +CONFIG_IFD_BIN_PATH="3rdparty/blobs/mainboard/google/dedede/drawcia/flashdescriptor.bin" +CONFIG_ME_BIN_PATH="3rdparty/blobs/mainboard/google/dedede/drawcia/me.bin" +CONFIG_BOARD_GOOGLE_DRAWCIA=y +CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="Drawlat" +CONFIG_HAVE_IFD_BIN=y +CONFIG_FSP_M_FILE="3rdparty/blobs/mainboard/google/dedede/drawcia/fspm.bin" +CONFIG_FSP_S_FILE="3rdparty/blobs/mainboard/google/dedede/drawcia/fsps.bin" +CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS=y +CONFIG_CPU_UCODE_BINARIES="3rdparty/blobs/mainboard/google/dedede/drawcia/cpu_microcode_blob.bin" +CONFIG_HAVE_ME_BIN=y +CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION=y +# CONFIG_SET_GOP_DRIVER_VERSION is not set +CONFIG_ADD_FSP_BINARIES=y diff --git a/configs/jsl/config.drawman.uefi b/configs/jsl/config.drawman.uefi new file mode 100644 index 00000000000..63efce894b9 --- /dev/null +++ b/configs/jsl/config.drawman.uefi @@ -0,0 +1,18 @@ +CONFIG_LOCALVERSION="MrChromebox-4.19" +CONFIG_VENDOR_GOOGLE=y +CONFIG_NO_POST=y +CONFIG_CBFS_SIZE=0x450000 +# CONFIG_CONSOLE_SERIAL is not set +CONFIG_IFD_BIN_PATH="3rdparty/blobs/mainboard/google/dedede/drawcia/flashdescriptor.bin" +CONFIG_ME_BIN_PATH="3rdparty/blobs/mainboard/google/dedede/drawcia/me.bin" +CONFIG_BOARD_GOOGLE_DRAWCIA=y +CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="Drawman" +CONFIG_HAVE_IFD_BIN=y +CONFIG_FSP_M_FILE="3rdparty/blobs/mainboard/google/dedede/drawcia/fspm.bin" +CONFIG_FSP_S_FILE="3rdparty/blobs/mainboard/google/dedede/drawcia/fsps.bin" +CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS=y +CONFIG_CPU_UCODE_BINARIES="3rdparty/blobs/mainboard/google/dedede/drawcia/cpu_microcode_blob.bin" +CONFIG_HAVE_ME_BIN=y +CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION=y +# CONFIG_SET_GOP_DRIVER_VERSION is not set +CONFIG_ADD_FSP_BINARIES=y diff --git a/configs/jsl/config.lantis.uefi b/configs/jsl/config.lantis.uefi new file mode 100644 index 00000000000..e615096d9b8 --- /dev/null +++ b/configs/jsl/config.lantis.uefi @@ -0,0 +1,19 @@ +CONFIG_LOCALVERSION="MrChromebox-4.19" +CONFIG_VENDOR_GOOGLE=y +CONFIG_NO_POST=y +CONFIG_CBFS_SIZE=0x450000 +# CONFIG_CONSOLE_SERIAL is not set +CONFIG_INTEL_GMA_VBT_FILE="3rdparty/blobs/mainboard/google/dedede/lantis/vbt.bin" +CONFIG_IFD_BIN_PATH="3rdparty/blobs/mainboard/google/dedede/lantis/flashdescriptor.bin" +CONFIG_ME_BIN_PATH="3rdparty/blobs/mainboard/google/dedede/lantis/me.bin" +CONFIG_BOARD_GOOGLE_LANTIS=y +CONFIG_HAVE_IFD_BIN=y +CONFIG_FSP_M_FILE="3rdparty/blobs/mainboard/google/dedede/lantis/fspm.bin" +CONFIG_FSP_S_FILE="3rdparty/blobs/mainboard/google/dedede/lantis/fsps.bin" +CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS=y +CONFIG_CPU_UCODE_BINARIES="3rdparty/blobs/mainboard/google/dedede/lantis/cpu_microcode_blob.bin" +CONFIG_HAVE_ME_BIN=y +CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION=y +CONFIG_RUN_FSP_GOP=y +# CONFIG_SET_GOP_DRIVER_VERSION is not set +CONFIG_ADD_FSP_BINARIES=y diff --git a/configs/jsl/config.magpie.uefi b/configs/jsl/config.magpie.uefi new file mode 100644 index 00000000000..208f3dfe3b9 --- /dev/null +++ b/configs/jsl/config.magpie.uefi @@ -0,0 +1,18 @@ +CONFIG_LOCALVERSION="MrChromebox-4.19" +CONFIG_VENDOR_GOOGLE=y +CONFIG_NO_POST=y +CONFIG_CBFS_SIZE=0x450000 +# CONFIG_CONSOLE_SERIAL is not set +CONFIG_IFD_BIN_PATH="3rdparty/blobs/mainboard/google/dedede/magpie/flashdescriptor.bin" +CONFIG_ME_BIN_PATH="3rdparty/blobs/mainboard/google/dedede/magpie/me.bin" +CONFIG_BOARD_GOOGLE_MAGOLOR=y +CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="Magpie" +CONFIG_HAVE_IFD_BIN=y +CONFIG_FSP_M_FILE="3rdparty/blobs/mainboard/google/dedede/magpie/fspm.bin" +CONFIG_FSP_S_FILE="3rdparty/blobs/mainboard/google/dedede/magpie/fsps.bin" +CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS=y +CONFIG_CPU_UCODE_BINARIES="3rdparty/blobs/mainboard/google/dedede/magpie/cpu_microcode_blob.bin" +CONFIG_HAVE_ME_BIN=y +CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION=y +# CONFIG_SET_GOP_DRIVER_VERSION is not set +CONFIG_ADD_FSP_BINARIES=y diff --git a/configs/kbl/config.atlas.uefi b/configs/kbl/config.atlas.uefi new file mode 100644 index 00000000000..d063c1b37ad --- /dev/null +++ b/configs/kbl/config.atlas.uefi @@ -0,0 +1,16 @@ +CONFIG_LOCALVERSION="MrChromebox-4.19" +CONFIG_VENDOR_GOOGLE=y +CONFIG_NO_POST=y +CONFIG_CBFS_SIZE=0x450000 +# CONFIG_CONSOLE_SERIAL is not set +CONFIG_LINEAR_FRAMEBUFFER_MAX_HEIGHT=1080 +CONFIG_LINEAR_FRAMEBUFFER_MAX_WIDTH=1920 +CONFIG_IFD_BIN_PATH="3rdparty/blobs/mainboard/google/poppy/atlas/flashdescriptor.bin" +CONFIG_ME_BIN_PATH="3rdparty/blobs/mainboard/google/poppy/atlas/me.bin" +CONFIG_BOARD_GOOGLE_ATLAS=y +CONFIG_INCLUDE_NHLT_BLOBS_ATLAS=y +CONFIG_HAVE_IFD_BIN=y +CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS=y +CONFIG_CPU_UCODE_BINARIES="3rdparty/blobs/soc/intel/kbl/cpu_microcode_blob.bin" +CONFIG_HAVE_ME_BIN=y +CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION=y diff --git a/configs/kbl/config.eve.uefi b/configs/kbl/config.eve.uefi new file mode 100644 index 00000000000..0a4c439dc96 --- /dev/null +++ b/configs/kbl/config.eve.uefi @@ -0,0 +1,17 @@ +CONFIG_LOCALVERSION="MrChromebox-4.19" +CONFIG_VENDOR_GOOGLE=y +CONFIG_NO_POST=y +CONFIG_CBFS_SIZE=0x450000 +# CONFIG_CONSOLE_SERIAL is not set +CONFIG_INCLUDE_NHLT_BLOBS=y +CONFIG_IFD_BIN_PATH="3rdparty/blobs/mainboard/google/eve/flashdescriptor.bin" +CONFIG_ME_BIN_PATH="3rdparty/blobs/mainboard/google/eve/me.bin" +CONFIG_BOARD_GOOGLE_EVE=y +CONFIG_HAVE_IFD_BIN=y +CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS=y +CONFIG_CPU_UCODE_BINARIES="3rdparty/blobs/soc/intel/kbl/cpu_microcode_blob.bin" +CONFIG_EC_GOOGLE_CHROMEEC_FIRMWARE_EXTERNAL=y +CONFIG_EC_GOOGLE_CHROMEEC_FIRMWARE_FILE="3rdparty/blobs/mainboard/google/eve/ec.RW.flat" +CONFIG_HAVE_ME_BIN=y +CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION=y +CONFIG_RUN_FSP_GOP=y diff --git a/configs/kbl/config.fizz.uefi b/configs/kbl/config.fizz.uefi new file mode 100644 index 00000000000..38854a04177 --- /dev/null +++ b/configs/kbl/config.fizz.uefi @@ -0,0 +1,17 @@ +CONFIG_LOCALVERSION="MrChromebox-4.19" +CONFIG_VENDOR_GOOGLE=y +CONFIG_NO_POST=y +CONFIG_CBFS_SIZE=0x450000 +# CONFIG_CONSOLE_SERIAL is not set +CONFIG_INCLUDE_NHLT_BLOBS=y +CONFIG_IFD_BIN_PATH="3rdparty/blobs/mainboard/google/fizz/flashdescriptor.bin" +CONFIG_ME_BIN_PATH="3rdparty/blobs/mainboard/google/fizz/me.bin" +CONFIG_BOARD_GOOGLE_FIZZ=y +CONFIG_EDK2_BOOT_TIMEOUT=5 +CONFIG_HAVE_IFD_BIN=y +CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS=y +CONFIG_CPU_UCODE_BINARIES="3rdparty/blobs/soc/intel/kbl/cpu_microcode_blob.bin" +CONFIG_EC_GOOGLE_CHROMEEC_FIRMWARE_EXTERNAL=y +CONFIG_EC_GOOGLE_CHROMEEC_FIRMWARE_FILE="3rdparty/blobs/mainboard/google/fizz/ec.RW.flat" +CONFIG_HAVE_ME_BIN=y +CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION=y diff --git a/configs/kbl/config.karma.uefi b/configs/kbl/config.karma.uefi new file mode 100644 index 00000000000..3dfaaf1193e --- /dev/null +++ b/configs/kbl/config.karma.uefi @@ -0,0 +1,15 @@ +CONFIG_LOCALVERSION="MrChromebox-4.19" +CONFIG_VENDOR_GOOGLE=y +CONFIG_NO_POST=y +CONFIG_CBFS_SIZE=0x450000 +# CONFIG_CONSOLE_SERIAL is not set +CONFIG_INCLUDE_NHLT_BLOBS=y +CONFIG_IFD_BIN_PATH="3rdparty/blobs/mainboard/google/fizz/karma/flashdescriptor.bin" +CONFIG_ME_BIN_PATH="3rdparty/blobs/mainboard/google/fizz/karma/me.bin" +CONFIG_BOARD_GOOGLE_KARMA=y +CONFIG_EDK2_BOOT_TIMEOUT=5 +CONFIG_HAVE_IFD_BIN=y +CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS=y +CONFIG_CPU_UCODE_BINARIES="3rdparty/blobs/soc/intel/kbl/cpu_microcode_blob.bin" +CONFIG_HAVE_ME_BIN=y +CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION=y diff --git a/configs/kbl/config.leona.uefi b/configs/kbl/config.leona.uefi new file mode 100644 index 00000000000..b07518b40d6 --- /dev/null +++ b/configs/kbl/config.leona.uefi @@ -0,0 +1,15 @@ +CONFIG_LOCALVERSION="MrChromebox-4.19" +CONFIG_VENDOR_GOOGLE=y +CONFIG_NO_POST=y +CONFIG_CBFS_SIZE=0x450000 +# CONFIG_CONSOLE_SERIAL is not set +CONFIG_IFD_BIN_PATH="3rdparty/blobs/mainboard/google/poppy/rammus/flashdescriptor.bin" +CONFIG_ME_BIN_PATH="3rdparty/blobs/mainboard/google/poppy/rammus/me.bin" +CONFIG_BOARD_GOOGLE_RAMMUS=y +CONFIG_INCLUDE_NHLT_BLOBS_RAMMUS=y +CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="Leona" +CONFIG_HAVE_IFD_BIN=y +CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS=y +CONFIG_CPU_UCODE_BINARIES="3rdparty/blobs/soc/intel/kbl/cpu_microcode_blob.bin" +CONFIG_HAVE_ME_BIN=y +CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION=y diff --git a/configs/kbl/config.librem_13v4.uefi b/configs/kbl/config.librem_13v4.uefi new file mode 100644 index 00000000000..f9f28f11b3c --- /dev/null +++ b/configs/kbl/config.librem_13v4.uefi @@ -0,0 +1,10 @@ +CONFIG_LOCALVERSION="MrChromebox-4.19" +CONFIG_VENDOR_PURISM=y +CONFIG_CBFS_SIZE=0xe00000 +CONFIG_IFD_BIN_PATH="3rdparty/purism-blobs/mainboard/purism/librem_kbl/descriptor.bin" +CONFIG_ME_BIN_PATH="3rdparty/purism-blobs/mainboard/purism/librem_kbl/me.bin" +CONFIG_HAVE_IFD_BIN=y +CONFIG_BOARD_PURISM_LIBREM13_V4=y +CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS=y +CONFIG_CPU_UCODE_BINARIES="3rdparty/purism-blobs/mainboard/purism/librem_kbl/cpu_microcode_blob.bin" +CONFIG_HAVE_ME_BIN=y diff --git a/configs/kbl/config.librem_15v4.uefi b/configs/kbl/config.librem_15v4.uefi new file mode 100644 index 00000000000..31aa5930e5e --- /dev/null +++ b/configs/kbl/config.librem_15v4.uefi @@ -0,0 +1,12 @@ +CONFIG_LOCALVERSION="MrChromebox-4.19" +CONFIG_VENDOR_PURISM=y +CONFIG_CBFS_SIZE=0xe00000 +CONFIG_LINEAR_FRAMEBUFFER_MAX_HEIGHT=1080 +CONFIG_LINEAR_FRAMEBUFFER_MAX_WIDTH=1920 +CONFIG_IFD_BIN_PATH="3rdparty/purism-blobs/mainboard/purism/librem_kbl/descriptor.bin" +CONFIG_ME_BIN_PATH="3rdparty/purism-blobs/mainboard/purism/librem_kbl/me.bin" +CONFIG_HAVE_IFD_BIN=y +CONFIG_BOARD_PURISM_LIBREM15_V4=y +CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS=y +CONFIG_CPU_UCODE_BINARIES="3rdparty/purism-blobs/mainboard/purism/librem_kbl/cpu_microcode_blob.bin" +CONFIG_HAVE_ME_BIN=y diff --git a/configs/kbl/config.nami.uefi b/configs/kbl/config.nami.uefi new file mode 100644 index 00000000000..94cf9294f40 --- /dev/null +++ b/configs/kbl/config.nami.uefi @@ -0,0 +1,15 @@ +CONFIG_LOCALVERSION="MrChromebox-4.19" +CONFIG_VENDOR_GOOGLE=y +CONFIG_NO_POST=y +CONFIG_CBFS_SIZE=0x450000 +# CONFIG_CONSOLE_SERIAL is not set +CONFIG_IFD_BIN_PATH="3rdparty/blobs/mainboard/google/poppy/nami/flashdescriptor.bin" +CONFIG_ME_BIN_PATH="3rdparty/blobs/mainboard/google/poppy/nami/me.bin" +CONFIG_BOARD_GOOGLE_NAMI=y +CONFIG_OEM_BIN_FILE="3rdparty/blobs/mainboard/google/poppy/nami/oem.bin" +CONFIG_INCLUDE_NHLT_BLOBS_NAMI=y +CONFIG_HAVE_IFD_BIN=y +CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS=y +CONFIG_CPU_UCODE_BINARIES="3rdparty/blobs/soc/intel/kbl/cpu_microcode_blob.bin" +CONFIG_HAVE_ME_BIN=y +CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION=y diff --git a/configs/kbl/config.nautilus.uefi b/configs/kbl/config.nautilus.uefi new file mode 100644 index 00000000000..94ce9d3efce --- /dev/null +++ b/configs/kbl/config.nautilus.uefi @@ -0,0 +1,14 @@ +CONFIG_LOCALVERSION="MrChromebox-4.19" +CONFIG_VENDOR_GOOGLE=y +CONFIG_NO_POST=y +CONFIG_CBFS_SIZE=0x450000 +# CONFIG_CONSOLE_SERIAL is not set +CONFIG_IFD_BIN_PATH="3rdparty/blobs/mainboard/google/poppy/nautilus/flashdescriptor.bin" +CONFIG_ME_BIN_PATH="3rdparty/blobs/mainboard/google/poppy/nautilus/me.bin" +CONFIG_BOARD_GOOGLE_NAUTILUS=y +CONFIG_INCLUDE_NHLT_BLOBS_NAUTILUS=y +CONFIG_HAVE_IFD_BIN=y +CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS=y +CONFIG_CPU_UCODE_BINARIES="3rdparty/blobs/soc/intel/kbl/cpu_microcode_blob.bin" +CONFIG_HAVE_ME_BIN=y +CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION=y diff --git a/configs/kbl/config.nocturne.uefi b/configs/kbl/config.nocturne.uefi new file mode 100644 index 00000000000..803e8e83e1f --- /dev/null +++ b/configs/kbl/config.nocturne.uefi @@ -0,0 +1,14 @@ +CONFIG_LOCALVERSION="MrChromebox-4.19" +CONFIG_VENDOR_GOOGLE=y +CONFIG_NO_POST=y +CONFIG_CBFS_SIZE=0x450000 +# CONFIG_CONSOLE_SERIAL is not set +CONFIG_IFD_BIN_PATH="3rdparty/blobs/mainboard/google/poppy/nocturne/flashdescriptor.bin" +CONFIG_ME_BIN_PATH="3rdparty/blobs/mainboard/google/poppy/nocturne/me.bin" +CONFIG_BOARD_GOOGLE_NOCTURNE=y +CONFIG_INCLUDE_NHLT_BLOBS_NOCTURNE=y +CONFIG_HAVE_IFD_BIN=y +CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS=y +CONFIG_CPU_UCODE_BINARIES="3rdparty/blobs/soc/intel/kbl/cpu_microcode_blob.bin" +CONFIG_HAVE_ME_BIN=y +CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION=y diff --git a/configs/kbl/config.shyvana.uefi b/configs/kbl/config.shyvana.uefi new file mode 100644 index 00000000000..9dbfa6d02f6 --- /dev/null +++ b/configs/kbl/config.shyvana.uefi @@ -0,0 +1,15 @@ +CONFIG_LOCALVERSION="MrChromebox-4.19" +CONFIG_VENDOR_GOOGLE=y +CONFIG_CBFS_SIZE=0x450000 +# CONFIG_CONSOLE_SERIAL is not set +CONFIG_IFD_BIN_PATH="3rdparty/blobs/mainboard/google/poppy/rammus/flashdescriptor.bin" +CONFIG_ME_BIN_PATH="3rdparty/blobs/mainboard/google/poppy/rammus/me.bin" +CONFIG_BOARD_GOOGLE_RAMMUS=y +CONFIG_INCLUDE_NHLT_BLOBS_RAMMUS=y +CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="Shyvana" +CONFIG_HAVE_IFD_BIN=y +CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS=y +CONFIG_CPU_UCODE_BINARIES="3rdparty/blobs/soc/intel/kbl/cpu_microcode_blob.bin" +CONFIG_HAVE_ME_BIN=y +CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION=y +CONFIG_POST_IO_PORT=0x80 diff --git a/configs/kbl/config.soraka.uefi b/configs/kbl/config.soraka.uefi new file mode 100644 index 00000000000..40f88a70949 --- /dev/null +++ b/configs/kbl/config.soraka.uefi @@ -0,0 +1,15 @@ +CONFIG_LOCALVERSION="MrChromebox-4.19" +CONFIG_VENDOR_GOOGLE=y +CONFIG_NO_POST=y +CONFIG_CBFS_SIZE=0x450000 +# CONFIG_CONSOLE_SERIAL is not set +CONFIG_INCLUDE_NHLT_BLOBS=y +CONFIG_IFD_BIN_PATH="3rdparty/blobs/mainboard/google/poppy/soraka/flashdescriptor.bin" +CONFIG_ME_BIN_PATH="3rdparty/blobs/mainboard/google/poppy/soraka/me.bin" +CONFIG_BOARD_GOOGLE_SORAKA=y +CONFIG_OEM_BIN_FILE="3rdparty/blobs/mainboard/google/poppy/soraka/oem.bin" +CONFIG_HAVE_IFD_BIN=y +CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS=y +CONFIG_CPU_UCODE_BINARIES="3rdparty/blobs/soc/intel/kbl/cpu_microcode_blob.bin" +CONFIG_HAVE_ME_BIN=y +CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION=y diff --git a/configs/skl/config.asuka.uefi b/configs/skl/config.asuka.uefi new file mode 100644 index 00000000000..b5714e91022 --- /dev/null +++ b/configs/skl/config.asuka.uefi @@ -0,0 +1,15 @@ +CONFIG_LOCALVERSION="MrChromebox-4.19" +CONFIG_VENDOR_GOOGLE=y +CONFIG_NO_POST=y +CONFIG_CBFS_SIZE=0x450000 +CONFIG_INCLUDE_NHLT_BLOBS=y +CONFIG_IFD_BIN_PATH="3rdparty/blobs/mainboard/google/glados/asuka/flashdescriptor.bin" +CONFIG_ME_BIN_PATH="3rdparty/blobs/mainboard/google/glados/asuka/me.bin" +CONFIG_BOARD_GOOGLE_ASUKA=y +CONFIG_HAVE_IFD_BIN=y +CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS=y +CONFIG_CPU_UCODE_BINARIES="3rdparty/blobs/soc/intel/skl/cpu_microcode_blob.bin" +CONFIG_EC_GOOGLE_CHROMEEC_FIRMWARE_EXTERNAL=y +CONFIG_EC_GOOGLE_CHROMEEC_FIRMWARE_FILE="3rdparty/blobs/mainboard/google/glados/asuka/ec.RW.flat" +CONFIG_HAVE_ME_BIN=y +CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION=y diff --git a/configs/skl/config.caroline.uefi b/configs/skl/config.caroline.uefi new file mode 100644 index 00000000000..40e24b51451 --- /dev/null +++ b/configs/skl/config.caroline.uefi @@ -0,0 +1,17 @@ +CONFIG_LOCALVERSION="MrChromebox-4.19" +CONFIG_VENDOR_GOOGLE=y +CONFIG_NO_POST=y +CONFIG_CBFS_SIZE=0x450000 +CONFIG_INCLUDE_NHLT_BLOBS=y +CONFIG_LINEAR_FRAMEBUFFER_MAX_HEIGHT=1200 +CONFIG_LINEAR_FRAMEBUFFER_MAX_WIDTH=1800 +CONFIG_IFD_BIN_PATH="3rdparty/blobs/mainboard/google/glados/caroline/flashdescriptor.bin" +CONFIG_ME_BIN_PATH="3rdparty/blobs/mainboard/google/glados/caroline/me.bin" +CONFIG_BOARD_GOOGLE_CAROLINE=y +CONFIG_HAVE_IFD_BIN=y +CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS=y +CONFIG_CPU_UCODE_BINARIES="3rdparty/blobs/soc/intel/skl/cpu_microcode_blob.bin" +CONFIG_EC_GOOGLE_CHROMEEC_FIRMWARE_EXTERNAL=y +CONFIG_EC_GOOGLE_CHROMEEC_FIRMWARE_FILE="3rdparty/blobs/mainboard/google/glados/caroline/ec.RW.flat" +CONFIG_HAVE_ME_BIN=y +CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION=y diff --git a/configs/skl/config.cave.uefi b/configs/skl/config.cave.uefi new file mode 100644 index 00000000000..f9eca90992a --- /dev/null +++ b/configs/skl/config.cave.uefi @@ -0,0 +1,15 @@ +CONFIG_LOCALVERSION="MrChromebox-4.19" +CONFIG_VENDOR_GOOGLE=y +CONFIG_NO_POST=y +CONFIG_CBFS_SIZE=0x450000 +CONFIG_INCLUDE_NHLT_BLOBS=y +CONFIG_IFD_BIN_PATH="3rdparty/blobs/mainboard/google/glados/cave/flashdescriptor.bin" +CONFIG_ME_BIN_PATH="3rdparty/blobs/mainboard/google/glados/cave/me.bin" +CONFIG_BOARD_GOOGLE_CAVE=y +CONFIG_HAVE_IFD_BIN=y +CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS=y +CONFIG_CPU_UCODE_BINARIES="3rdparty/blobs/soc/intel/skl/cpu_microcode_blob.bin" +CONFIG_EC_GOOGLE_CHROMEEC_FIRMWARE_EXTERNAL=y +CONFIG_EC_GOOGLE_CHROMEEC_FIRMWARE_FILE="3rdparty/blobs/mainboard/google/glados/cave/ec.RW.flat" +CONFIG_HAVE_ME_BIN=y +CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION=y diff --git a/configs/skl/config.chell.uefi b/configs/skl/config.chell.uefi new file mode 100644 index 00000000000..6d6159d1c69 --- /dev/null +++ b/configs/skl/config.chell.uefi @@ -0,0 +1,17 @@ +CONFIG_LOCALVERSION="MrChromebox-4.19" +CONFIG_VENDOR_GOOGLE=y +CONFIG_NO_POST=y +CONFIG_CBFS_SIZE=0x450000 +CONFIG_INCLUDE_NHLT_BLOBS=y +CONFIG_LINEAR_FRAMEBUFFER_MAX_HEIGHT=1080 +CONFIG_LINEAR_FRAMEBUFFER_MAX_WIDTH=1920 +CONFIG_IFD_BIN_PATH="3rdparty/blobs/mainboard/google/glados/chell/flashdescriptor.bin" +CONFIG_ME_BIN_PATH="3rdparty/blobs/mainboard/google/glados/chell/me.bin" +CONFIG_BOARD_GOOGLE_CHELL=y +CONFIG_HAVE_IFD_BIN=y +CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS=y +CONFIG_CPU_UCODE_BINARIES="3rdparty/blobs/soc/intel/skl/cpu_microcode_blob.bin" +CONFIG_EC_GOOGLE_CHROMEEC_FIRMWARE_EXTERNAL=y +CONFIG_EC_GOOGLE_CHROMEEC_FIRMWARE_FILE="3rdparty/blobs/mainboard/google/glados/chell/ec.RW.flat" +CONFIG_HAVE_ME_BIN=y +CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION=y diff --git a/configs/skl/config.lars.uefi b/configs/skl/config.lars.uefi new file mode 100644 index 00000000000..1f3c2fed11e --- /dev/null +++ b/configs/skl/config.lars.uefi @@ -0,0 +1,15 @@ +CONFIG_LOCALVERSION="MrChromebox-4.19" +CONFIG_VENDOR_GOOGLE=y +CONFIG_NO_POST=y +CONFIG_CBFS_SIZE=0x450000 +CONFIG_INCLUDE_NHLT_BLOBS=y +CONFIG_IFD_BIN_PATH="3rdparty/blobs/mainboard/google/glados/lars/flashdescriptor.bin" +CONFIG_ME_BIN_PATH="3rdparty/blobs/mainboard/google/glados/lars/me.bin" +CONFIG_BOARD_GOOGLE_LARS=y +CONFIG_HAVE_IFD_BIN=y +CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS=y +CONFIG_CPU_UCODE_BINARIES="3rdparty/blobs/soc/intel/skl/cpu_microcode_blob.bin" +CONFIG_EC_GOOGLE_CHROMEEC_FIRMWARE_EXTERNAL=y +CONFIG_EC_GOOGLE_CHROMEEC_FIRMWARE_FILE="3rdparty/blobs/mainboard/google/glados/lars/ec.RW.flat" +CONFIG_HAVE_ME_BIN=y +CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION=y diff --git a/configs/skl/config.librem_13v2.uefi b/configs/skl/config.librem_13v2.uefi new file mode 100644 index 00000000000..f4ae0d8ad39 --- /dev/null +++ b/configs/skl/config.librem_13v2.uefi @@ -0,0 +1,10 @@ +CONFIG_LOCALVERSION="MrChromebox-4.19" +CONFIG_VENDOR_PURISM=y +CONFIG_CBFS_SIZE=0xe00000 +CONFIG_IFD_BIN_PATH="3rdparty/purism-blobs/mainboard/purism/librem_skl/descriptor.bin" +CONFIG_ME_BIN_PATH="3rdparty/purism-blobs/mainboard/purism/librem_skl/me.bin" +CONFIG_HAVE_IFD_BIN=y +CONFIG_BOARD_PURISM_LIBREM13_V2=y +CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS=y +CONFIG_CPU_UCODE_BINARIES="3rdparty/purism-blobs/mainboard/purism/librem_skl/cpu_microcode_blob.bin" +CONFIG_HAVE_ME_BIN=y diff --git a/configs/skl/config.librem_15v3.uefi b/configs/skl/config.librem_15v3.uefi new file mode 100644 index 00000000000..ff566e6288c --- /dev/null +++ b/configs/skl/config.librem_15v3.uefi @@ -0,0 +1,10 @@ +CONFIG_LOCALVERSION="MrChromebox-4.19" +CONFIG_VENDOR_PURISM=y +CONFIG_CBFS_SIZE=0xe00000 +CONFIG_IFD_BIN_PATH="3rdparty/purism-blobs/mainboard/purism/librem_skl/descriptor.bin" +CONFIG_ME_BIN_PATH="3rdparty/purism-blobs/mainboard/purism/librem_skl/me.bin" +CONFIG_HAVE_IFD_BIN=y +CONFIG_BOARD_PURISM_LIBREM15_V3=y +CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS=y +CONFIG_CPU_UCODE_BINARIES="3rdparty/purism-blobs/mainboard/purism/librem_skl/cpu_microcode_blob.bin" +CONFIG_HAVE_ME_BIN=y diff --git a/configs/skl/config.sentry.uefi b/configs/skl/config.sentry.uefi new file mode 100644 index 00000000000..ad04ea42767 --- /dev/null +++ b/configs/skl/config.sentry.uefi @@ -0,0 +1,15 @@ +CONFIG_LOCALVERSION="MrChromebox-4.19" +CONFIG_VENDOR_GOOGLE=y +CONFIG_NO_POST=y +CONFIG_CBFS_SIZE=0x450000 +CONFIG_INCLUDE_NHLT_BLOBS=y +CONFIG_IFD_BIN_PATH="3rdparty/blobs/mainboard/google/glados/sentry/flashdescriptor.bin" +CONFIG_ME_BIN_PATH="3rdparty/blobs/mainboard/google/glados/sentry/me.bin" +CONFIG_BOARD_GOOGLE_SENTRY=y +CONFIG_HAVE_IFD_BIN=y +CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS=y +CONFIG_CPU_UCODE_BINARIES="3rdparty/blobs/soc/intel/skl/cpu_microcode_blob.bin" +CONFIG_EC_GOOGLE_CHROMEEC_FIRMWARE_EXTERNAL=y +CONFIG_EC_GOOGLE_CHROMEEC_FIRMWARE_FILE="3rdparty/blobs/mainboard/google/glados/sentry/ec.RW.flat" +CONFIG_HAVE_ME_BIN=y +CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION=y diff --git a/configs/snb_ivb/config.butterfly.uefi b/configs/snb_ivb/config.butterfly.uefi new file mode 100644 index 00000000000..82aa0edc3ba --- /dev/null +++ b/configs/snb_ivb/config.butterfly.uefi @@ -0,0 +1,16 @@ +CONFIG_LOCALVERSION="MrChromebox-4.19" +CONFIG_VENDOR_GOOGLE=y +CONFIG_NO_POST=y +CONFIG_MAINBOARD_VENDOR="Google" +CONFIG_CBFS_SIZE=0x250000 +CONFIG_INTEL_GMA_VBT_FILE="3rdparty/blobs/mainboard/google/butterfly/vbt.bin" +CONFIG_IFD_BIN_PATH="3rdparty/blobs/mainboard/google/butterfly/flashdescriptor.bin" +CONFIG_ME_BIN_PATH="3rdparty/blobs/mainboard/google/butterfly/me.bin" +CONFIG_BOARD_GOOGLE_BUTTERFLY=y +CONFIG_PCIEXP_L1_SUB_STATE=y +# CONFIG_DRIVERS_UART_8250IO is not set +CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS=y +CONFIG_CPU_UCODE_BINARIES="3rdparty/blobs/soc/intel/snb/cpu_microcode_blob.bin" +# CONFIG_USE_NATIVE_RAMINIT is not set +CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION=y +CONFIG_INTEL_GMA_ADD_VBT=y diff --git a/configs/snb_ivb/config.link.uefi b/configs/snb_ivb/config.link.uefi new file mode 100644 index 00000000000..6890011530e --- /dev/null +++ b/configs/snb_ivb/config.link.uefi @@ -0,0 +1,20 @@ +CONFIG_LOCALVERSION="MrChromebox-4.19" +CONFIG_VENDOR_GOOGLE=y +CONFIG_NO_POST=y +CONFIG_CBFS_SIZE=0x250000 +CONFIG_LINEAR_FRAMEBUFFER_MAX_HEIGHT=1275 +CONFIG_LINEAR_FRAMEBUFFER_MAX_WIDTH=1920 +CONFIG_INTEL_GMA_VBT_FILE="3rdparty/blobs/mainboard/google/link/vbt.bin" +CONFIG_IFD_BIN_PATH="3rdparty/blobs/mainboard/google/link/flashdescriptor.bin" +CONFIG_ME_BIN_PATH="3rdparty/blobs/mainboard/google/link/me.bin" +CONFIG_BOARD_GOOGLE_LINK=y +CONFIG_PCIEXP_L1_SUB_STATE=y +# CONFIG_DRIVERS_UART_8250IO is not set +CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS=y +CONFIG_CPU_UCODE_BINARIES="3rdparty/blobs/soc/intel/ivb/cpu_microcode_blob.bin" +# CONFIG_USE_NATIVE_RAMINIT is not set +CONFIG_EC_GOOGLE_CHROMEEC_FIRMWARE_EXTERNAL=y +CONFIG_EC_GOOGLE_CHROMEEC_FIRMWARE_FILE="3rdparty/blobs/mainboard/google/link/ec.RW.flat" +CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION=y +CONFIG_INTEL_GMA_ADD_VBT=y +CONFIG_GOP_DRIVER_VERSION="3.0.1030" diff --git a/configs/snb_ivb/config.lumpy.uefi b/configs/snb_ivb/config.lumpy.uefi new file mode 100644 index 00000000000..a5569366c28 --- /dev/null +++ b/configs/snb_ivb/config.lumpy.uefi @@ -0,0 +1,14 @@ +CONFIG_LOCALVERSION="MrChromebox-4.19" +CONFIG_VENDOR_SAMSUNG=y +CONFIG_NO_POST=y +CONFIG_CBFS_SIZE=0x250000 +CONFIG_INTEL_GMA_VBT_FILE="3rdparty/blobs/mainboard/samsung/lumpy/vbt.bin" +CONFIG_IFD_BIN_PATH="3rdparty/blobs/mainboard/samsung/lumpy/flashdescriptor.bin" +CONFIG_ME_BIN_PATH="3rdparty/blobs/mainboard/samsung/lumpy/me.bin" +CONFIG_PCIEXP_L1_SUB_STATE=y +# CONFIG_DRIVERS_UART_8250IO is not set +CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS=y +CONFIG_CPU_UCODE_BINARIES="3rdparty/blobs/soc/intel/snb/cpu_microcode_blob.bin" +# CONFIG_USE_NATIVE_RAMINIT is not set +CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION=y +CONFIG_INTEL_GMA_ADD_VBT=y diff --git a/configs/snb_ivb/config.parrot.uefi b/configs/snb_ivb/config.parrot.uefi new file mode 100644 index 00000000000..ba314a1afa9 --- /dev/null +++ b/configs/snb_ivb/config.parrot.uefi @@ -0,0 +1,15 @@ +CONFIG_LOCALVERSION="MrChromebox-4.19" +CONFIG_VENDOR_GOOGLE=y +CONFIG_NO_POST=y +CONFIG_CBFS_SIZE=0x250000 +CONFIG_INTEL_GMA_VBT_FILE="3rdparty/blobs/mainboard/google/parrot/vbt.bin" +CONFIG_IFD_BIN_PATH="3rdparty/blobs/mainboard/google/parrot/flashdescriptor.bin" +CONFIG_ME_BIN_PATH="3rdparty/blobs/mainboard/google/parrot/me.bin" +CONFIG_BOARD_GOOGLE_PARROT=y +CONFIG_PCIEXP_L1_SUB_STATE=y +# CONFIG_DRIVERS_UART_8250IO is not set +CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS=y +CONFIG_CPU_UCODE_BINARIES="3rdparty/blobs/soc/intel/ivb/cpu_microcode_blob.bin" +# CONFIG_USE_NATIVE_RAMINIT is not set +CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION=y +CONFIG_INTEL_GMA_ADD_VBT=y diff --git a/configs/snb_ivb/config.stout.uefi b/configs/snb_ivb/config.stout.uefi new file mode 100644 index 00000000000..e0e497e60c9 --- /dev/null +++ b/configs/snb_ivb/config.stout.uefi @@ -0,0 +1,15 @@ +CONFIG_LOCALVERSION="MrChromebox-4.19" +CONFIG_VENDOR_GOOGLE=y +CONFIG_NO_POST=y +CONFIG_CBFS_SIZE=0x250000 +CONFIG_INTEL_GMA_VBT_FILE="3rdparty/blobs/mainboard/google/stout/vbt.bin" +CONFIG_IFD_BIN_PATH="3rdparty/blobs/mainboard/google/stout/flashdescriptor.bin" +CONFIG_ME_BIN_PATH="3rdparty/blobs/mainboard/google/stout/me.bin" +CONFIG_BOARD_GOOGLE_STOUT=y +CONFIG_PCIEXP_L1_SUB_STATE=y +# CONFIG_DRIVERS_UART_8250IO is not set +CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS=y +CONFIG_CPU_UCODE_BINARIES="3rdparty/blobs/soc/intel/ivb/cpu_microcode_blob.bin" +# CONFIG_USE_NATIVE_RAMINIT is not set +CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION=y +CONFIG_INTEL_GMA_ADD_VBT=y diff --git a/configs/snb_ivb/config.stumpy.uefi b/configs/snb_ivb/config.stumpy.uefi new file mode 100644 index 00000000000..4b265c3cf32 --- /dev/null +++ b/configs/snb_ivb/config.stumpy.uefi @@ -0,0 +1,16 @@ +CONFIG_LOCALVERSION="MrChromebox-4.19" +CONFIG_VENDOR_SAMSUNG=y +CONFIG_NO_POST=y +CONFIG_CBFS_SIZE=0x250000 +CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="GOOGLE" +CONFIG_INTEL_GMA_VBT_FILE="3rdparty/blobs/mainboard/samsung/stumpy/vbt.bin" +CONFIG_IFD_BIN_PATH="3rdparty/blobs/mainboard/samsung/stumpy/flashdescriptor.bin" +CONFIG_ME_BIN_PATH="3rdparty/blobs/mainboard/samsung/stumpy/me.bin" +CONFIG_PCIEXP_L1_SUB_STATE=y +# CONFIG_DRIVERS_UART_8250IO is not set +CONFIG_BOARD_SAMSUNG_STUMPY=y +CONFIG_POWER_STATE_PREVIOUS_AFTER_FAILURE=y +CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS=y +CONFIG_CPU_UCODE_BINARIES="3rdparty/blobs/soc/intel/snb/cpu_microcode_blob.bin" +CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION=y +CONFIG_INTEL_GMA_ADD_VBT=y diff --git a/configs/snb_ivb/config.x230.uefi b/configs/snb_ivb/config.x230.uefi new file mode 100644 index 00000000000..287e84598e4 --- /dev/null +++ b/configs/snb_ivb/config.x230.uefi @@ -0,0 +1,9 @@ +CONFIG_VENDOR_LENOVO=y +CONFIG_NO_POST=y +CONFIG_CBFS_SIZE=0x400000 +CONFIG_HAVE_IFD_BIN=y +CONFIG_BOARD_LENOVO_X230=y +CONFIG_H8_SUPPORT_BT_ON_WIFI=y +CONFIG_HAVE_ME_BIN=y +CONFIG_HAVE_GBE_BIN=y +# CONFIG_VPD is not set diff --git a/configs/str/config.aleena.uefi b/configs/str/config.aleena.uefi new file mode 100644 index 00000000000..61cfe5a7d0b --- /dev/null +++ b/configs/str/config.aleena.uefi @@ -0,0 +1,12 @@ +CONFIG_LOCALVERSION="MrChromebox-4.19" +CONFIG_USE_AMD_BLOBS=y +CONFIG_VENDOR_GOOGLE=y +CONFIG_NO_POST=y +# CONFIG_CONSOLE_SERIAL is not set +CONFIG_VGA_BIOS=y +CONFIG_BOARD_GOOGLE_ALEENA=y +CONFIG_EC_GOOGLE_CHROMEEC_FIRMWARE_EXTERNAL=y +CONFIG_EC_GOOGLE_CHROMEEC_FIRMWARE_FILE="3rdparty/blobs/mainboard/google/kahlee/aleena/ec.RW.flat" +CONFIG_FRAMEBUFFER_SET_VESA_MODE=y +CONFIG_FRAMEBUFFER_VESA_MODE_USER=y +CONFIG_FRAMEBUFFER_VESA_MODE=0x1D4 diff --git a/configs/str/config.barla.uefi b/configs/str/config.barla.uefi new file mode 100644 index 00000000000..9f8f60b8ad7 --- /dev/null +++ b/configs/str/config.barla.uefi @@ -0,0 +1,13 @@ +CONFIG_LOCALVERSION="MrChromebox-4.19" +CONFIG_USE_AMD_BLOBS=y +CONFIG_VENDOR_GOOGLE=y +CONFIG_NO_POST=y +# CONFIG_CONSOLE_SERIAL is not set +CONFIG_VGA_BIOS=y +CONFIG_BOARD_GOOGLE_CAREENA=y +CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="Barla" +CONFIG_EC_GOOGLE_CHROMEEC_FIRMWARE_EXTERNAL=y +CONFIG_EC_GOOGLE_CHROMEEC_FIRMWARE_FILE="3rdparty/blobs/mainboard/google/kahlee/careena/ec.RW.flat" +CONFIG_FRAMEBUFFER_SET_VESA_MODE=y +CONFIG_FRAMEBUFFER_VESA_MODE_USER=y +CONFIG_FRAMEBUFFER_VESA_MODE=0x1D4 diff --git a/configs/str/config.careena.uefi b/configs/str/config.careena.uefi new file mode 100644 index 00000000000..f3253ff0e7c --- /dev/null +++ b/configs/str/config.careena.uefi @@ -0,0 +1,12 @@ +CONFIG_LOCALVERSION="MrChromebox-4.19" +CONFIG_USE_AMD_BLOBS=y +CONFIG_VENDOR_GOOGLE=y +CONFIG_NO_POST=y +# CONFIG_CONSOLE_SERIAL is not set +CONFIG_VGA_BIOS=y +CONFIG_BOARD_GOOGLE_CAREENA=y +CONFIG_EC_GOOGLE_CHROMEEC_FIRMWARE_EXTERNAL=y +CONFIG_EC_GOOGLE_CHROMEEC_FIRMWARE_FILE="3rdparty/blobs/mainboard/google/kahlee/careena/ec.RW.flat" +CONFIG_FRAMEBUFFER_SET_VESA_MODE=y +CONFIG_FRAMEBUFFER_VESA_MODE_USER=y +CONFIG_FRAMEBUFFER_VESA_MODE=0x1D4 diff --git a/configs/str/config.kasumi.uefi b/configs/str/config.kasumi.uefi new file mode 100644 index 00000000000..3a522f89bb4 --- /dev/null +++ b/configs/str/config.kasumi.uefi @@ -0,0 +1,13 @@ +CONFIG_LOCALVERSION="MrChromebox-4.19" +CONFIG_USE_AMD_BLOBS=y +CONFIG_VENDOR_GOOGLE=y +CONFIG_NO_POST=y +# CONFIG_CONSOLE_SERIAL is not set +CONFIG_VGA_BIOS=y +CONFIG_BOARD_GOOGLE_ALEENA=y +CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="Kasumi" +CONFIG_EC_GOOGLE_CHROMEEC_FIRMWARE_EXTERNAL=y +CONFIG_EC_GOOGLE_CHROMEEC_FIRMWARE_FILE="3rdparty/blobs/mainboard/google/kahlee/aleena/ec.RW.flat" +CONFIG_FRAMEBUFFER_SET_VESA_MODE=y +CONFIG_FRAMEBUFFER_VESA_MODE_USER=y +CONFIG_FRAMEBUFFER_VESA_MODE=0x1D4 diff --git a/configs/str/config.liara.uefi b/configs/str/config.liara.uefi new file mode 100644 index 00000000000..a6e11f37a29 --- /dev/null +++ b/configs/str/config.liara.uefi @@ -0,0 +1,12 @@ +CONFIG_LOCALVERSION="MrChromebox-4.19" +CONFIG_USE_AMD_BLOBS=y +CONFIG_VENDOR_GOOGLE=y +CONFIG_NO_POST=y +# CONFIG_CONSOLE_SERIAL is not set +CONFIG_VGA_BIOS=y +CONFIG_BOARD_GOOGLE_LIARA=y +CONFIG_EC_GOOGLE_CHROMEEC_FIRMWARE_EXTERNAL=y +CONFIG_EC_GOOGLE_CHROMEEC_FIRMWARE_FILE="3rdparty/blobs/mainboard/google/kahlee/liara/ec.RW.flat" +CONFIG_FRAMEBUFFER_SET_VESA_MODE=y +CONFIG_FRAMEBUFFER_VESA_MODE_USER=y +CONFIG_FRAMEBUFFER_VESA_MODE=0x1D4 diff --git a/configs/str/config.treeya.uefi b/configs/str/config.treeya.uefi new file mode 100644 index 00000000000..b57d6b9aaa9 --- /dev/null +++ b/configs/str/config.treeya.uefi @@ -0,0 +1,12 @@ +CONFIG_LOCALVERSION="MrChromebox-4.19" +CONFIG_USE_AMD_BLOBS=y +CONFIG_VENDOR_GOOGLE=y +CONFIG_NO_POST=y +# CONFIG_CONSOLE_SERIAL is not set +CONFIG_VGA_BIOS=y +CONFIG_BOARD_GOOGLE_TREEYA=y +CONFIG_EC_GOOGLE_CHROMEEC_FIRMWARE_EXTERNAL=y +CONFIG_EC_GOOGLE_CHROMEEC_FIRMWARE_FILE="3rdparty/blobs/mainboard/google/kahlee/treeya/ec.RW.flat" +CONFIG_FRAMEBUFFER_SET_VESA_MODE=y +CONFIG_FRAMEBUFFER_VESA_MODE_USER=y +CONFIG_FRAMEBUFFER_VESA_MODE=0x1D4 diff --git a/configs/tgl/config.chronicler.uefi b/configs/tgl/config.chronicler.uefi new file mode 100644 index 00000000000..67a0f65d7d1 --- /dev/null +++ b/configs/tgl/config.chronicler.uefi @@ -0,0 +1,17 @@ +CONFIG_LOCALVERSION="MrChromebox-4.19" +CONFIG_VENDOR_GOOGLE=y +CONFIG_NO_POST=y +CONFIG_CBFS_SIZE=0x450000 +# CONFIG_CONSOLE_SERIAL is not set +CONFIG_INTEL_GMA_VBT_FILE="3rdparty/blobs/mainboard/google/volteer/chronicler/vbt.bin" +CONFIG_IFD_BIN_PATH="3rdparty/blobs/mainboard/google/volteer/chronicler/flashdescriptor.bin" +CONFIG_ME_BIN_PATH="3rdparty/blobs/mainboard/google/volteer/chronicler/me.bin" +CONFIG_BOARD_GOOGLE_CHRONICLER=y +CONFIG_HAVE_IFD_BIN=y +CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS=y +CONFIG_CPU_UCODE_BINARIES="3rdparty/blobs/mainboard/google/volteer/chronicler/cpu_microcode_blob.bin" +CONFIG_EC_GOOGLE_CHROMEEC_FIRMWARE_EXTERNAL=y +CONFIG_EC_GOOGLE_CHROMEEC_FIRMWARE_FILE="3rdparty/blobs/mainboard/google/volteer/chronicler/ec.RW.flat" +CONFIG_HAVE_ME_BIN=y +CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION=y +CONFIG_RUN_FSP_GOP=y diff --git a/configs/tgl/config.collis.uefi b/configs/tgl/config.collis.uefi new file mode 100644 index 00000000000..2f7d49b077e --- /dev/null +++ b/configs/tgl/config.collis.uefi @@ -0,0 +1,17 @@ +CONFIG_LOCALVERSION="MrChromebox-4.19" +CONFIG_VENDOR_GOOGLE=y +CONFIG_NO_POST=y +CONFIG_CBFS_SIZE=0x450000 +# CONFIG_CONSOLE_SERIAL is not set +CONFIG_INTEL_GMA_VBT_FILE="3rdparty/blobs/mainboard/google/volteer/collis/vbt.bin" +CONFIG_IFD_BIN_PATH="3rdparty/blobs/mainboard/google/volteer/collis/flashdescriptor.bin" +CONFIG_ME_BIN_PATH="3rdparty/blobs/mainboard/google/volteer/collis/me.bin" +CONFIG_BOARD_GOOGLE_COLLIS=y +CONFIG_HAVE_IFD_BIN=y +CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS=y +CONFIG_CPU_UCODE_BINARIES="3rdparty/blobs/mainboard/google/volteer/collis/cpu_microcode_blob.bin" +CONFIG_EC_GOOGLE_CHROMEEC_FIRMWARE_EXTERNAL=y +CONFIG_EC_GOOGLE_CHROMEEC_FIRMWARE_FILE="3rdparty/blobs/mainboard/google/volteer/collis/ec.RW.flat" +CONFIG_HAVE_ME_BIN=y +CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION=y +CONFIG_RUN_FSP_GOP=y diff --git a/configs/tgl/config.copano.uefi b/configs/tgl/config.copano.uefi new file mode 100644 index 00000000000..1f91c8076b5 --- /dev/null +++ b/configs/tgl/config.copano.uefi @@ -0,0 +1,17 @@ +CONFIG_LOCALVERSION="MrChromebox-4.19" +CONFIG_VENDOR_GOOGLE=y +CONFIG_NO_POST=y +CONFIG_CBFS_SIZE=0x450000 +# CONFIG_CONSOLE_SERIAL is not set +CONFIG_INTEL_GMA_VBT_FILE="3rdparty/blobs/mainboard/google/volteer/copano/vbt.bin" +CONFIG_IFD_BIN_PATH="3rdparty/blobs/mainboard/google/volteer/copano/flashdescriptor.bin" +CONFIG_ME_BIN_PATH="3rdparty/blobs/mainboard/google/volteer/copano/me.bin" +CONFIG_BOARD_GOOGLE_COPANO=y +CONFIG_HAVE_IFD_BIN=y +CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS=y +CONFIG_CPU_UCODE_BINARIES="3rdparty/blobs/mainboard/google/volteer/copano/cpu_microcode_blob.bin" +CONFIG_EC_GOOGLE_CHROMEEC_FIRMWARE_EXTERNAL=y +CONFIG_EC_GOOGLE_CHROMEEC_FIRMWARE_FILE="3rdparty/blobs/mainboard/google/volteer/copano/ec.RW.flat" +CONFIG_HAVE_ME_BIN=y +CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION=y +CONFIG_RUN_FSP_GOP=y diff --git a/configs/tgl/config.delbin.uefi b/configs/tgl/config.delbin.uefi new file mode 100644 index 00000000000..2406ad8fb54 --- /dev/null +++ b/configs/tgl/config.delbin.uefi @@ -0,0 +1,17 @@ +CONFIG_LOCALVERSION="MrChromebox-4.19" +CONFIG_VENDOR_GOOGLE=y +CONFIG_NO_POST=y +CONFIG_CBFS_SIZE=0x450000 +# CONFIG_CONSOLE_SERIAL is not set +CONFIG_INTEL_GMA_VBT_FILE="3rdparty/blobs/mainboard/google/volteer/delbin/vbt.bin" +CONFIG_IFD_BIN_PATH="3rdparty/blobs/mainboard/google/volteer/delbin/flashdescriptor.bin" +CONFIG_ME_BIN_PATH="3rdparty/blobs/mainboard/google/volteer/delbin/me.bin" +CONFIG_BOARD_GOOGLE_DELBIN=y +CONFIG_HAVE_IFD_BIN=y +CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS=y +CONFIG_CPU_UCODE_BINARIES="3rdparty/blobs/mainboard/google/volteer/delbin/cpu_microcode_blob.bin" +CONFIG_EC_GOOGLE_CHROMEEC_FIRMWARE_EXTERNAL=y +CONFIG_EC_GOOGLE_CHROMEEC_FIRMWARE_FILE="3rdparty/blobs/mainboard/google/volteer/delbin/ec.RW.flat" +CONFIG_HAVE_ME_BIN=y +CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION=y +CONFIG_RUN_FSP_GOP=y diff --git a/configs/tgl/config.drobit.uefi b/configs/tgl/config.drobit.uefi new file mode 100644 index 00000000000..c5b2741efe8 --- /dev/null +++ b/configs/tgl/config.drobit.uefi @@ -0,0 +1,17 @@ +CONFIG_LOCALVERSION="MrChromebox-4.19" +CONFIG_VENDOR_GOOGLE=y +CONFIG_NO_POST=y +CONFIG_CBFS_SIZE=0x450000 +# CONFIG_CONSOLE_SERIAL is not set +CONFIG_INTEL_GMA_VBT_FILE="3rdparty/blobs/mainboard/google/volteer/drobit/vbt.bin" +CONFIG_IFD_BIN_PATH="3rdparty/blobs/mainboard/google/volteer/drobit/flashdescriptor.bin" +CONFIG_ME_BIN_PATH="3rdparty/blobs/mainboard/google/volteer/drobit/me.bin" +CONFIG_BOARD_GOOGLE_DROBIT=y +CONFIG_HAVE_IFD_BIN=y +CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS=y +CONFIG_CPU_UCODE_BINARIES="3rdparty/blobs/mainboard/google/volteer/drobit/cpu_microcode_blob.bin" +CONFIG_EC_GOOGLE_CHROMEEC_FIRMWARE_EXTERNAL=y +CONFIG_EC_GOOGLE_CHROMEEC_FIRMWARE_FILE="3rdparty/blobs/mainboard/google/volteer/drobit/ec.RW.flat" +CONFIG_HAVE_ME_BIN=y +CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION=y +CONFIG_RUN_FSP_GOP=y diff --git a/configs/tgl/config.eldrid.uefi b/configs/tgl/config.eldrid.uefi new file mode 100644 index 00000000000..1125d258bfe --- /dev/null +++ b/configs/tgl/config.eldrid.uefi @@ -0,0 +1,18 @@ +CONFIG_LOCALVERSION="MrChromebox-4.19" +CONFIG_VENDOR_GOOGLE=y +CONFIG_NO_POST=y +CONFIG_CBFS_SIZE=0x450000 +# CONFIG_CONSOLE_SERIAL is not set +CONFIG_INTEL_GMA_VBT_FILE="3rdparty/blobs/mainboard/google/volteer/eldrid/vbt.bin" +CONFIG_IFD_BIN_PATH="3rdparty/blobs/mainboard/google/volteer/eldrid/flashdescriptor.bin" +CONFIG_ME_BIN_PATH="3rdparty/blobs/mainboard/google/volteer/eldrid/me.bin" +CONFIG_BOARD_GOOGLE_ELDRID=y +CONFIG_HAVE_IFD_BIN=y +CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS=y +CONFIG_CPU_UCODE_BINARIES="3rdparty/blobs/mainboard/google/volteer/eldrid/cpu_microcode_blob.bin" +CONFIG_EC_GOOGLE_CHROMEEC_FIRMWARE_EXTERNAL=y +CONFIG_EC_GOOGLE_CHROMEEC_FIRMWARE_FILE="3rdparty/blobs/mainboard/google/volteer/eldrid/ec.RW.flat" +CONFIG_EC_GOOGLE_CHROMEEC_FIRMWARE_EXTERNAL=n +CONFIG_HAVE_ME_BIN=y +CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION=y +CONFIG_RUN_FSP_GOP=y diff --git a/configs/tgl/config.elemi.uefi b/configs/tgl/config.elemi.uefi new file mode 100644 index 00000000000..26a9fb4aeb8 --- /dev/null +++ b/configs/tgl/config.elemi.uefi @@ -0,0 +1,17 @@ +CONFIG_LOCALVERSION="MrChromebox-4.19" +CONFIG_VENDOR_GOOGLE=y +CONFIG_NO_POST=y +CONFIG_CBFS_SIZE=0x450000 +# CONFIG_CONSOLE_SERIAL is not set +CONFIG_INTEL_GMA_VBT_FILE="3rdparty/blobs/mainboard/google/volteer/elemi/vbt.bin" +CONFIG_IFD_BIN_PATH="3rdparty/blobs/mainboard/google/volteer/elemi/flashdescriptor.bin" +CONFIG_ME_BIN_PATH="3rdparty/blobs/mainboard/google/volteer/elemi/me.bin" +CONFIG_BOARD_GOOGLE_ELEMI=y +CONFIG_HAVE_IFD_BIN=y +CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS=y +CONFIG_CPU_UCODE_BINARIES="3rdparty/blobs/mainboard/google/volteer/elemi/cpu_microcode_blob.bin" +CONFIG_EC_GOOGLE_CHROMEEC_FIRMWARE_EXTERNAL=y +CONFIG_EC_GOOGLE_CHROMEEC_FIRMWARE_FILE="3rdparty/blobs/mainboard/google/volteer/elemi/ec.RW.flat" +CONFIG_HAVE_ME_BIN=y +CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION=y +CONFIG_RUN_FSP_GOP=y diff --git a/configs/tgl/config.lillipup.uefi b/configs/tgl/config.lillipup.uefi new file mode 100644 index 00000000000..55fb553d796 --- /dev/null +++ b/configs/tgl/config.lillipup.uefi @@ -0,0 +1,16 @@ +CONFIG_LOCALVERSION="MrChromebox-4.19" +CONFIG_VENDOR_GOOGLE=y +CONFIG_NO_POST=y +CONFIG_CBFS_SIZE=0x450000 +# CONFIG_CONSOLE_SERIAL is not set +CONFIG_IFD_BIN_PATH="3rdparty/blobs/mainboard/google/volteer/lillipup/flashdescriptor.bin" +CONFIG_ME_BIN_PATH="3rdparty/blobs/mainboard/google/volteer/lillipup/me.bin" +CONFIG_BOARD_GOOGLE_LINDAR=y +CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="Lillipup" +CONFIG_HAVE_IFD_BIN=y +CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS=y +CONFIG_CPU_UCODE_BINARIES="3rdparty/blobs/mainboard/google/volteer/lillipup/cpu_microcode_blob.bin" +CONFIG_EC_GOOGLE_CHROMEEC_FIRMWARE_EXTERNAL=y +CONFIG_EC_GOOGLE_CHROMEEC_FIRMWARE_FILE="3rdparty/blobs/mainboard/google/volteer/lillipup/ec.RW.flat" +CONFIG_HAVE_ME_BIN=y +CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION=y diff --git a/configs/tgl/config.lindar.uefi b/configs/tgl/config.lindar.uefi new file mode 100644 index 00000000000..2592d39e926 --- /dev/null +++ b/configs/tgl/config.lindar.uefi @@ -0,0 +1,15 @@ +CONFIG_LOCALVERSION="MrChromebox-4.19" +CONFIG_VENDOR_GOOGLE=y +CONFIG_NO_POST=y +CONFIG_CBFS_SIZE=0x450000 +# CONFIG_CONSOLE_SERIAL is not set +CONFIG_IFD_BIN_PATH="3rdparty/blobs/mainboard/google/volteer/lindar/flashdescriptor.bin" +CONFIG_ME_BIN_PATH="3rdparty/blobs/mainboard/google/volteer/lindar/me.bin" +CONFIG_BOARD_GOOGLE_LINDAR=y +CONFIG_HAVE_IFD_BIN=y +CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS=y +CONFIG_CPU_UCODE_BINARIES="3rdparty/blobs/mainboard/google/volteer/lindar/cpu_microcode_blob.bin" +CONFIG_EC_GOOGLE_CHROMEEC_FIRMWARE_EXTERNAL=y +CONFIG_EC_GOOGLE_CHROMEEC_FIRMWARE_FILE="3rdparty/blobs/mainboard/google/volteer/lindar/ec.RW.flat" +CONFIG_HAVE_ME_BIN=y +CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION=y diff --git a/configs/tgl/config.voema.uefi b/configs/tgl/config.voema.uefi new file mode 100644 index 00000000000..9d0ad6ad1e4 --- /dev/null +++ b/configs/tgl/config.voema.uefi @@ -0,0 +1,19 @@ +CONFIG_LOCALVERSION="MrChromebox-4.19" +CONFIG_VENDOR_GOOGLE=y +CONFIG_NO_POST=y +CONFIG_CBFS_SIZE=0x450000 +# CONFIG_CONSOLE_SERIAL is not set +CONFIG_INTEL_GMA_VBT_FILE="3rdparty/blobs/mainboard/google/volteer/voema/vbt.bin" +CONFIG_IFD_BIN_PATH="3rdparty/blobs/mainboard/google/volteer/voema/flashdescriptor.bin" +CONFIG_ME_BIN_PATH="3rdparty/blobs/mainboard/google/volteer/voema/me.bin" +CONFIG_BOARD_GOOGLE_VOEMA=y +CONFIG_HAVE_IFD_BIN=y +CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS=y +CONFIG_CPU_UCODE_BINARIES="3rdparty/blobs/mainboard/google/volteer/voema/cpu_microcode_blob.bin" +CONFIG_EC_GOOGLE_CHROMEEC_FIRMWARE_EXTERNAL=y +CONFIG_EC_GOOGLE_CHROMEEC_FIRMWARE_FILE="3rdparty/blobs/mainboard/google/volteer/voema/ec.RW.flat" +CONFIG_HAVE_ME_BIN=y +CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION=y +CONFIG_NO_GFX_INIT=y +CONFIG_INTEL_GMA_ADD_VBT=y +CONFIG_EDK2_GOP_DRIVER=y diff --git a/configs/tgl/config.volet.uefi b/configs/tgl/config.volet.uefi new file mode 100644 index 00000000000..e23ed845566 --- /dev/null +++ b/configs/tgl/config.volet.uefi @@ -0,0 +1,19 @@ +CONFIG_LOCALVERSION="MrChromebox-4.19" +CONFIG_VENDOR_GOOGLE=y +CONFIG_NO_POST=y +CONFIG_CBFS_SIZE=0x450000 +# CONFIG_CONSOLE_SERIAL is not set +CONFIG_INTEL_GMA_VBT_FILE="3rdparty/blobs/mainboard/google/volteer/volet/vbt.bin" +CONFIG_IFD_BIN_PATH="3rdparty/blobs/mainboard/google/volteer/volet/flashdescriptor.bin" +CONFIG_ME_BIN_PATH="3rdparty/blobs/mainboard/google/volteer/volet/me.bin" +CONFIG_BOARD_GOOGLE_VOLET=y +CONFIG_HAVE_IFD_BIN=y +CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS=y +CONFIG_CPU_UCODE_BINARIES="3rdparty/blobs/mainboard/google/volteer/volet/cpu_microcode_blob.bin" +CONFIG_EC_GOOGLE_CHROMEEC_FIRMWARE_EXTERNAL=y +CONFIG_EC_GOOGLE_CHROMEEC_FIRMWARE_FILE="3rdparty/blobs/mainboard/google/volteer/volet/ec.RW.flat" +CONFIG_HAVE_ME_BIN=y +CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION=y +CONFIG_NO_GFX_INIT=y +CONFIG_INTEL_GMA_ADD_VBT=y +CONFIG_EDK2_GOP_DRIVER=y diff --git a/configs/tgl/config.volta.uefi b/configs/tgl/config.volta.uefi new file mode 100644 index 00000000000..a107f23f4a8 --- /dev/null +++ b/configs/tgl/config.volta.uefi @@ -0,0 +1,20 @@ +CONFIG_LOCALVERSION="MrChromebox-4.19" +CONFIG_VENDOR_GOOGLE=y +CONFIG_NO_POST=y +CONFIG_CBFS_SIZE=0x450000 +# CONFIG_CONSOLE_SERIAL is not set +CONFIG_INTEL_GMA_VBT_FILE="3rdparty/blobs/mainboard/google/volteer/voxel/vbt.bin" +CONFIG_IFD_BIN_PATH="3rdparty/blobs/mainboard/google/volteer/voxel/flashdescriptor.bin" +CONFIG_ME_BIN_PATH="3rdparty/blobs/mainboard/google/volteer/voxel/me.bin" +CONFIG_BOARD_GOOGLE_VOXEL=y +CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="Volta" +CONFIG_HAVE_IFD_BIN=y +CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS=y +CONFIG_CPU_UCODE_BINARIES="3rdparty/blobs/mainboard/google/volteer/voxel/cpu_microcode_blob.bin" +CONFIG_EC_GOOGLE_CHROMEEC_FIRMWARE_EXTERNAL=y +CONFIG_EC_GOOGLE_CHROMEEC_FIRMWARE_FILE="3rdparty/blobs/mainboard/google/volteer/voxel/ec.RW.flat" +CONFIG_HAVE_ME_BIN=y +CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION=y +CONFIG_NO_GFX_INIT=y +CONFIG_INTEL_GMA_ADD_VBT=y +CONFIG_EDK2_GOP_DRIVER=y diff --git a/configs/tgl/config.voxel.uefi b/configs/tgl/config.voxel.uefi new file mode 100644 index 00000000000..610704e6cf8 --- /dev/null +++ b/configs/tgl/config.voxel.uefi @@ -0,0 +1,19 @@ +CONFIG_LOCALVERSION="MrChromebox-4.19" +CONFIG_VENDOR_GOOGLE=y +CONFIG_NO_POST=y +CONFIG_CBFS_SIZE=0x450000 +# CONFIG_CONSOLE_SERIAL is not set +CONFIG_INTEL_GMA_VBT_FILE="3rdparty/blobs/mainboard/google/volteer/voxel/vbt.bin" +CONFIG_IFD_BIN_PATH="3rdparty/blobs/mainboard/google/volteer/voxel/flashdescriptor.bin" +CONFIG_ME_BIN_PATH="3rdparty/blobs/mainboard/google/volteer/voxel/me.bin" +CONFIG_BOARD_GOOGLE_VOXEL=y +CONFIG_HAVE_IFD_BIN=y +CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS=y +CONFIG_CPU_UCODE_BINARIES="3rdparty/blobs/mainboard/google/volteer/voxel/cpu_microcode_blob.bin" +CONFIG_EC_GOOGLE_CHROMEEC_FIRMWARE_EXTERNAL=y +CONFIG_EC_GOOGLE_CHROMEEC_FIRMWARE_FILE="3rdparty/blobs/mainboard/google/volteer/voxel/ec.RW.flat" +CONFIG_HAVE_ME_BIN=y +CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION=y +CONFIG_NO_GFX_INIT=y +CONFIG_INTEL_GMA_ADD_VBT=y +CONFIG_EDK2_GOP_DRIVER=y diff --git a/configs/whl/config.librem_mini.uefi b/configs/whl/config.librem_mini.uefi new file mode 100644 index 00000000000..0410283e382 --- /dev/null +++ b/configs/whl/config.librem_mini.uefi @@ -0,0 +1,12 @@ +CONFIG_LOCALVERSION="MrChromebox-4.19" +CONFIG_VENDOR_PURISM=y +CONFIG_CBFS_SIZE=0x800000 +CONFIG_IFD_BIN_PATH="3rdparty/purism-blobs/mainboard/purism/librem_cnl/mini/flashdescriptor.bin" +CONFIG_ME_BIN_PATH="3rdparty/purism-blobs/mainboard/purism/librem_cnl/mini/me.bin" +CONFIG_HAVE_IFD_BIN=y +CONFIG_BOARD_PURISM_LIBREM_MINI=y +CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS=y +CONFIG_CPU_UCODE_BINARIES="3rdparty/purism-blobs/mainboard/purism/librem_cnl/cpu_microcode_blob.bin" +CONFIG_HAVE_ME_BIN=y +CONFIG_NO_GFX_INIT=y +CONFIG_EDK2_GOP_DRIVER=y diff --git a/configs/whl/config.sarien.uefi b/configs/whl/config.sarien.uefi new file mode 100644 index 00000000000..ec6079993c2 --- /dev/null +++ b/configs/whl/config.sarien.uefi @@ -0,0 +1,18 @@ +CONFIG_LOCALVERSION="MrChromebox-4.19" +CONFIG_VENDOR_GOOGLE=y +CONFIG_NO_POST=y +# CONFIG_CONSOLE_SERIAL is not set +CONFIG_INTEL_GMA_VBT_FILE="3rdparty/blobs/mainboard/google/sarien/vbt.bin" +CONFIG_IFD_BIN_PATH="3rdparty/blobs/mainboard/google/sarien/flashdescriptor.bin" +CONFIG_ME_BIN_PATH="3rdparty/blobs/mainboard/google/sarien/me.bin" +CONFIG_GBE_BIN_PATH="3rdparty/blobs/mainboard/google/sarien/gbe.bin" +CONFIG_BOARD_GOOGLE_SARIEN=y +CONFIG_HAVE_IFD_BIN=y +CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS=y +CONFIG_CPU_UCODE_BINARIES="3rdparty/blobs/mainboard/google/sarien/cpu_microcode_blob.bin" +CONFIG_HAVE_ME_BIN=y +CONFIG_HAVE_GBE_BIN=y +CONFIG_HAVE_EC_BIN=y +CONFIG_EC_BIN_PATH="3rdparty/blobs/mainboard/google/sarien/ec.bin" +CONFIG_NO_GFX_INIT=y +CONFIG_EDK2_GOP_DRIVER=y diff --git a/configs/zen2/config.berknip.uefi b/configs/zen2/config.berknip.uefi new file mode 100644 index 00000000000..760dcce397b --- /dev/null +++ b/configs/zen2/config.berknip.uefi @@ -0,0 +1,11 @@ +CONFIG_LOCALVERSION="MrChromebox-4.19" +CONFIG_USE_AMD_BLOBS=y +CONFIG_VENDOR_GOOGLE=y +CONFIG_NO_POST=y +# CONFIG_CONSOLE_SERIAL is not set +CONFIG_VBOOT=y +CONFIG_BOARD_GOOGLE_BERKNIP=y +CONFIG_FRAMEBUFFER_SET_VESA_MODE=y +CONFIG_FRAMEBUFFER_VESA_MODE_USER=y +CONFIG_FRAMEBUFFER_VESA_MODE=0x1d4 +# CONFIG_SMMSTORE is not set diff --git a/configs/zen2/config.dirinboz.uefi b/configs/zen2/config.dirinboz.uefi new file mode 100644 index 00000000000..f0986fa2a1d --- /dev/null +++ b/configs/zen2/config.dirinboz.uefi @@ -0,0 +1,11 @@ +CONFIG_LOCALVERSION="MrChromebox-4.19" +CONFIG_USE_AMD_BLOBS=y +CONFIG_VENDOR_GOOGLE=y +CONFIG_NO_POST=y +# CONFIG_CONSOLE_SERIAL is not set +CONFIG_VBOOT=y +CONFIG_BOARD_GOOGLE_DIRINBOZ=y +CONFIG_FRAMEBUFFER_SET_VESA_MODE=y +CONFIG_FRAMEBUFFER_VESA_MODE_USER=y +CONFIG_FRAMEBUFFER_VESA_MODE=0x1d4 +# CONFIG_SMMSTORE is not set diff --git a/configs/zen2/config.morphius.uefi b/configs/zen2/config.morphius.uefi new file mode 100644 index 00000000000..1b8322d9e0d --- /dev/null +++ b/configs/zen2/config.morphius.uefi @@ -0,0 +1,11 @@ +CONFIG_LOCALVERSION="MrChromebox-4.19" +CONFIG_USE_AMD_BLOBS=y +CONFIG_VENDOR_GOOGLE=y +CONFIG_NO_POST=y +# CONFIG_CONSOLE_SERIAL is not set +CONFIG_VBOOT=y +CONFIG_BOARD_GOOGLE_MORPHIUS=y +CONFIG_FRAMEBUFFER_SET_VESA_MODE=y +CONFIG_FRAMEBUFFER_VESA_MODE_USER=y +CONFIG_FRAMEBUFFER_VESA_MODE=0x1d4 +# CONFIG_SMMSTORE is not set diff --git a/shrinkconfigs.sh b/shrinkconfigs.sh new file mode 100644 index 00000000000..bef517faee2 --- /dev/null +++ b/shrinkconfigs.sh @@ -0,0 +1,40 @@ +#!/bin/bash + +for filename in configs/*/config.*.uefi; do + [ -e "$filename" ] || continue + cp "$filename" .config + make savedefconfig + # remove a bunch of default things 'make defconfig' leaves in + sed -i '/^CONFIG_DRIVER_TPM_SPI_BUS=0x1/d' defconfig + sed -i '/^CONFIG_DRIVER_TPM_SPI_BUS=0x1/d' defconfig + sed -i '/^CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000/d' defconfig + sed -i '/^CONFIG_EDK2_BOOT_TIMEOUT=2/d' defconfig + sed -i '/^CONFIG_UART_PCI_ADDR=0x0/d' defconfig + sed -i '/^CONFIG_SUBSYSTEM_VENDOR_ID=0x0000/d' defconfig + sed -i '/^CONFIG_SUBSYSTEM_DEVICE_ID=0x0000/d' defconfig + sed -i '/^CONFIG_I2C_TRANSFER_TIMEOUT_US=500000/d' defconfig + sed -i '/^CONFIG_SMMSTORE_SIZE=0x40000/d' defconfig + sed -i '/^CONFIG_PCIEXP_HOTPLUG_BUSES=42/d' defconfig + sed -i '/^CONFIG_PCIEXP_HOTPLUG_MEM=0xc200000/d' defconfig + sed -i '/^CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x1c000000/d' defconfig + sed -i '/^CONFIG_PCIEXP_HOTPLUG_IO=0x2000/d' defconfig + sed -i '/^CONFIG_EDK2_SD_MMC_TIMEOUT=10/d' defconfig + sed -i '/^CONFIG_FSP_LOC=0xfff6e000/d' defconfig + sed -i '/^CONFIG_LINEAR_FRAMEBUFFER_MAX_HEIGHT=1600/d' defconfig + sed -i '/^CONFIG_LINEAR_FRAMEBUFFER_MAX_WIDTH=2560/d' defconfig + sed -i '/^CONFIG_PCIEXP_HOTPLUG_BUSES=8/d' defconfig + sed -i '/^CONFIG_PCIEXP_HOTPLUG_MEM=0x800000/d' defconfig + sed -i '/^CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000/d' defconfig + sed -i '/^CONFIG_CBFS_MCACHE_RW_PERCENTAGE=50/d' defconfig + sed -i '/^CONFIG_VBOOT_KEYBLOCK_VERSION=1/d' defconfig + sed -i '/^CONFIG_VBOOT_KEYBLOCK_PREAMBLE_FLAGS=0x0/d' defconfig + sed -i '/^CONFIG_AMD_FWM_POSITION_INDEX=2/d' defconfig + sed -i '/^CONFIG_ELOG_BOOT_COUNT_CMOS_OFFSET=144/d' defconfig + sed -i '/^CONFIG_CBFS_SIZE=0x01000000/d' defconfig + sed -i '/^CONFIG_AGESA_BINARY_PI_LOCATION=0xFFE00000/d' defconfig + sed -i '/^CONFIG_BOTTOMIO_POSITION=0xD0000000/d' defconfig + sed -i '/^CONFIG_AMD_FWM_POSITION_INDEX=1/d' defconfig + sed -i '/^CONFIG_CBFS_SIZE=0x01000000/d' defconfig + + cp defconfig "$filename" +done From 7b6f4b3c4b3779a4121232bf7a382e771e33a8e3 Mon Sep 17 00:00:00 2001 From: Matt DeVillier Date: Tue, 24 Jan 2023 12:37:27 -0600 Subject: [PATCH 121/137] mb/google/hatch/helios*: Fix SOF topology Change-Id: I9cefb18d760017a66b2ca7a9c7cbc026191b3447 Signed-off-by: Matt DeVillier --- src/mainboard/google/hatch/variants/helios/overridetree.cb | 4 ++-- .../google/hatch/variants/helios_diskswap/overridetree.cb | 4 ++-- 2 files changed, 4 insertions(+), 4 deletions(-) diff --git a/src/mainboard/google/hatch/variants/helios/overridetree.cb b/src/mainboard/google/hatch/variants/helios/overridetree.cb index 0b8e71d27dd..34fcdd1adfa 100644 --- a/src/mainboard/google/hatch/variants/helios/overridetree.cb +++ b/src/mainboard/google/hatch/variants/helios/overridetree.cb @@ -199,8 +199,8 @@ chip soc/intel/cannonlake end # GSPI #1 device pci 1f.3 on chip drivers/sof - register "spkr_tplg" = "max98357a" - register "jack_tplg" = "rt1011" + register "spkr_tplg" = "rt1011" + register "jack_tplg" = "rt5682" register "mic_tplg" = "_2ch_pdm0" device generic 0 on end end diff --git a/src/mainboard/google/hatch/variants/helios_diskswap/overridetree.cb b/src/mainboard/google/hatch/variants/helios_diskswap/overridetree.cb index 9e458ac523b..78dea3024db 100644 --- a/src/mainboard/google/hatch/variants/helios_diskswap/overridetree.cb +++ b/src/mainboard/google/hatch/variants/helios_diskswap/overridetree.cb @@ -217,8 +217,8 @@ chip soc/intel/cannonlake device generic 0 on end end chip drivers/sof - register "spkr_tplg" = "max98357a" - register "jack_tplg" = "rt1011" + register "spkr_tplg" = "rt1011" + register "jack_tplg" = "rt5682" register "mic_tplg" = "_2ch_pdm0" device generic 0 on end end From cbba6cb7d79987a5de4a6b0a6c38a872f657c000 Mon Sep 17 00:00:00 2001 From: Matt DeVillier Date: Tue, 24 Jan 2023 14:07:26 -0600 Subject: [PATCH 122/137] mb/google/dedede/magolor: i2c camera probe fixup Change-Id: I7b3a11bea5b988167850e3c0b6971582dd314043 Signed-off-by: Matt DeVillier --- src/mainboard/google/dedede/variants/magolor/overridetree.cb | 5 ----- 1 file changed, 5 deletions(-) diff --git a/src/mainboard/google/dedede/variants/magolor/overridetree.cb b/src/mainboard/google/dedede/variants/magolor/overridetree.cb index 3adafd67fa0..8fe65ddb1b2 100644 --- a/src/mainboard/google/dedede/variants/magolor/overridetree.cb +++ b/src/mainboard/google/dedede/variants/magolor/overridetree.cb @@ -367,7 +367,6 @@ chip soc/intel/jasperlake register "off_seq.ops[3]" = "SEQ_OPS_GPIO_DISABLE(0, 0)" device i2c 36 on - probe CAMERA_WFC CAMERA_UNPROVISIONED probe CAMERA_WFC CAMERA_OVTI5675 end end @@ -425,9 +424,7 @@ chip soc/intel/jasperlake register "vcm_compat" = ""dongwoon,dw9714"" device i2c 0C on - probe CAMERA_VCM CAMERA_VCM_UNPROVISIONED probe CAMERA_VCM CAMERA_VCM0 - probe CAMERA_WFC CAMERA_OVTI8856 end end chip drivers/intel/mipi_camera @@ -446,9 +443,7 @@ chip soc/intel/jasperlake register "nvm_compat" = ""atmel,24c08"" device i2c 50 on - probe CAMERA_VCM CAMERA_VCM_UNPROVISIONED probe CAMERA_VCM CAMERA_VCM0 - probe CAMERA_WFC CAMERA_OVTI8856 end end end From b5b2cae3940666e25c21c5570338fa4acd16ccdb Mon Sep 17 00:00:00 2001 From: Matt DeVillier Date: Wed, 25 Jan 2023 13:12:51 -0600 Subject: [PATCH 123/137] Revert "HACK: Wilco EC WIP" This reverts commit d1b668622c79154f77573a38ce2e5687d64a5268. --- src/ec/google/wilco/acpi/battery.asl | 75 +++++++++++++++++++++++++++- src/ec/google/wilco/chip.c | 15 ------ src/ec/google/wilco/commands.h | 6 --- src/ec/google/wilco/ec.h | 13 ----- 4 files changed, 74 insertions(+), 35 deletions(-) diff --git a/src/ec/google/wilco/acpi/battery.asl b/src/ec/google/wilco/acpi/battery.asl index ac7fdce3e36..2ead4c8b817 100644 --- a/src/ec/google/wilco/acpi/battery.asl +++ b/src/ec/google/wilco/acpi/battery.asl @@ -260,7 +260,80 @@ Device (BAT0) Method (_STA, 0, Serialized) { - Return (0x1f) + Return (ESTA (^_UID)) + } + + Method (_BST, 0, Serialized) + { + Return (EBST (^_UID, PBST)) + } + + Method (_BIF, 0, Serialized) + { + Return (EBIF (^_UID, PBIF)) + } + + Method (_BIX, 0, Serialized) + { + Return (EBIX (^_UID, PBIX)) + } +} + +Device (BAT1) +{ + Name (_HID, EisaId ("PNP0C0A")) + Name (_UID, 2) + Name (_PCL, Package () { \_SB }) + + Name (PBIF, Package () { + 0x00000001, /* 0x00: Power Unit: mAh */ + 0xFFFFFFFF, /* 0x01: Design Capacity */ + 0xFFFFFFFF, /* 0x02: Last Full Charge Capacity */ + 0x00000001, /* 0x03: Battery Technology: Rechargeable */ + 0xFFFFFFFF, /* 0x04: Design Voltage */ + 0x00000003, /* 0x05: Design Capacity of Warning */ + 0xFFFFFFFF, /* 0x06: Design Capacity of Low */ + 0x00000001, /* 0x07: Capacity Granularity 1 */ + 0x00000001, /* 0x08: Capacity Granularity 2 */ + "", /* 0x09: Model Number */ + "", /* 0x0a: Serial Number */ + "LION", /* 0x0b: Battery Type */ + "" /* 0x0c: OEM Information */ + }) + + Name (PBIX, Package () { + 0x00000000, /* 0x00: Revision */ + 0x00000001, /* 0x01: Power Unit: mAh */ + 0xFFFFFFFF, /* 0x02: Design Capacity */ + 0xFFFFFFFF, /* 0x03: Last Full Charge Capacity */ + 0x00000001, /* 0x04: Battery Technology: Rechargeable */ + 0xFFFFFFFF, /* 0x05: Design Voltage */ + 0x00000003, /* 0x06: Design Capacity of Warning */ + 0xFFFFFFFF, /* 0x07: Design Capacity of Low */ + 0x00000000, /* 0x08: Cycle Count */ + 0x00018000, /* 0x09: Measurement Accuracy (98.3%?) */ + 0x000001F4, /* 0x0a: Max Sampling Time (500ms) */ + 0x0000000a, /* 0x0b: Min Sampling Time (10ms) */ + 0xFFFFFFFF, /* 0x0c: Max Averaging Interval */ + 0xFFFFFFFF, /* 0x0d: Min Averaging Interval */ + 0x00000001, /* 0x0e: Capacity Granularity 1 */ + 0x00000001, /* 0x0f: Capacity Granularity 2 */ + "", /* 0x10 Model Number */ + "", /* 0x11: Serial Number */ + "LION", /* 0x12: Battery Type */ + "" /* 0x13: OEM Information */ + }) + + Name (PBST, Package () { + 0x00000000, /* 0x00: Battery State */ + 0xFFFFFFFF, /* 0x01: Battery Present Rate */ + 0xFFFFFFFF, /* 0x02: Battery Remaining Capacity */ + 0xFFFFFFFF, /* 0x03: Battery Present Voltage */ + }) + + Method (_STA, 0, Serialized) + { + Return (ESTA (^_UID)) } Method (_BST, 0, Serialized) diff --git a/src/ec/google/wilco/chip.c b/src/ec/google/wilco/chip.c index 6241941b7ce..7d85c6fe0fa 100644 --- a/src/ec/google/wilco/chip.c +++ b/src/ec/google/wilco/chip.c @@ -83,21 +83,6 @@ static const size_t ucsi_region_len = ARRAY_SIZE(ucsi_region_fields); static void wilco_ec_post_complete(void *unused) { wilco_ec_send(KB_BIOS_PROGRESS, BIOS_PROGRESS_POST_COMPLETE); - - if (!CONFIG(CHROMEOS)) { - int retval = wilco_ec_send_legacy_noargs(KB_EC_OS_BOOT); - if (retval) { - printk(BIOS_ERR, "Wilco EC: EC_OS_BOOT returned %d\n", retval); - } else { - printk(BIOS_INFO, "Wilco EC: EC_OS_BOOT returned %d\n", retval); - } - retval = wilco_ec_send_legacy(KB_EC_MODE, EC_MODE_EXIT_FIRMWARE); - if (retval) { - printk(BIOS_ERR, "Wilco EC: EC_MODE_EXIT_FIRMWARE returned %d\n", retval); - } else { - printk(BIOS_INFO, "Wilco EC: EC_MODE_EXIT_FIRMWARE returned %d\n", retval); - } - } } BOOT_STATE_INIT_ENTRY(BS_PAYLOAD_LOAD, BS_ON_EXIT, wilco_ec_post_complete, NULL); diff --git a/src/ec/google/wilco/commands.h b/src/ec/google/wilco/commands.h index d7ce64cff3f..b70f949fcbb 100644 --- a/src/ec/google/wilco/commands.h +++ b/src/ec/google/wilco/commands.h @@ -34,20 +34,14 @@ enum { KB_HW_MUTE_CONTROL = 0x60, /* Inform the EC that the host is about to enter S3 */ KB_SLP_EN = 0x64, - /* Inform EC of OS boot */ - KB_EC_OS_BOOT = 0x6b, /* Inform the EC about BIOS boot progress */ KB_BIOS_PROGRESS = 0xc2, /* Inform the EC that a fatal error occurred */ KB_ERR_CODE = 0x7b, - /* EC mode commands */ - KB_EC_MODE = 0x88, /* Set CPU ID */ KB_CPU_ID = 0xbf, }; -#define EC_MODE_EXIT_FIRMWARE 0x04 - enum ec_ram_addr { /* Indicate if EC uses signed firmware */ EC_RAM_SIGNED_FW = 0x5c, diff --git a/src/ec/google/wilco/ec.h b/src/ec/google/wilco/ec.h index 8f5a9bd85bb..cae864a7a52 100644 --- a/src/ec/google/wilco/ec.h +++ b/src/ec/google/wilco/ec.h @@ -11,7 +11,6 @@ enum wilco_ec_msg_type { WILCO_EC_MSG_RAW, /* Raw message, do not skip any data */ WILCO_EC_MSG_DEFAULT, /* Skip 1 byte of response data */ WILCO_EC_MSG_NO_RESPONSE, /* EC does not respond to command */ - WILCO_EC_MSG_LEGACY = 0x00f0, }; /** @@ -49,12 +48,6 @@ static inline int wilco_ec_send(uint8_t command, uint8_t param) ¶m, sizeof(param), NULL, 0); } -static inline int wilco_ec_send_legacy(uint8_t command, uint8_t param) -{ - return wilco_ec_mailbox(WILCO_EC_MSG_LEGACY, command, - ¶m, sizeof(param), NULL, 0); -} - /** * wilco_ec_send_noargs * @@ -70,12 +63,6 @@ static inline int wilco_ec_send_noargs(uint8_t command) NULL, 0, NULL, 0); } -static inline int wilco_ec_send_legacy_noargs(uint8_t command) -{ - return wilco_ec_mailbox(WILCO_EC_MSG_LEGACY, command, - NULL, 0, NULL, 0); -} - /** * wilco_ec_sendrecv * From 8538a53044d39434ff6f107bbdaef2ad67e36844 Mon Sep 17 00:00:00 2001 From: Matt DeVillier Date: Wed, 25 Jan 2023 13:46:54 -0600 Subject: [PATCH 124/137] Revert "HACK: Drallion WIP" This reverts commit 12d72a234ec799f7d1474ca07129f5d0555dfd43. --- src/mainboard/google/drallion/dsdt.asl | 1 - .../drallion/variants/drallion/devicetree.cb | 14 +++++++++++++- .../variants/drallion/include/variant/ec.h | 2 +- 3 files changed, 14 insertions(+), 3 deletions(-) diff --git a/src/mainboard/google/drallion/dsdt.asl b/src/mainboard/google/drallion/dsdt.asl index 0f503dffd9b..6e9bf02136e 100644 --- a/src/mainboard/google/drallion/dsdt.asl +++ b/src/mainboard/google/drallion/dsdt.asl @@ -22,7 +22,6 @@ DefinitionBlock( { #include #include - #include } /* Per board variant mainboard hooks. */ #include diff --git a/src/mainboard/google/drallion/variants/drallion/devicetree.cb b/src/mainboard/google/drallion/variants/drallion/devicetree.cb index 772f0e1f213..eae63bf4f46 100644 --- a/src/mainboard/google/drallion/variants/drallion/devicetree.cb +++ b/src/mainboard/google/drallion/variants/drallion/devicetree.cb @@ -222,7 +222,19 @@ chip soc/intel/cannonlake device domain 0 on device pci 00.0 on end # Host Bridge device pci 02.0 on - register "gfx" = "GMA_DEFAULT_PANEL(0)" + chip drivers/gfx/generic + register "device_count" = "1" + register "device[0].name" = ""LCD"" + # Address is set following the ACPI spec section A.3.2 + # for an internal panel on the first port of the graphics chip + register "device[0].addr" = "0x80010400" + register "device[0].privacy.enabled" = "1" + register "device[0].privacy.detect_function" = ""\\_SB.PCI0.LPCB.EC0.GPVD"" + register "device[0].privacy.status_function" = ""\\_SB.PCI0.LPCB.EC0.GPVX"" + register "device[0].privacy.enable_function" = ""\\_SB.PCI0.LPCB.EC0.EPVX"" + register "device[0].privacy.disable_function" = ""\\_SB.PCI0.LPCB.EC0.DPVX"" + device generic 0 on end + end end # Integrated Graphics Device device pci 04.0 on end # SA Thermal device device pci 12.0 on end # Thermal Subsystem diff --git a/src/mainboard/google/drallion/variants/drallion/include/variant/ec.h b/src/mainboard/google/drallion/variants/drallion/include/variant/ec.h index c46e69b8ba5..ba9c01d8e8b 100644 --- a/src/mainboard/google/drallion/variants/drallion/include/variant/ec.h +++ b/src/mainboard/google/drallion/variants/drallion/include/variant/ec.h @@ -19,6 +19,6 @@ #define EC_ENABLE_DPTF /* Enable privacy screen functionality */ -//#define EC_ENABLE_PRIVACY +#define EC_ENABLE_PRIVACY #endif From 0597e175aa9d45711daab11063906fb02f11873c Mon Sep 17 00:00:00 2001 From: Matt DeVillier Date: Wed, 25 Jan 2023 14:27:24 -0600 Subject: [PATCH 125/137] ec/google/wilco: Fix ACPI EC RAM read/write ops While debugging lack of battery status under Windows, it was discovered that the read/write flags in the args to the EC RAM 'ECRW' method were not being correctly identified. Force set them from the R() and W() methods which call ECRW() so those calls are processed properly. TEST=build/boot Windows on google/drallion, verify battery status, charging, etc are all reported properly. Change-Id: I2a40b8d50ba65213813c781e53b56cc1a8b8debf Signed-off-by: Matt DeVillier --- src/ec/google/wilco/acpi/ec.asl | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/src/ec/google/wilco/acpi/ec.asl b/src/ec/google/wilco/acpi/ec.asl index 3a9256eb093..bce3441d87c 100644 --- a/src/ec/google/wilco/acpi/ec.asl +++ b/src/ec/google/wilco/acpi/ec.asl @@ -124,6 +124,8 @@ Device (EC0) */ Method (R, 1, Serialized, 2) { + /* Set read operation */ + Arg0[2] = 0 Return (ECRW (Arg0, 0)) } @@ -134,6 +136,8 @@ Device (EC0) */ Method (W, 2, Serialized, 2) { + /* Set write operation */ + Arg0[2] = 1 Return (ECRW (Arg0, Arg1)) } From dda43de64da1d42849ba0df49ec410bd66e0c871 Mon Sep 17 00:00:00 2001 From: Matt DeVillier Date: Sun, 29 Jan 2023 15:36:45 -0600 Subject: [PATCH 126/137] ec/google/wilco/acpi: Add DPTF RCDP() method The Windows DPTF drivers expect this emthod, and if not present appear to hang. Adding this method fixes DPTF under Windows on drallion. Modeled after existing method used by chrome-ec. TEST=build/boot Win11 on google/drallion, verify DPTF functional. Change-Id: I6570345379da413273251ecf5209c4997aac9b11 Original-patch-by: Coolstar Signed-off-by: Matt DeVillier --- src/ec/google/wilco/acpi/dptf.asl | 13 +++++++++++++ 1 file changed, 13 insertions(+) diff --git a/src/ec/google/wilco/acpi/dptf.asl b/src/ec/google/wilco/acpi/dptf.asl index 6de72e817d0..210f773c7ed 100644 --- a/src/ec/google/wilco/acpi/dptf.asl +++ b/src/ec/google/wilco/acpi/dptf.asl @@ -116,3 +116,16 @@ Method (PATX, 0, Serialized) /* Clear sensor events */ W (DWTQ, Local0) } + +/* + * Read current Device DPTF Profile Number + */ +Method (RCDP, 0, NotSerialized) +{ + Local0 = R(DTRI) + If (Local0 == 0) { + Return (R(OTBL)) + } else { + Return (Local0 - 1) + } +} From 58bd5b8e8917db9437b81c52c146b39be9375287 Mon Sep 17 00:00:00 2001 From: Matt DeVillier Date: Wed, 25 Jan 2023 14:27:42 -0600 Subject: [PATCH 127/137] mb/google/drallion: Add ACPI brightness controls Enables display backlight control under Windows. TEST=build/boot Win11 on drallion, verify OS backlight control available and functional. Change-Id: I85065f22b825a7616fa4ac632c42ae7972091e24 Signed-off-by: Matt DeVillier --- src/mainboard/google/drallion/dsdt.asl | 1 + src/mainboard/google/drallion/variants/drallion/devicetree.cb | 1 + 2 files changed, 2 insertions(+) diff --git a/src/mainboard/google/drallion/dsdt.asl b/src/mainboard/google/drallion/dsdt.asl index 6e9bf02136e..0f503dffd9b 100644 --- a/src/mainboard/google/drallion/dsdt.asl +++ b/src/mainboard/google/drallion/dsdt.asl @@ -22,6 +22,7 @@ DefinitionBlock( { #include #include + #include } /* Per board variant mainboard hooks. */ #include diff --git a/src/mainboard/google/drallion/variants/drallion/devicetree.cb b/src/mainboard/google/drallion/variants/drallion/devicetree.cb index eae63bf4f46..4657cebcc26 100644 --- a/src/mainboard/google/drallion/variants/drallion/devicetree.cb +++ b/src/mainboard/google/drallion/variants/drallion/devicetree.cb @@ -222,6 +222,7 @@ chip soc/intel/cannonlake device domain 0 on device pci 00.0 on end # Host Bridge device pci 02.0 on + register "gfx" = "GMA_DEFAULT_PANEL(0)" chip drivers/gfx/generic register "device_count" = "1" register "device[0].name" = ""LCD"" From 58bb760a9aa612e28f3b3f243db2bde36ba47450 Mon Sep 17 00:00:00 2001 From: Matt DeVillier Date: Wed, 25 Jan 2023 16:36:39 -0600 Subject: [PATCH 128/137] mb/google/poppy/rammus: Fix NHLT init Commit bf3c648f ("soc/intel/skl; mb/google/eve,poppy: Update NHLT methods") contained a copy/paste error for rammus, swapping the max98373 entry for the correct max98927 one. Correct it back. TEST=build/boot Windows on rammus, verify audio functional with coolstar's AVS drivers. Change-Id: Ibcd4b752e01866a3dd54997f1d2a6c079b07b7a3 Signed-off-by: Matt DeVillier --- src/mainboard/google/poppy/variants/rammus/nhlt.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/mainboard/google/poppy/variants/rammus/nhlt.c b/src/mainboard/google/poppy/variants/rammus/nhlt.c index f8b3d05fe4c..938672f6b5e 100644 --- a/src/mainboard/google/poppy/variants/rammus/nhlt.c +++ b/src/mainboard/google/poppy/variants/rammus/nhlt.c @@ -17,7 +17,7 @@ void variant_nhlt_init(struct nhlt *nhlt) /* Maxim MAX98927 Smart Amps for left and right channel */ /* Render time_slot is 0 and feedback time_slot is 2 */ - if (nhlt_soc_add_max98373(nhlt, AUDIO_LINK_SSP0, 0, 2)) + if (nhlt_soc_add_max98927(nhlt, AUDIO_LINK_SSP0, 0, 2)) printk(BIOS_ERR, "Couldn't add Maxim MAX98927\n"); } From 1e4ca20dceb9432f888459ea6073f3fb902f7f2a Mon Sep 17 00:00:00 2001 From: Matt DeVillier Date: Thu, 26 Jan 2023 09:27:20 -0600 Subject: [PATCH 129/137] mb/google/*: re-enable s0ix for FIZZ Disabling S0ix broke sleep under Windows. S3 can be enabled via registry change instead. Change-Id: I38f235a6a114f967ce81366dcd28a42f3f8590d4 Signed-off-by: Matt DeVillier --- src/mainboard/google/fizz/variants/baseboard/devicetree.cb | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/mainboard/google/fizz/variants/baseboard/devicetree.cb b/src/mainboard/google/fizz/variants/baseboard/devicetree.cb index 631b5d8e73f..5ecc77bc779 100644 --- a/src/mainboard/google/fizz/variants/baseboard/devicetree.cb +++ b/src/mainboard/google/fizz/variants/baseboard/devicetree.cb @@ -62,7 +62,7 @@ chip soc/intel/skylake register "dptf_enable" = "1" # Enable S0ix - register "s0ix_enable" = "0" + register "s0ix_enable" = "1" # FSP Configuration register "SataSalpSupport" = "0" From 59b59b690706f31b63159a79be1a3c1cf7a8014b Mon Sep 17 00:00:00 2001 From: Matt DeVillier Date: Thu, 26 Jan 2023 12:26:17 -0600 Subject: [PATCH 130/137] mb/google/fizz/fizz: update VBT Drop fixed resolution at boot, disable eFP Change-Id: Iecede735bc1266af837e791e6c024aec2f9a8a80 Signed-off-by: Matt DeVillier --- .../google/fizz/variants/fizz/data.vbt | Bin 4608 -> 4608 bytes 1 file changed, 0 insertions(+), 0 deletions(-) diff --git a/src/mainboard/google/fizz/variants/fizz/data.vbt b/src/mainboard/google/fizz/variants/fizz/data.vbt index dbbf475f217e51dc4ae999081a05079e45efd2e8..66797427bc9595a85a2082652e5d07f40335e59d 100644 GIT binary patch delta 36 scmZorX;7IU#e9dsV6r2V@J53IM#f8<7c#anGqP;fVAbH6e2HxX0Lz05A^-pY delta 44 zcmZorX;7IU#jM3(Fxinwc%wl9BjdHr3mMy(8D%zWuxjwIGag`OV7S0E`6Am&00{mJ AApigX From 7322ff77888d12099739c9acd6921002262bc2b8 Mon Sep 17 00:00:00 2001 From: Matt DeVillier Date: Sun, 29 Jan 2023 12:12:56 -0600 Subject: [PATCH 131/137] cfg: FIZZ use GOP driver Fixes HDMI audio under Windows Change-Id: Ie32860fa6e080e8f7b85ca411cfe12e507ff27e8 Signed-off-by: Matt DeVillier --- configs/kbl/config.fizz.uefi | 2 ++ 1 file changed, 2 insertions(+) diff --git a/configs/kbl/config.fizz.uefi b/configs/kbl/config.fizz.uefi index 38854a04177..15bb4f76d97 100644 --- a/configs/kbl/config.fizz.uefi +++ b/configs/kbl/config.fizz.uefi @@ -15,3 +15,5 @@ CONFIG_EC_GOOGLE_CHROMEEC_FIRMWARE_EXTERNAL=y CONFIG_EC_GOOGLE_CHROMEEC_FIRMWARE_FILE="3rdparty/blobs/mainboard/google/fizz/ec.RW.flat" CONFIG_HAVE_ME_BIN=y CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION=y +CONFIG_NO_GFX_INIT=y +CONFIG_EDK2_GOP_DRIVER=y From c79c3f740b9da7c7dbdbe58ca451465ad9570a56 Mon Sep 17 00:00:00 2001 From: Matt DeVillier Date: Thu, 26 Jan 2023 14:33:54 -0600 Subject: [PATCH 132/137] ec/google/chrome-ec: Demote Vivaldi printk from error to info Not all Chrome-EC devices have a keyboard or use Vivaldi for key remapping, so demote the printk output when the EC doesn't support it from ERROR to INFO. Adjust the printk text for clarity. Change-Id: I14059f4e3e56ff891f302601d5acc1bb842cffc1 Signed-off-by: Matt DeVillier --- src/ec/google/chromeec/ec_acpi.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/ec/google/chromeec/ec_acpi.c b/src/ec/google/chromeec/ec_acpi.c index 0699705386a..4b16ccc5e3f 100644 --- a/src/ec/google/chromeec/ec_acpi.c +++ b/src/ec/google/chromeec/ec_acpi.c @@ -239,7 +239,7 @@ static void fill_ssdt_ps2_keyboard(const struct device *dev) if (google_chromeec_get_keybd_config(&keybd) || !keybd.num_top_row_keys || keybd.num_top_row_keys > MAX_TOP_ROW_KEYS) { - printk(BIOS_ERR, "PS2K: Bad resp from EC. Vivaldi disabled!\n"); + printk(BIOS_INFO, "PS2K: Unsupported or bad resp from EC. Vivaldi disabled!\n"); return; } From edd87c589627da0aede0e26f7125249cc52b3efd Mon Sep 17 00:00:00 2001 From: Matt DeVillier Date: Thu, 26 Jan 2023 14:37:44 -0600 Subject: [PATCH 133/137] drivers/net/r8168: Demote MAC lookup printk from error to warn Some older devices use the vpd key 'ethernet_mac' vs 'ethernet_mac0' for the first/only LAN NIC, so don't treat the key lookup as an error. If no MAC is able to be found, another error will be printed later in the driver init. TEST=build/boot google/fizz, dump cbmem log, verify 'ethernet_mac0' lookup failure printk output at warning level. Change-Id: If5226f4686a819a7020fd14f130181420ee1462b Signed-off-by: Matt DeVillier --- src/drivers/net/r8168.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/drivers/net/r8168.c b/src/drivers/net/r8168.c index abdae8c2d1c..c5b1224bcc5 100644 --- a/src/drivers/net/r8168.c +++ b/src/drivers/net/r8168.c @@ -110,7 +110,7 @@ static enum cb_err fetch_mac_vpd_key(u8 *macstrbuf, const char *vpd_key) search_length); if (offset == search_length) { - printk(BIOS_ERR, "Could not locate '%s' in VPD\n", vpd_key); + printk(BIOS_WARNING, "Could not locate '%s' in VPD\n", vpd_key); rdev_munmap(&rdev, search_address); return CB_ERR; } From ea1a3da7e914f5ecfb9daa2af262a4c648bc0b84 Mon Sep 17 00:00:00 2001 From: Matt DeVillier Date: Thu, 26 Jan 2023 15:14:42 -0600 Subject: [PATCH 134/137] drivers/vpd: Demote FMAP not found printk from error to warn Not all firmware which uses VPD uses both RO and RW regions, so either one not existing is not necessarily an error. Change-Id: I50f43a25ee24a642c39e2f0b52de2d4fef023f3b Signed-off-by: Matt DeVillier --- src/drivers/vpd/vpd.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/drivers/vpd/vpd.c b/src/drivers/vpd/vpd.c index 24b878f3f24..4bd5f60c700 100644 --- a/src/drivers/vpd/vpd.c +++ b/src/drivers/vpd/vpd.c @@ -50,7 +50,7 @@ static void init_vpd_rdev(const char *fmap_name, struct region_device *rdev) int32_t size; if (fmap_locate_area_as_rdev(fmap_name, rdev)) { - printk(BIOS_ERR, "%s: No %s FMAP section.\n", __func__, + printk(BIOS_WARNING, "%s: No %s FMAP section.\n", __func__, fmap_name); goto fail; } From 28be708698711b050964c60360ff5362944fa929 Mon Sep 17 00:00:00 2001 From: Matt DeVillier Date: Fri, 27 Jan 2023 19:51:35 -0600 Subject: [PATCH 135/137] mb/google/volteer/eldrid: Fix touchscreen under Windows Under Win11, a longer delay after asserting reset is needed for the Goodix touchscreen to init properly. Increase the reset delay to match that used for the Goodix touchscreen by other volteer variants (120ms). TEST=build/boot Win11, Linux on eldrid variant with Goodix touchscreen, verify functional. Change-Id: I489f037f0bbade9567aad2ad64404a5ac66965d9 Signed-off-by: Matt DeVillier --- src/mainboard/google/volteer/variants/eldrid/overridetree.cb | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/mainboard/google/volteer/variants/eldrid/overridetree.cb b/src/mainboard/google/volteer/variants/eldrid/overridetree.cb index 862e4c88c6e..7bb91eacef5 100644 --- a/src/mainboard/google/volteer/variants/eldrid/overridetree.cb +++ b/src/mainboard/google/volteer/variants/eldrid/overridetree.cb @@ -147,7 +147,7 @@ chip soc/intel/tigerlake register "generic.detect" = "1" register "generic.reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_C10)" - register "generic.reset_delay_ms" = "30" + register "generic.reset_delay_ms" = "120" register "generic.reset_off_delay_ms" = "3" register "generic.enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_A8)" register "generic.enable_delay_ms" = "12" From ea392dbfcb464dab864d9cfd445d14df3de19faa Mon Sep 17 00:00:00 2001 From: Matt DeVillier Date: Sun, 29 Jan 2023 16:59:24 -0600 Subject: [PATCH 136/137] cfgs,build-uefi.sh: Use git rev for localversion Removes need to continually edit localversion in config Change-Id: I8a664151fb1e997080b2cb513600e524e8a08b23 Signed-off-by: Matt DeVillier --- build-uefi.sh | 4 ++++ configs/adl/config.banshee.uefi | 1 - configs/apl/config.astronaut.uefi | 1 - configs/apl/config.babymega.uefi | 1 - configs/apl/config.babytiger.uefi | 1 - configs/apl/config.blacktip.uefi | 1 - configs/apl/config.blue.uefi | 1 - configs/apl/config.bruce.uefi | 1 - configs/apl/config.coral.uefi | 1 - configs/apl/config.electro.uefi | 1 - configs/apl/config.epaulette.uefi | 1 - configs/apl/config.lava.uefi | 1 - configs/apl/config.nasher.uefi | 1 - configs/apl/config.nasher360.uefi | 1 - configs/apl/config.pyro.uefi | 1 - configs/apl/config.rabbid.uefi | 1 - configs/apl/config.reef.uefi | 1 - configs/apl/config.robo.uefi | 1 - configs/apl/config.robo360.uefi | 1 - configs/apl/config.sand.uefi | 1 - configs/apl/config.santa.uefi | 1 - configs/apl/config.snappy.uefi | 1 - configs/apl/config.whitetip.uefi | 1 - configs/bdw/config.auron_paine.uefi | 1 - configs/bdw/config.auron_yuna.uefi | 1 - configs/bdw/config.buddy.uefi | 1 - configs/bdw/config.gandof.uefi | 1 - configs/bdw/config.guado.uefi | 1 - configs/bdw/config.librem_13v1.uefi | 1 - configs/bdw/config.librem_15v2.uefi | 1 - configs/bdw/config.lulu.uefi | 1 - configs/bdw/config.rikku.uefi | 1 - configs/bdw/config.samus.uefi | 1 - configs/bdw/config.tidus.uefi | 1 - configs/bsw/config.banon.uefi | 1 - configs/bsw/config.celes.uefi | 1 - configs/bsw/config.cyan.uefi | 1 - configs/bsw/config.edgar.uefi | 1 - configs/bsw/config.kefka.uefi | 1 - configs/bsw/config.reks.uefi | 1 - configs/bsw/config.relm.uefi | 1 - configs/bsw/config.setzer.uefi | 1 - configs/bsw/config.terra.uefi | 1 - configs/bsw/config.ultima.uefi | 1 - configs/bsw/config.wizpig.uefi | 1 - configs/byt/config.banjo.uefi | 1 - configs/byt/config.candy.uefi | 1 - configs/byt/config.clapper.uefi | 1 - configs/byt/config.enguarde.uefi | 1 - configs/byt/config.glimmer.uefi | 1 - configs/byt/config.gnawty.uefi | 1 - configs/byt/config.heli.uefi | 1 - configs/byt/config.kip.uefi | 1 - configs/byt/config.ninja.uefi | 1 - configs/byt/config.orco.uefi | 1 - configs/byt/config.quawks.uefi | 1 - configs/byt/config.squawks.uefi | 1 - configs/byt/config.sumo.uefi | 1 - configs/byt/config.swanky.uefi | 1 - configs/byt/config.winky.uefi | 1 - configs/cml/config.akemi.uefi | 1 - configs/cml/config.dooly.uefi | 1 - configs/cml/config.dragonair.uefi | 1 - configs/cml/config.drallion.uefi | 1 - configs/cml/config.dratini.uefi | 1 - configs/cml/config.duffy.uefi | 1 - configs/cml/config.faffy.uefi | 1 - configs/cml/config.helios.uefi | 1 - configs/cml/config.jinlon.uefi | 1 - configs/cml/config.kaisa.uefi | 1 - configs/cml/config.kindred.uefi | 1 - configs/cml/config.kled.uefi | 1 - configs/cml/config.kohaku.uefi | 1 - configs/cml/config.librem_14.uefi | 1 - configs/cml/config.librem_mini_v2.uefi | 1 - configs/cml/config.nightfury.uefi | 1 - configs/cml/config.noibat.uefi | 1 - configs/cml/config.wyvern.uefi | 1 - configs/glk/config.ampton.uefi | 1 - configs/glk/config.apel.uefi | 1 - configs/glk/config.bloog.uefi | 1 - configs/glk/config.blooglet.uefi | 1 - configs/glk/config.blooguard.uefi | 1 - configs/glk/config.blorb.uefi | 1 - configs/glk/config.bluebird.uefi | 1 - configs/glk/config.bobba.uefi | 1 - configs/glk/config.bobba360.uefi | 1 - configs/glk/config.casta.uefi | 1 - configs/glk/config.dood.uefi | 1 - configs/glk/config.dorp.uefi | 1 - configs/glk/config.droid.uefi | 1 - configs/glk/config.fleex.uefi | 1 - configs/glk/config.foob.uefi | 1 - configs/glk/config.foob360.uefi | 1 - configs/glk/config.garfour.uefi | 1 - configs/glk/config.garg.uefi | 1 - configs/glk/config.garg360.uefi | 1 - configs/glk/config.grabbiter.uefi | 1 - configs/glk/config.laser.uefi | 1 - configs/glk/config.laser14.uefi | 1 - configs/glk/config.lick.uefi | 1 - configs/glk/config.meep.uefi | 1 - configs/glk/config.mimrock.uefi | 1 - configs/glk/config.nospike.uefi | 1 - configs/glk/config.orbatrix.uefi | 1 - configs/glk/config.phaser.uefi | 1 - configs/glk/config.phaser360.uefi | 1 - configs/glk/config.phaser360s.uefi | 1 - configs/glk/config.sparky.uefi | 1 - configs/glk/config.sparky360.uefi | 1 - configs/glk/config.vorticon.uefi | 1 - configs/glk/config.vortininja.uefi | 1 - configs/hsw/config.falco.uefi | 1 - configs/hsw/config.leon.uefi | 1 - configs/hsw/config.mccloud.uefi | 1 - configs/hsw/config.monroe.uefi | 1 - configs/hsw/config.panther.uefi | 1 - configs/hsw/config.peppy.uefi | 1 - configs/hsw/config.tricky.uefi | 1 - configs/hsw/config.wolf.uefi | 1 - configs/hsw/config.zako.uefi | 1 - configs/jsl/config.bugzzy.uefi | 1 - configs/jsl/config.drawcia.uefi | 1 - configs/jsl/config.drawlat.uefi | 1 - configs/jsl/config.drawman.uefi | 1 - configs/jsl/config.lantis.uefi | 1 - configs/jsl/config.magpie.uefi | 1 - configs/kbl/config.atlas.uefi | 1 - configs/kbl/config.eve.uefi | 1 - configs/kbl/config.fizz.uefi | 1 - configs/kbl/config.karma.uefi | 1 - configs/kbl/config.leona.uefi | 1 - configs/kbl/config.librem_13v4.uefi | 1 - configs/kbl/config.librem_15v4.uefi | 1 - configs/kbl/config.nami.uefi | 1 - configs/kbl/config.nautilus.uefi | 1 - configs/kbl/config.nocturne.uefi | 1 - configs/kbl/config.shyvana.uefi | 1 - configs/kbl/config.soraka.uefi | 1 - configs/skl/config.asuka.uefi | 1 - configs/skl/config.caroline.uefi | 1 - configs/skl/config.cave.uefi | 1 - configs/skl/config.chell.uefi | 1 - configs/skl/config.lars.uefi | 1 - configs/skl/config.librem_13v2.uefi | 1 - configs/skl/config.librem_15v3.uefi | 1 - configs/skl/config.sentry.uefi | 1 - configs/snb_ivb/config.butterfly.uefi | 1 - configs/snb_ivb/config.link.uefi | 1 - configs/snb_ivb/config.lumpy.uefi | 1 - configs/snb_ivb/config.parrot.uefi | 1 - configs/snb_ivb/config.stout.uefi | 1 - configs/snb_ivb/config.stumpy.uefi | 1 - configs/str/config.aleena.uefi | 1 - configs/str/config.barla.uefi | 1 - configs/str/config.careena.uefi | 1 - configs/str/config.kasumi.uefi | 1 - configs/str/config.liara.uefi | 1 - configs/str/config.treeya.uefi | 1 - configs/tgl/config.chronicler.uefi | 1 - configs/tgl/config.collis.uefi | 1 - configs/tgl/config.copano.uefi | 1 - configs/tgl/config.delbin.uefi | 1 - configs/tgl/config.drobit.uefi | 1 - configs/tgl/config.eldrid.uefi | 1 - configs/tgl/config.elemi.uefi | 1 - configs/tgl/config.lillipup.uefi | 1 - configs/tgl/config.lindar.uefi | 1 - configs/tgl/config.voema.uefi | 1 - configs/tgl/config.volet.uefi | 1 - configs/tgl/config.volta.uefi | 1 - configs/tgl/config.voxel.uefi | 1 - configs/whl/config.librem_mini.uefi | 1 - configs/whl/config.sarien.uefi | 1 - configs/zen2/config.berknip.uefi | 1 - configs/zen2/config.dirinboz.uefi | 1 - configs/zen2/config.morphius.uefi | 1 - 177 files changed, 4 insertions(+), 176 deletions(-) diff --git a/build-uefi.sh b/build-uefi.sh index 5ce17e196c6..0c40bf33eb3 100755 --- a/build-uefi.sh +++ b/build-uefi.sh @@ -21,12 +21,16 @@ else build_targets=($@) fi +# get git rev +rev=$(git describe --tags --dirty) + for device in "${build_targets[@]}"; do filename="coreboot_tiano-${device}-mrchromebox_$(date +"%Y%m%d").rom" rm -f ~/dev/firmware/${filename}* rm -rf ./build cfg_file=$(find ./configs -name "config.$device.uefi") cp "$cfg_file" .config + echo "CONFIG_LOCALVERSION=\"${rev}\"" >> .config make clean make olddefconfig make -j$(nproc) diff --git a/configs/adl/config.banshee.uefi b/configs/adl/config.banshee.uefi index 04442f556e1..ae247cee7d6 100644 --- a/configs/adl/config.banshee.uefi +++ b/configs/adl/config.banshee.uefi @@ -1,4 +1,3 @@ -CONFIG_LOCALVERSION="MrChromebox-4.19" CONFIG_VENDOR_GOOGLE=y CONFIG_NO_POST=y CONFIG_CBFS_SIZE=0x400000 diff --git a/configs/apl/config.astronaut.uefi b/configs/apl/config.astronaut.uefi index b389a0a9d38..0672c1fb29a 100644 --- a/configs/apl/config.astronaut.uefi +++ b/configs/apl/config.astronaut.uefi @@ -1,4 +1,3 @@ -CONFIG_LOCALVERSION="MrChromebox-4.19" CONFIG_VENDOR_GOOGLE=y CONFIG_NO_POST=y # CONFIG_CONSOLE_SERIAL is not set diff --git a/configs/apl/config.babymega.uefi b/configs/apl/config.babymega.uefi index d6f4c74ad8b..9c1f7b6bf60 100644 --- a/configs/apl/config.babymega.uefi +++ b/configs/apl/config.babymega.uefi @@ -1,4 +1,3 @@ -CONFIG_LOCALVERSION="MrChromebox-4.19" CONFIG_VENDOR_GOOGLE=y CONFIG_NO_POST=y # CONFIG_CONSOLE_SERIAL is not set diff --git a/configs/apl/config.babytiger.uefi b/configs/apl/config.babytiger.uefi index 077ce5a3461..50801afbc74 100644 --- a/configs/apl/config.babytiger.uefi +++ b/configs/apl/config.babytiger.uefi @@ -1,4 +1,3 @@ -CONFIG_LOCALVERSION="MrChromebox-4.19" CONFIG_VENDOR_GOOGLE=y CONFIG_NO_POST=y # CONFIG_CONSOLE_SERIAL is not set diff --git a/configs/apl/config.blacktip.uefi b/configs/apl/config.blacktip.uefi index c1eed92fc9b..a31988b5615 100644 --- a/configs/apl/config.blacktip.uefi +++ b/configs/apl/config.blacktip.uefi @@ -1,4 +1,3 @@ -CONFIG_LOCALVERSION="MrChromebox-4.19" CONFIG_VENDOR_GOOGLE=y CONFIG_NO_POST=y # CONFIG_CONSOLE_SERIAL is not set diff --git a/configs/apl/config.blue.uefi b/configs/apl/config.blue.uefi index bbf1a8f4bf1..de5ebf5d894 100644 --- a/configs/apl/config.blue.uefi +++ b/configs/apl/config.blue.uefi @@ -1,4 +1,3 @@ -CONFIG_LOCALVERSION="MrChromebox-4.19" CONFIG_VENDOR_GOOGLE=y CONFIG_NO_POST=y # CONFIG_CONSOLE_SERIAL is not set diff --git a/configs/apl/config.bruce.uefi b/configs/apl/config.bruce.uefi index 5190d96adb7..d39b87895f1 100644 --- a/configs/apl/config.bruce.uefi +++ b/configs/apl/config.bruce.uefi @@ -1,4 +1,3 @@ -CONFIG_LOCALVERSION="MrChromebox-4.19" CONFIG_VENDOR_GOOGLE=y CONFIG_NO_POST=y # CONFIG_CONSOLE_SERIAL is not set diff --git a/configs/apl/config.coral.uefi b/configs/apl/config.coral.uefi index 8af4e00358f..f711df82aa6 100644 --- a/configs/apl/config.coral.uefi +++ b/configs/apl/config.coral.uefi @@ -1,4 +1,3 @@ -CONFIG_LOCALVERSION="MrChromebox-4.19" CONFIG_VENDOR_GOOGLE=y CONFIG_NO_POST=y # CONFIG_CONSOLE_SERIAL is not set diff --git a/configs/apl/config.electro.uefi b/configs/apl/config.electro.uefi index d412e6e1924..0cb045f1ea3 100644 --- a/configs/apl/config.electro.uefi +++ b/configs/apl/config.electro.uefi @@ -1,4 +1,3 @@ -CONFIG_LOCALVERSION="MrChromebox-4.19" CONFIG_VENDOR_GOOGLE=y CONFIG_NO_POST=y # CONFIG_CONSOLE_SERIAL is not set diff --git a/configs/apl/config.epaulette.uefi b/configs/apl/config.epaulette.uefi index fbd6bebcca5..b085420287b 100644 --- a/configs/apl/config.epaulette.uefi +++ b/configs/apl/config.epaulette.uefi @@ -1,4 +1,3 @@ -CONFIG_LOCALVERSION="MrChromebox-4.19" CONFIG_VENDOR_GOOGLE=y CONFIG_NO_POST=y # CONFIG_CONSOLE_SERIAL is not set diff --git a/configs/apl/config.lava.uefi b/configs/apl/config.lava.uefi index ff77a0c90db..6297c9a2e9c 100644 --- a/configs/apl/config.lava.uefi +++ b/configs/apl/config.lava.uefi @@ -1,4 +1,3 @@ -CONFIG_LOCALVERSION="MrChromebox-4.19" CONFIG_VENDOR_GOOGLE=y CONFIG_NO_POST=y # CONFIG_CONSOLE_SERIAL is not set diff --git a/configs/apl/config.nasher.uefi b/configs/apl/config.nasher.uefi index a11de9863ba..7d0c7b35bda 100644 --- a/configs/apl/config.nasher.uefi +++ b/configs/apl/config.nasher.uefi @@ -1,4 +1,3 @@ -CONFIG_LOCALVERSION="MrChromebox-4.19" CONFIG_VENDOR_GOOGLE=y CONFIG_NO_POST=y # CONFIG_CONSOLE_SERIAL is not set diff --git a/configs/apl/config.nasher360.uefi b/configs/apl/config.nasher360.uefi index a1496fc8376..35e988621eb 100644 --- a/configs/apl/config.nasher360.uefi +++ b/configs/apl/config.nasher360.uefi @@ -1,4 +1,3 @@ -CONFIG_LOCALVERSION="MrChromebox-4.19" CONFIG_VENDOR_GOOGLE=y CONFIG_NO_POST=y # CONFIG_CONSOLE_SERIAL is not set diff --git a/configs/apl/config.pyro.uefi b/configs/apl/config.pyro.uefi index 196a974e2df..d1dfc859532 100644 --- a/configs/apl/config.pyro.uefi +++ b/configs/apl/config.pyro.uefi @@ -1,4 +1,3 @@ -CONFIG_LOCALVERSION="MrChromebox-4.19" CONFIG_VENDOR_GOOGLE=y CONFIG_NO_POST=y # CONFIG_CONSOLE_SERIAL is not set diff --git a/configs/apl/config.rabbid.uefi b/configs/apl/config.rabbid.uefi index 82a5c15e001..8383c6eb712 100644 --- a/configs/apl/config.rabbid.uefi +++ b/configs/apl/config.rabbid.uefi @@ -1,4 +1,3 @@ -CONFIG_LOCALVERSION="MrChromebox-4.19" CONFIG_VENDOR_GOOGLE=y CONFIG_NO_POST=y # CONFIG_CONSOLE_SERIAL is not set diff --git a/configs/apl/config.reef.uefi b/configs/apl/config.reef.uefi index 8e47bcb5c7f..9fbb8832006 100644 --- a/configs/apl/config.reef.uefi +++ b/configs/apl/config.reef.uefi @@ -1,4 +1,3 @@ -CONFIG_LOCALVERSION="MrChromebox-4.19" CONFIG_VENDOR_GOOGLE=y CONFIG_NO_POST=y # CONFIG_CONSOLE_SERIAL is not set diff --git a/configs/apl/config.robo.uefi b/configs/apl/config.robo.uefi index 347ba3d460c..7f5f208cd4f 100644 --- a/configs/apl/config.robo.uefi +++ b/configs/apl/config.robo.uefi @@ -1,4 +1,3 @@ -CONFIG_LOCALVERSION="MrChromebox-4.19" CONFIG_VENDOR_GOOGLE=y CONFIG_NO_POST=y # CONFIG_CONSOLE_SERIAL is not set diff --git a/configs/apl/config.robo360.uefi b/configs/apl/config.robo360.uefi index ba9dc671238..fa654b03322 100644 --- a/configs/apl/config.robo360.uefi +++ b/configs/apl/config.robo360.uefi @@ -1,4 +1,3 @@ -CONFIG_LOCALVERSION="MrChromebox-4.19" CONFIG_VENDOR_GOOGLE=y CONFIG_NO_POST=y # CONFIG_CONSOLE_SERIAL is not set diff --git a/configs/apl/config.sand.uefi b/configs/apl/config.sand.uefi index 89ffc4472e2..1d9a1f107e5 100644 --- a/configs/apl/config.sand.uefi +++ b/configs/apl/config.sand.uefi @@ -1,4 +1,3 @@ -CONFIG_LOCALVERSION="MrChromebox-4.19" CONFIG_VENDOR_GOOGLE=y CONFIG_NO_POST=y # CONFIG_CONSOLE_SERIAL is not set diff --git a/configs/apl/config.santa.uefi b/configs/apl/config.santa.uefi index 23b059ec205..5500e69e74c 100644 --- a/configs/apl/config.santa.uefi +++ b/configs/apl/config.santa.uefi @@ -1,4 +1,3 @@ -CONFIG_LOCALVERSION="MrChromebox-4.19" CONFIG_VENDOR_GOOGLE=y CONFIG_NO_POST=y # CONFIG_CONSOLE_SERIAL is not set diff --git a/configs/apl/config.snappy.uefi b/configs/apl/config.snappy.uefi index 233cb101640..387ceaf3d57 100644 --- a/configs/apl/config.snappy.uefi +++ b/configs/apl/config.snappy.uefi @@ -1,4 +1,3 @@ -CONFIG_LOCALVERSION="MrChromebox-4.19" CONFIG_VENDOR_GOOGLE=y CONFIG_NO_POST=y # CONFIG_CONSOLE_SERIAL is not set diff --git a/configs/apl/config.whitetip.uefi b/configs/apl/config.whitetip.uefi index d529aaa2d13..1b658b93473 100644 --- a/configs/apl/config.whitetip.uefi +++ b/configs/apl/config.whitetip.uefi @@ -1,4 +1,3 @@ -CONFIG_LOCALVERSION="MrChromebox-4.19" CONFIG_VENDOR_GOOGLE=y CONFIG_NO_POST=y # CONFIG_CONSOLE_SERIAL is not set diff --git a/configs/bdw/config.auron_paine.uefi b/configs/bdw/config.auron_paine.uefi index 0571f97fc60..4ad58dbd05f 100644 --- a/configs/bdw/config.auron_paine.uefi +++ b/configs/bdw/config.auron_paine.uefi @@ -1,4 +1,3 @@ -CONFIG_LOCALVERSION="MrChromebox-4.19" CONFIG_VENDOR_GOOGLE=y CONFIG_NO_POST=y CONFIG_CBFS_SIZE=0x250000 diff --git a/configs/bdw/config.auron_yuna.uefi b/configs/bdw/config.auron_yuna.uefi index ba8dd03105c..23e01848df8 100644 --- a/configs/bdw/config.auron_yuna.uefi +++ b/configs/bdw/config.auron_yuna.uefi @@ -1,4 +1,3 @@ -CONFIG_LOCALVERSION="MrChromebox-4.19" CONFIG_VENDOR_GOOGLE=y CONFIG_NO_POST=y CONFIG_CBFS_SIZE=0x250000 diff --git a/configs/bdw/config.buddy.uefi b/configs/bdw/config.buddy.uefi index 300e03a779a..f40846f7e26 100644 --- a/configs/bdw/config.buddy.uefi +++ b/configs/bdw/config.buddy.uefi @@ -1,4 +1,3 @@ -CONFIG_LOCALVERSION="MrChromebox-4.19" CONFIG_VENDOR_GOOGLE=y CONFIG_NO_POST=y CONFIG_CBFS_SIZE=0x250000 diff --git a/configs/bdw/config.gandof.uefi b/configs/bdw/config.gandof.uefi index 9e702cb1c33..a048d0d70ac 100644 --- a/configs/bdw/config.gandof.uefi +++ b/configs/bdw/config.gandof.uefi @@ -1,4 +1,3 @@ -CONFIG_LOCALVERSION="MrChromebox-4.19" CONFIG_VENDOR_GOOGLE=y CONFIG_NO_POST=y CONFIG_CBFS_SIZE=0x250000 diff --git a/configs/bdw/config.guado.uefi b/configs/bdw/config.guado.uefi index 0dcbcf0fe76..63a48566433 100644 --- a/configs/bdw/config.guado.uefi +++ b/configs/bdw/config.guado.uefi @@ -1,4 +1,3 @@ -CONFIG_LOCALVERSION="MrChromebox-4.19" CONFIG_VENDOR_GOOGLE=y CONFIG_NO_POST=y CONFIG_CBFS_SIZE=0x250000 diff --git a/configs/bdw/config.librem_13v1.uefi b/configs/bdw/config.librem_13v1.uefi index 3ac9978286f..ef3544fd612 100644 --- a/configs/bdw/config.librem_13v1.uefi +++ b/configs/bdw/config.librem_13v1.uefi @@ -1,4 +1,3 @@ -CONFIG_LOCALVERSION="MrChromebox-4.19" CONFIG_VENDOR_PURISM=y CONFIG_CBFS_SIZE=0x5C0000 CONFIG_IFD_BIN_PATH="3rdparty/purism-blobs/mainboard/purism/librem_bdw/descriptor.bin" diff --git a/configs/bdw/config.librem_15v2.uefi b/configs/bdw/config.librem_15v2.uefi index 92c9300f466..9750cb30abf 100644 --- a/configs/bdw/config.librem_15v2.uefi +++ b/configs/bdw/config.librem_15v2.uefi @@ -1,4 +1,3 @@ -CONFIG_LOCALVERSION="MrChromebox-4.19" CONFIG_VENDOR_PURISM=y CONFIG_CBFS_SIZE=0x5C0000 CONFIG_IFD_BIN_PATH="3rdparty/purism-blobs/mainboard/purism/librem_bdw/descriptor.bin" diff --git a/configs/bdw/config.lulu.uefi b/configs/bdw/config.lulu.uefi index caed2e05986..0fd0e80529c 100644 --- a/configs/bdw/config.lulu.uefi +++ b/configs/bdw/config.lulu.uefi @@ -1,4 +1,3 @@ -CONFIG_LOCALVERSION="MrChromebox-4.19" CONFIG_VENDOR_GOOGLE=y CONFIG_NO_POST=y CONFIG_CBFS_SIZE=0x250000 diff --git a/configs/bdw/config.rikku.uefi b/configs/bdw/config.rikku.uefi index ab75ee3075b..316dfeb45de 100644 --- a/configs/bdw/config.rikku.uefi +++ b/configs/bdw/config.rikku.uefi @@ -1,4 +1,3 @@ -CONFIG_LOCALVERSION="MrChromebox-4.19" CONFIG_VENDOR_GOOGLE=y CONFIG_NO_POST=y CONFIG_CBFS_SIZE=0x250000 diff --git a/configs/bdw/config.samus.uefi b/configs/bdw/config.samus.uefi index 83e0973e3a2..3840aaa69ab 100644 --- a/configs/bdw/config.samus.uefi +++ b/configs/bdw/config.samus.uefi @@ -1,4 +1,3 @@ -CONFIG_LOCALVERSION="MrChromebox-4.19" CONFIG_VENDOR_GOOGLE=y CONFIG_NO_POST=y CONFIG_CBFS_SIZE=0x250000 diff --git a/configs/bdw/config.tidus.uefi b/configs/bdw/config.tidus.uefi index f1bab0a7669..1986b0a78ce 100644 --- a/configs/bdw/config.tidus.uefi +++ b/configs/bdw/config.tidus.uefi @@ -1,4 +1,3 @@ -CONFIG_LOCALVERSION="MrChromebox-4.19" CONFIG_VENDOR_GOOGLE=y CONFIG_NO_POST=y CONFIG_CBFS_SIZE=0x250000 diff --git a/configs/bsw/config.banon.uefi b/configs/bsw/config.banon.uefi index da943c84088..532afddcd66 100644 --- a/configs/bsw/config.banon.uefi +++ b/configs/bsw/config.banon.uefi @@ -1,4 +1,3 @@ -CONFIG_LOCALVERSION="MrChromebox-4.19" CONFIG_VENDOR_GOOGLE=y CONFIG_NO_POST=y CONFIG_CBFS_SIZE=0x250000 diff --git a/configs/bsw/config.celes.uefi b/configs/bsw/config.celes.uefi index caa642317e1..d13466016c4 100644 --- a/configs/bsw/config.celes.uefi +++ b/configs/bsw/config.celes.uefi @@ -1,4 +1,3 @@ -CONFIG_LOCALVERSION="MrChromebox-4.19" CONFIG_VENDOR_GOOGLE=y CONFIG_NO_POST=y CONFIG_CBFS_SIZE=0x250000 diff --git a/configs/bsw/config.cyan.uefi b/configs/bsw/config.cyan.uefi index 8a0c49ce02d..f7f9e816832 100644 --- a/configs/bsw/config.cyan.uefi +++ b/configs/bsw/config.cyan.uefi @@ -1,4 +1,3 @@ -CONFIG_LOCALVERSION="MrChromebox-4.19" CONFIG_VENDOR_GOOGLE=y CONFIG_NO_POST=y CONFIG_CBFS_SIZE=0x250000 diff --git a/configs/bsw/config.edgar.uefi b/configs/bsw/config.edgar.uefi index 33d469a21ec..824eb0b41e6 100644 --- a/configs/bsw/config.edgar.uefi +++ b/configs/bsw/config.edgar.uefi @@ -1,4 +1,3 @@ -CONFIG_LOCALVERSION="MrChromebox-4.19" CONFIG_VENDOR_GOOGLE=y CONFIG_NO_POST=y CONFIG_CBFS_SIZE=0x250000 diff --git a/configs/bsw/config.kefka.uefi b/configs/bsw/config.kefka.uefi index 33b22b87955..83edce1c643 100644 --- a/configs/bsw/config.kefka.uefi +++ b/configs/bsw/config.kefka.uefi @@ -1,4 +1,3 @@ -CONFIG_LOCALVERSION="MrChromebox-4.19" CONFIG_VENDOR_GOOGLE=y CONFIG_NO_POST=y CONFIG_CBFS_SIZE=0x250000 diff --git a/configs/bsw/config.reks.uefi b/configs/bsw/config.reks.uefi index 5b247ce6dc7..ee9c4fb3e8d 100644 --- a/configs/bsw/config.reks.uefi +++ b/configs/bsw/config.reks.uefi @@ -1,4 +1,3 @@ -CONFIG_LOCALVERSION="MrChromebox-4.19" CONFIG_VENDOR_GOOGLE=y CONFIG_NO_POST=y CONFIG_CBFS_SIZE=0x250000 diff --git a/configs/bsw/config.relm.uefi b/configs/bsw/config.relm.uefi index 5a3c431366b..16d8a31076d 100644 --- a/configs/bsw/config.relm.uefi +++ b/configs/bsw/config.relm.uefi @@ -1,4 +1,3 @@ -CONFIG_LOCALVERSION="MrChromebox-4.19" CONFIG_VENDOR_GOOGLE=y CONFIG_NO_POST=y CONFIG_CBFS_SIZE=0x250000 diff --git a/configs/bsw/config.setzer.uefi b/configs/bsw/config.setzer.uefi index c58617312ab..574dd7bbf82 100644 --- a/configs/bsw/config.setzer.uefi +++ b/configs/bsw/config.setzer.uefi @@ -1,4 +1,3 @@ -CONFIG_LOCALVERSION="MrChromebox-4.19" CONFIG_VENDOR_GOOGLE=y CONFIG_NO_POST=y CONFIG_CBFS_SIZE=0x250000 diff --git a/configs/bsw/config.terra.uefi b/configs/bsw/config.terra.uefi index 690bda4cad2..f5c819ae0be 100644 --- a/configs/bsw/config.terra.uefi +++ b/configs/bsw/config.terra.uefi @@ -1,4 +1,3 @@ -CONFIG_LOCALVERSION="MrChromebox-4.19" CONFIG_VENDOR_GOOGLE=y CONFIG_NO_POST=y CONFIG_CBFS_SIZE=0x250000 diff --git a/configs/bsw/config.ultima.uefi b/configs/bsw/config.ultima.uefi index cb275b2ee0a..6247acc4eea 100644 --- a/configs/bsw/config.ultima.uefi +++ b/configs/bsw/config.ultima.uefi @@ -1,4 +1,3 @@ -CONFIG_LOCALVERSION="MrChromebox-4.19" CONFIG_VENDOR_GOOGLE=y CONFIG_NO_POST=y CONFIG_CBFS_SIZE=0x250000 diff --git a/configs/bsw/config.wizpig.uefi b/configs/bsw/config.wizpig.uefi index f452a45e775..096c7d0df41 100644 --- a/configs/bsw/config.wizpig.uefi +++ b/configs/bsw/config.wizpig.uefi @@ -1,4 +1,3 @@ -CONFIG_LOCALVERSION="MrChromebox-4.19" CONFIG_VENDOR_GOOGLE=y CONFIG_NO_POST=y CONFIG_CBFS_SIZE=0x250000 diff --git a/configs/byt/config.banjo.uefi b/configs/byt/config.banjo.uefi index c0f6fec307f..78716cca712 100644 --- a/configs/byt/config.banjo.uefi +++ b/configs/byt/config.banjo.uefi @@ -1,4 +1,3 @@ -CONFIG_LOCALVERSION="MrChromebox-4.19" CONFIG_VENDOR_GOOGLE=y CONFIG_NO_POST=y CONFIG_CBFS_SIZE=0x250000 diff --git a/configs/byt/config.candy.uefi b/configs/byt/config.candy.uefi index aeb5d3001a5..0ac4999c608 100644 --- a/configs/byt/config.candy.uefi +++ b/configs/byt/config.candy.uefi @@ -1,4 +1,3 @@ -CONFIG_LOCALVERSION="MrChromebox-4.19" CONFIG_VENDOR_GOOGLE=y CONFIG_NO_POST=y CONFIG_CBFS_SIZE=0x250000 diff --git a/configs/byt/config.clapper.uefi b/configs/byt/config.clapper.uefi index f24fc95b3b8..be217f1dafe 100644 --- a/configs/byt/config.clapper.uefi +++ b/configs/byt/config.clapper.uefi @@ -1,4 +1,3 @@ -CONFIG_LOCALVERSION="MrChromebox-4.19" CONFIG_VENDOR_GOOGLE=y CONFIG_NO_POST=y CONFIG_CBFS_SIZE=0x250000 diff --git a/configs/byt/config.enguarde.uefi b/configs/byt/config.enguarde.uefi index c7274b94e71..61b53aa416e 100644 --- a/configs/byt/config.enguarde.uefi +++ b/configs/byt/config.enguarde.uefi @@ -1,4 +1,3 @@ -CONFIG_LOCALVERSION="MrChromebox-4.19" CONFIG_VENDOR_GOOGLE=y CONFIG_NO_POST=y CONFIG_CBFS_SIZE=0x250000 diff --git a/configs/byt/config.glimmer.uefi b/configs/byt/config.glimmer.uefi index 90ca522f695..a7454bc8824 100644 --- a/configs/byt/config.glimmer.uefi +++ b/configs/byt/config.glimmer.uefi @@ -1,4 +1,3 @@ -CONFIG_LOCALVERSION="MrChromebox-4.19" CONFIG_VENDOR_GOOGLE=y CONFIG_NO_POST=y CONFIG_CBFS_SIZE=0x250000 diff --git a/configs/byt/config.gnawty.uefi b/configs/byt/config.gnawty.uefi index fcb70005a77..e776162a862 100644 --- a/configs/byt/config.gnawty.uefi +++ b/configs/byt/config.gnawty.uefi @@ -1,4 +1,3 @@ -CONFIG_LOCALVERSION="MrChromebox-4.19" CONFIG_VENDOR_GOOGLE=y CONFIG_NO_POST=y CONFIG_CBFS_SIZE=0x250000 diff --git a/configs/byt/config.heli.uefi b/configs/byt/config.heli.uefi index 4d762739642..ddc95117d12 100644 --- a/configs/byt/config.heli.uefi +++ b/configs/byt/config.heli.uefi @@ -1,4 +1,3 @@ -CONFIG_LOCALVERSION="MrChromebox-4.19" CONFIG_VENDOR_GOOGLE=y CONFIG_NO_POST=y CONFIG_CBFS_SIZE=0x250000 diff --git a/configs/byt/config.kip.uefi b/configs/byt/config.kip.uefi index c24c9d1880c..fa62bd76735 100644 --- a/configs/byt/config.kip.uefi +++ b/configs/byt/config.kip.uefi @@ -1,4 +1,3 @@ -CONFIG_LOCALVERSION="MrChromebox-4.19" CONFIG_VENDOR_GOOGLE=y CONFIG_NO_POST=y CONFIG_CBFS_SIZE=0x250000 diff --git a/configs/byt/config.ninja.uefi b/configs/byt/config.ninja.uefi index e9e53445355..e1376613836 100644 --- a/configs/byt/config.ninja.uefi +++ b/configs/byt/config.ninja.uefi @@ -1,4 +1,3 @@ -CONFIG_LOCALVERSION="MrChromebox-4.19" CONFIG_VENDOR_GOOGLE=y CONFIG_NO_POST=y CONFIG_CBFS_SIZE=0x250000 diff --git a/configs/byt/config.orco.uefi b/configs/byt/config.orco.uefi index 2f66d311187..defe086105d 100644 --- a/configs/byt/config.orco.uefi +++ b/configs/byt/config.orco.uefi @@ -1,4 +1,3 @@ -CONFIG_LOCALVERSION="MrChromebox-4.19" CONFIG_VENDOR_GOOGLE=y CONFIG_NO_POST=y CONFIG_CBFS_SIZE=0x250000 diff --git a/configs/byt/config.quawks.uefi b/configs/byt/config.quawks.uefi index a30d8dccea6..427b2fbf24e 100644 --- a/configs/byt/config.quawks.uefi +++ b/configs/byt/config.quawks.uefi @@ -1,4 +1,3 @@ -CONFIG_LOCALVERSION="MrChromebox-4.19" CONFIG_VENDOR_GOOGLE=y CONFIG_NO_POST=y CONFIG_CBFS_SIZE=0x250000 diff --git a/configs/byt/config.squawks.uefi b/configs/byt/config.squawks.uefi index 993f2829022..4927d2642b5 100644 --- a/configs/byt/config.squawks.uefi +++ b/configs/byt/config.squawks.uefi @@ -1,4 +1,3 @@ -CONFIG_LOCALVERSION="MrChromebox-4.19" CONFIG_VENDOR_GOOGLE=y CONFIG_NO_POST=y CONFIG_CBFS_SIZE=0x250000 diff --git a/configs/byt/config.sumo.uefi b/configs/byt/config.sumo.uefi index 46769501744..0a5a357f518 100644 --- a/configs/byt/config.sumo.uefi +++ b/configs/byt/config.sumo.uefi @@ -1,4 +1,3 @@ -CONFIG_LOCALVERSION="MrChromebox-4.19" CONFIG_VENDOR_GOOGLE=y CONFIG_NO_POST=y CONFIG_CBFS_SIZE=0x250000 diff --git a/configs/byt/config.swanky.uefi b/configs/byt/config.swanky.uefi index 8cf65c55ac6..f6ba0ef2b70 100644 --- a/configs/byt/config.swanky.uefi +++ b/configs/byt/config.swanky.uefi @@ -1,4 +1,3 @@ -CONFIG_LOCALVERSION="MrChromebox-4.19" CONFIG_VENDOR_GOOGLE=y CONFIG_NO_POST=y CONFIG_CBFS_SIZE=0x250000 diff --git a/configs/byt/config.winky.uefi b/configs/byt/config.winky.uefi index 4e1f97ef882..9b88d996a6b 100644 --- a/configs/byt/config.winky.uefi +++ b/configs/byt/config.winky.uefi @@ -1,4 +1,3 @@ -CONFIG_LOCALVERSION="MrChromebox-4.19" CONFIG_VENDOR_GOOGLE=y CONFIG_NO_POST=y CONFIG_CBFS_SIZE=0x250000 diff --git a/configs/cml/config.akemi.uefi b/configs/cml/config.akemi.uefi index 041482c5c64..531f9cf5eea 100644 --- a/configs/cml/config.akemi.uefi +++ b/configs/cml/config.akemi.uefi @@ -1,4 +1,3 @@ -CONFIG_LOCALVERSION="MrChromebox-4.19" CONFIG_VENDOR_GOOGLE=y CONFIG_NO_POST=y CONFIG_CBFS_SIZE=0x450000 diff --git a/configs/cml/config.dooly.uefi b/configs/cml/config.dooly.uefi index 1a91b13b40a..35ac9914d17 100644 --- a/configs/cml/config.dooly.uefi +++ b/configs/cml/config.dooly.uefi @@ -1,4 +1,3 @@ -CONFIG_LOCALVERSION="MrChromebox-4.19" CONFIG_VENDOR_GOOGLE=y CONFIG_NO_POST=y CONFIG_CBFS_SIZE=0x450000 diff --git a/configs/cml/config.dragonair.uefi b/configs/cml/config.dragonair.uefi index 6f4652bfd48..811bdfed0f6 100644 --- a/configs/cml/config.dragonair.uefi +++ b/configs/cml/config.dragonair.uefi @@ -1,4 +1,3 @@ -CONFIG_LOCALVERSION="MrChromebox-4.19" CONFIG_VENDOR_GOOGLE=y CONFIG_NO_POST=y CONFIG_CBFS_SIZE=0x450000 diff --git a/configs/cml/config.drallion.uefi b/configs/cml/config.drallion.uefi index 69fed192bbc..58153f57f18 100644 --- a/configs/cml/config.drallion.uefi +++ b/configs/cml/config.drallion.uefi @@ -1,4 +1,3 @@ -CONFIG_LOCALVERSION="MrChromebox-4.19" CONFIG_VENDOR_GOOGLE=y CONFIG_NO_POST=y # CONFIG_CONSOLE_SERIAL is not set diff --git a/configs/cml/config.dratini.uefi b/configs/cml/config.dratini.uefi index 959da24d68f..c50113555ed 100644 --- a/configs/cml/config.dratini.uefi +++ b/configs/cml/config.dratini.uefi @@ -1,4 +1,3 @@ -CONFIG_LOCALVERSION="MrChromebox-4.19" CONFIG_VENDOR_GOOGLE=y CONFIG_NO_POST=y CONFIG_CBFS_SIZE=0x450000 diff --git a/configs/cml/config.duffy.uefi b/configs/cml/config.duffy.uefi index 1678af93087..03abc059d4d 100644 --- a/configs/cml/config.duffy.uefi +++ b/configs/cml/config.duffy.uefi @@ -1,4 +1,3 @@ -CONFIG_LOCALVERSION="MrChromebox-4.19" CONFIG_VENDOR_GOOGLE=y CONFIG_NO_POST=y CONFIG_CBFS_SIZE=0x450000 diff --git a/configs/cml/config.faffy.uefi b/configs/cml/config.faffy.uefi index c87a930e68e..9cc028a4929 100644 --- a/configs/cml/config.faffy.uefi +++ b/configs/cml/config.faffy.uefi @@ -1,4 +1,3 @@ -CONFIG_LOCALVERSION="MrChromebox-4.19" CONFIG_VENDOR_GOOGLE=y CONFIG_NO_POST=y CONFIG_CBFS_SIZE=0x450000 diff --git a/configs/cml/config.helios.uefi b/configs/cml/config.helios.uefi index 6a50279c98a..168a75218ec 100644 --- a/configs/cml/config.helios.uefi +++ b/configs/cml/config.helios.uefi @@ -1,4 +1,3 @@ -CONFIG_LOCALVERSION="MrChromebox-4.19" CONFIG_VENDOR_GOOGLE=y CONFIG_NO_POST=y CONFIG_CBFS_SIZE=0x450000 diff --git a/configs/cml/config.jinlon.uefi b/configs/cml/config.jinlon.uefi index 2d3ccedc906..c095f5a6fc2 100644 --- a/configs/cml/config.jinlon.uefi +++ b/configs/cml/config.jinlon.uefi @@ -1,4 +1,3 @@ -CONFIG_LOCALVERSION="MrChromebox-4.19" CONFIG_VENDOR_GOOGLE=y CONFIG_NO_POST=y CONFIG_CBFS_SIZE=0x450000 diff --git a/configs/cml/config.kaisa.uefi b/configs/cml/config.kaisa.uefi index 49566702a80..4c83f7daa57 100644 --- a/configs/cml/config.kaisa.uefi +++ b/configs/cml/config.kaisa.uefi @@ -1,4 +1,3 @@ -CONFIG_LOCALVERSION="MrChromebox-4.19" CONFIG_VENDOR_GOOGLE=y CONFIG_NO_POST=y CONFIG_CBFS_SIZE=0x450000 diff --git a/configs/cml/config.kindred.uefi b/configs/cml/config.kindred.uefi index 3a22ebf2028..3e3a5fd02b0 100644 --- a/configs/cml/config.kindred.uefi +++ b/configs/cml/config.kindred.uefi @@ -1,4 +1,3 @@ -CONFIG_LOCALVERSION="MrChromebox-4.19" CONFIG_VENDOR_GOOGLE=y CONFIG_NO_POST=y CONFIG_CBFS_SIZE=0x450000 diff --git a/configs/cml/config.kled.uefi b/configs/cml/config.kled.uefi index 7f6cf7b055c..5c899cc4e83 100644 --- a/configs/cml/config.kled.uefi +++ b/configs/cml/config.kled.uefi @@ -1,4 +1,3 @@ -CONFIG_LOCALVERSION="MrChromebox-4.19" CONFIG_VENDOR_GOOGLE=y CONFIG_NO_POST=y CONFIG_CBFS_SIZE=0x450000 diff --git a/configs/cml/config.kohaku.uefi b/configs/cml/config.kohaku.uefi index 3f51d0435f1..da1804b5a9a 100644 --- a/configs/cml/config.kohaku.uefi +++ b/configs/cml/config.kohaku.uefi @@ -1,4 +1,3 @@ -CONFIG_LOCALVERSION="MrChromebox-4.19" CONFIG_VENDOR_GOOGLE=y CONFIG_NO_POST=y CONFIG_CBFS_SIZE=0x450000 diff --git a/configs/cml/config.librem_14.uefi b/configs/cml/config.librem_14.uefi index dfd6eb91e27..65ecef59ada 100644 --- a/configs/cml/config.librem_14.uefi +++ b/configs/cml/config.librem_14.uefi @@ -1,4 +1,3 @@ -CONFIG_LOCALVERSION="MrChromebox-4.19" CONFIG_VENDOR_PURISM=y CONFIG_CBFS_SIZE=0x900000 CONFIG_IFD_BIN_PATH="3rdparty/purism-blobs/mainboard/purism/librem_cnl/librem_14/flashdescriptor.bin" diff --git a/configs/cml/config.librem_mini_v2.uefi b/configs/cml/config.librem_mini_v2.uefi index bf57a331241..772a95fa1db 100644 --- a/configs/cml/config.librem_mini_v2.uefi +++ b/configs/cml/config.librem_mini_v2.uefi @@ -1,4 +1,3 @@ -CONFIG_LOCALVERSION="MrChromebox-4.19" CONFIG_VENDOR_PURISM=y CONFIG_CBFS_SIZE=0xA00000 CONFIG_IFD_BIN_PATH="3rdparty/purism-blobs/mainboard/purism/librem_cnl/mini_v2/flashdescriptor.bin" diff --git a/configs/cml/config.nightfury.uefi b/configs/cml/config.nightfury.uefi index d59eb3b42bf..8e2086eb5c3 100644 --- a/configs/cml/config.nightfury.uefi +++ b/configs/cml/config.nightfury.uefi @@ -1,4 +1,3 @@ -CONFIG_LOCALVERSION="MrChromebox-4.19" CONFIG_VENDOR_GOOGLE=y CONFIG_NO_POST=y CONFIG_CBFS_SIZE=0x450000 diff --git a/configs/cml/config.noibat.uefi b/configs/cml/config.noibat.uefi index 38957b76107..541cbf1f635 100644 --- a/configs/cml/config.noibat.uefi +++ b/configs/cml/config.noibat.uefi @@ -1,4 +1,3 @@ -CONFIG_LOCALVERSION="MrChromebox-4.19" CONFIG_VENDOR_GOOGLE=y CONFIG_NO_POST=y CONFIG_CBFS_SIZE=0x450000 diff --git a/configs/cml/config.wyvern.uefi b/configs/cml/config.wyvern.uefi index 3d798d41850..a1991f77456 100644 --- a/configs/cml/config.wyvern.uefi +++ b/configs/cml/config.wyvern.uefi @@ -1,4 +1,3 @@ -CONFIG_LOCALVERSION="MrChromebox-4.19" CONFIG_VENDOR_GOOGLE=y CONFIG_NO_POST=y CONFIG_CBFS_SIZE=0x450000 diff --git a/configs/glk/config.ampton.uefi b/configs/glk/config.ampton.uefi index 5e2de15aa54..06719fe7530 100644 --- a/configs/glk/config.ampton.uefi +++ b/configs/glk/config.ampton.uefi @@ -1,4 +1,3 @@ -CONFIG_LOCALVERSION="MrChromebox-4.19" CONFIG_VENDOR_GOOGLE=y CONFIG_NO_POST=y # CONFIG_CONSOLE_SERIAL is not set diff --git a/configs/glk/config.apel.uefi b/configs/glk/config.apel.uefi index a1a7a3d4a7e..fc2dc8a2fb3 100644 --- a/configs/glk/config.apel.uefi +++ b/configs/glk/config.apel.uefi @@ -1,4 +1,3 @@ -CONFIG_LOCALVERSION="MrChromebox-4.19" CONFIG_VENDOR_GOOGLE=y CONFIG_NO_POST=y # CONFIG_CONSOLE_SERIAL is not set diff --git a/configs/glk/config.bloog.uefi b/configs/glk/config.bloog.uefi index 690b01e80f4..5b55eaf36b6 100644 --- a/configs/glk/config.bloog.uefi +++ b/configs/glk/config.bloog.uefi @@ -1,4 +1,3 @@ -CONFIG_LOCALVERSION="MrChromebox-4.19" CONFIG_VENDOR_GOOGLE=y CONFIG_NO_POST=y # CONFIG_CONSOLE_SERIAL is not set diff --git a/configs/glk/config.blooglet.uefi b/configs/glk/config.blooglet.uefi index 13ff971686b..01fe30795f9 100644 --- a/configs/glk/config.blooglet.uefi +++ b/configs/glk/config.blooglet.uefi @@ -1,4 +1,3 @@ -CONFIG_LOCALVERSION="MrChromebox-4.19" CONFIG_VENDOR_GOOGLE=y CONFIG_NO_POST=y # CONFIG_CONSOLE_SERIAL is not set diff --git a/configs/glk/config.blooguard.uefi b/configs/glk/config.blooguard.uefi index cb60a9d5da8..16ff3d59c7d 100644 --- a/configs/glk/config.blooguard.uefi +++ b/configs/glk/config.blooguard.uefi @@ -1,4 +1,3 @@ -CONFIG_LOCALVERSION="MrChromebox-4.19" CONFIG_VENDOR_GOOGLE=y CONFIG_NO_POST=y # CONFIG_CONSOLE_SERIAL is not set diff --git a/configs/glk/config.blorb.uefi b/configs/glk/config.blorb.uefi index 16e919f09a8..9bee6ee3da1 100644 --- a/configs/glk/config.blorb.uefi +++ b/configs/glk/config.blorb.uefi @@ -1,4 +1,3 @@ -CONFIG_LOCALVERSION="MrChromebox-4.19" CONFIG_VENDOR_GOOGLE=y CONFIG_NO_POST=y # CONFIG_CONSOLE_SERIAL is not set diff --git a/configs/glk/config.bluebird.uefi b/configs/glk/config.bluebird.uefi index e43e5a17cd1..41cd6ff0ddf 100644 --- a/configs/glk/config.bluebird.uefi +++ b/configs/glk/config.bluebird.uefi @@ -1,4 +1,3 @@ -CONFIG_LOCALVERSION="MrChromebox-4.19" CONFIG_VENDOR_GOOGLE=y CONFIG_NO_POST=y # CONFIG_CONSOLE_SERIAL is not set diff --git a/configs/glk/config.bobba.uefi b/configs/glk/config.bobba.uefi index 50d240a9236..e41c2942977 100644 --- a/configs/glk/config.bobba.uefi +++ b/configs/glk/config.bobba.uefi @@ -1,4 +1,3 @@ -CONFIG_LOCALVERSION="MrChromebox-4.19" CONFIG_VENDOR_GOOGLE=y CONFIG_NO_POST=y # CONFIG_CONSOLE_SERIAL is not set diff --git a/configs/glk/config.bobba360.uefi b/configs/glk/config.bobba360.uefi index 3bd759379b4..7fa8edfac9a 100644 --- a/configs/glk/config.bobba360.uefi +++ b/configs/glk/config.bobba360.uefi @@ -1,4 +1,3 @@ -CONFIG_LOCALVERSION="MrChromebox-4.19" CONFIG_VENDOR_GOOGLE=y CONFIG_NO_POST=y # CONFIG_CONSOLE_SERIAL is not set diff --git a/configs/glk/config.casta.uefi b/configs/glk/config.casta.uefi index e812b91a3d8..ba5d18db5e7 100644 --- a/configs/glk/config.casta.uefi +++ b/configs/glk/config.casta.uefi @@ -1,4 +1,3 @@ -CONFIG_LOCALVERSION="MrChromebox-4.19" CONFIG_VENDOR_GOOGLE=y CONFIG_NO_POST=y # CONFIG_CONSOLE_SERIAL is not set diff --git a/configs/glk/config.dood.uefi b/configs/glk/config.dood.uefi index 19f06075c48..99345e15944 100644 --- a/configs/glk/config.dood.uefi +++ b/configs/glk/config.dood.uefi @@ -1,4 +1,3 @@ -CONFIG_LOCALVERSION="MrChromebox-4.19" CONFIG_VENDOR_GOOGLE=y CONFIG_NO_POST=y # CONFIG_CONSOLE_SERIAL is not set diff --git a/configs/glk/config.dorp.uefi b/configs/glk/config.dorp.uefi index 91e36aada38..e192c1e0cc8 100644 --- a/configs/glk/config.dorp.uefi +++ b/configs/glk/config.dorp.uefi @@ -1,4 +1,3 @@ -CONFIG_LOCALVERSION="MrChromebox-4.19" CONFIG_VENDOR_GOOGLE=y CONFIG_NO_POST=y # CONFIG_CONSOLE_SERIAL is not set diff --git a/configs/glk/config.droid.uefi b/configs/glk/config.droid.uefi index c2af9063d54..d2d586e47f6 100644 --- a/configs/glk/config.droid.uefi +++ b/configs/glk/config.droid.uefi @@ -1,4 +1,3 @@ -CONFIG_LOCALVERSION="MrChromebox-4.19" CONFIG_VENDOR_GOOGLE=y CONFIG_NO_POST=y # CONFIG_CONSOLE_SERIAL is not set diff --git a/configs/glk/config.fleex.uefi b/configs/glk/config.fleex.uefi index 91472c04cc8..33bc56bfedc 100644 --- a/configs/glk/config.fleex.uefi +++ b/configs/glk/config.fleex.uefi @@ -1,4 +1,3 @@ -CONFIG_LOCALVERSION="MrChromebox-4.19" CONFIG_VENDOR_GOOGLE=y CONFIG_NO_POST=y # CONFIG_CONSOLE_SERIAL is not set diff --git a/configs/glk/config.foob.uefi b/configs/glk/config.foob.uefi index 57dbedb61d1..304f5412595 100644 --- a/configs/glk/config.foob.uefi +++ b/configs/glk/config.foob.uefi @@ -1,4 +1,3 @@ -CONFIG_LOCALVERSION="MrChromebox-4.19" CONFIG_VENDOR_GOOGLE=y CONFIG_NO_POST=y # CONFIG_CONSOLE_SERIAL is not set diff --git a/configs/glk/config.foob360.uefi b/configs/glk/config.foob360.uefi index 136cb234f65..7d50260b5c9 100644 --- a/configs/glk/config.foob360.uefi +++ b/configs/glk/config.foob360.uefi @@ -1,4 +1,3 @@ -CONFIG_LOCALVERSION="MrChromebox-4.19" CONFIG_VENDOR_GOOGLE=y CONFIG_NO_POST=y # CONFIG_CONSOLE_SERIAL is not set diff --git a/configs/glk/config.garfour.uefi b/configs/glk/config.garfour.uefi index fb14d10e874..7b762e0f5a3 100644 --- a/configs/glk/config.garfour.uefi +++ b/configs/glk/config.garfour.uefi @@ -1,4 +1,3 @@ -CONFIG_LOCALVERSION="MrChromebox-4.19" CONFIG_VENDOR_GOOGLE=y CONFIG_NO_POST=y # CONFIG_CONSOLE_SERIAL is not set diff --git a/configs/glk/config.garg.uefi b/configs/glk/config.garg.uefi index e04f83f2d80..703e75a300d 100644 --- a/configs/glk/config.garg.uefi +++ b/configs/glk/config.garg.uefi @@ -1,4 +1,3 @@ -CONFIG_LOCALVERSION="MrChromebox-4.19" CONFIG_VENDOR_GOOGLE=y CONFIG_NO_POST=y # CONFIG_CONSOLE_SERIAL is not set diff --git a/configs/glk/config.garg360.uefi b/configs/glk/config.garg360.uefi index 8e50cc63842..c695dbb03de 100644 --- a/configs/glk/config.garg360.uefi +++ b/configs/glk/config.garg360.uefi @@ -1,4 +1,3 @@ -CONFIG_LOCALVERSION="MrChromebox-4.19" CONFIG_VENDOR_GOOGLE=y CONFIG_NO_POST=y # CONFIG_CONSOLE_SERIAL is not set diff --git a/configs/glk/config.grabbiter.uefi b/configs/glk/config.grabbiter.uefi index f0dfa1d995e..e3c3a743899 100644 --- a/configs/glk/config.grabbiter.uefi +++ b/configs/glk/config.grabbiter.uefi @@ -1,4 +1,3 @@ -CONFIG_LOCALVERSION="MrChromebox-4.19" CONFIG_VENDOR_GOOGLE=y CONFIG_NO_POST=y # CONFIG_CONSOLE_SERIAL is not set diff --git a/configs/glk/config.laser.uefi b/configs/glk/config.laser.uefi index f159b67538e..c22c40a8444 100644 --- a/configs/glk/config.laser.uefi +++ b/configs/glk/config.laser.uefi @@ -1,4 +1,3 @@ -CONFIG_LOCALVERSION="MrChromebox-4.19" CONFIG_VENDOR_GOOGLE=y CONFIG_NO_POST=y # CONFIG_CONSOLE_SERIAL is not set diff --git a/configs/glk/config.laser14.uefi b/configs/glk/config.laser14.uefi index 005156207e4..0cfeab1f7cf 100644 --- a/configs/glk/config.laser14.uefi +++ b/configs/glk/config.laser14.uefi @@ -1,4 +1,3 @@ -CONFIG_LOCALVERSION="MrChromebox-4.19" CONFIG_VENDOR_GOOGLE=y CONFIG_NO_POST=y # CONFIG_CONSOLE_SERIAL is not set diff --git a/configs/glk/config.lick.uefi b/configs/glk/config.lick.uefi index 2e5d0c1486e..5330bfcbba7 100644 --- a/configs/glk/config.lick.uefi +++ b/configs/glk/config.lick.uefi @@ -1,4 +1,3 @@ -CONFIG_LOCALVERSION="MrChromebox-4.19" CONFIG_VENDOR_GOOGLE=y CONFIG_NO_POST=y # CONFIG_CONSOLE_SERIAL is not set diff --git a/configs/glk/config.meep.uefi b/configs/glk/config.meep.uefi index 36af80dbf2f..765ebeac30b 100644 --- a/configs/glk/config.meep.uefi +++ b/configs/glk/config.meep.uefi @@ -1,4 +1,3 @@ -CONFIG_LOCALVERSION="MrChromebox-4.19" CONFIG_VENDOR_GOOGLE=y CONFIG_NO_POST=y # CONFIG_CONSOLE_SERIAL is not set diff --git a/configs/glk/config.mimrock.uefi b/configs/glk/config.mimrock.uefi index 5835c98dd52..363ea102920 100644 --- a/configs/glk/config.mimrock.uefi +++ b/configs/glk/config.mimrock.uefi @@ -1,4 +1,3 @@ -CONFIG_LOCALVERSION="MrChromebox-4.19" CONFIG_VENDOR_GOOGLE=y CONFIG_NO_POST=y # CONFIG_CONSOLE_SERIAL is not set diff --git a/configs/glk/config.nospike.uefi b/configs/glk/config.nospike.uefi index 1865c951ec6..ac6f5ce5eb5 100644 --- a/configs/glk/config.nospike.uefi +++ b/configs/glk/config.nospike.uefi @@ -1,4 +1,3 @@ -CONFIG_LOCALVERSION="MrChromebox-4.19" CONFIG_VENDOR_GOOGLE=y CONFIG_NO_POST=y # CONFIG_CONSOLE_SERIAL is not set diff --git a/configs/glk/config.orbatrix.uefi b/configs/glk/config.orbatrix.uefi index 20723cec924..e49d37e6291 100644 --- a/configs/glk/config.orbatrix.uefi +++ b/configs/glk/config.orbatrix.uefi @@ -1,4 +1,3 @@ -CONFIG_LOCALVERSION="MrChromebox-4.19" CONFIG_VENDOR_GOOGLE=y CONFIG_NO_POST=y # CONFIG_CONSOLE_SERIAL is not set diff --git a/configs/glk/config.phaser.uefi b/configs/glk/config.phaser.uefi index bbd6f0570fc..b882912df60 100644 --- a/configs/glk/config.phaser.uefi +++ b/configs/glk/config.phaser.uefi @@ -1,4 +1,3 @@ -CONFIG_LOCALVERSION="MrChromebox-4.19" CONFIG_VENDOR_GOOGLE=y CONFIG_NO_POST=y # CONFIG_CONSOLE_SERIAL is not set diff --git a/configs/glk/config.phaser360.uefi b/configs/glk/config.phaser360.uefi index ddbdd003af8..9de95bbf6f3 100644 --- a/configs/glk/config.phaser360.uefi +++ b/configs/glk/config.phaser360.uefi @@ -1,4 +1,3 @@ -CONFIG_LOCALVERSION="MrChromebox-4.19" CONFIG_VENDOR_GOOGLE=y CONFIG_NO_POST=y # CONFIG_CONSOLE_SERIAL is not set diff --git a/configs/glk/config.phaser360s.uefi b/configs/glk/config.phaser360s.uefi index ddd2eb0c2a3..561b545c189 100644 --- a/configs/glk/config.phaser360s.uefi +++ b/configs/glk/config.phaser360s.uefi @@ -1,4 +1,3 @@ -CONFIG_LOCALVERSION="MrChromebox-4.19" CONFIG_VENDOR_GOOGLE=y CONFIG_NO_POST=y # CONFIG_CONSOLE_SERIAL is not set diff --git a/configs/glk/config.sparky.uefi b/configs/glk/config.sparky.uefi index 217deb7d09d..3cfb8de3010 100644 --- a/configs/glk/config.sparky.uefi +++ b/configs/glk/config.sparky.uefi @@ -1,4 +1,3 @@ -CONFIG_LOCALVERSION="MrChromebox-4.19" CONFIG_VENDOR_GOOGLE=y CONFIG_NO_POST=y # CONFIG_CONSOLE_SERIAL is not set diff --git a/configs/glk/config.sparky360.uefi b/configs/glk/config.sparky360.uefi index f3249596644..5f8a82eddfc 100644 --- a/configs/glk/config.sparky360.uefi +++ b/configs/glk/config.sparky360.uefi @@ -1,4 +1,3 @@ -CONFIG_LOCALVERSION="MrChromebox-4.19" CONFIG_VENDOR_GOOGLE=y CONFIG_NO_POST=y # CONFIG_CONSOLE_SERIAL is not set diff --git a/configs/glk/config.vorticon.uefi b/configs/glk/config.vorticon.uefi index a015326a8bc..45dd9f96b1b 100644 --- a/configs/glk/config.vorticon.uefi +++ b/configs/glk/config.vorticon.uefi @@ -1,4 +1,3 @@ -CONFIG_LOCALVERSION="MrChromebox-4.19" CONFIG_VENDOR_GOOGLE=y CONFIG_NO_POST=y # CONFIG_CONSOLE_SERIAL is not set diff --git a/configs/glk/config.vortininja.uefi b/configs/glk/config.vortininja.uefi index 609c2aa06a1..6b278f1d443 100644 --- a/configs/glk/config.vortininja.uefi +++ b/configs/glk/config.vortininja.uefi @@ -1,4 +1,3 @@ -CONFIG_LOCALVERSION="MrChromebox-4.19" CONFIG_VENDOR_GOOGLE=y CONFIG_NO_POST=y # CONFIG_CONSOLE_SERIAL is not set diff --git a/configs/hsw/config.falco.uefi b/configs/hsw/config.falco.uefi index 3d3b436fcb8..d8abbd4c091 100644 --- a/configs/hsw/config.falco.uefi +++ b/configs/hsw/config.falco.uefi @@ -1,4 +1,3 @@ -CONFIG_LOCALVERSION="MrChromebox-4.19" CONFIG_VENDOR_GOOGLE=y CONFIG_NO_POST=y CONFIG_CBFS_SIZE=0x250000 diff --git a/configs/hsw/config.leon.uefi b/configs/hsw/config.leon.uefi index 3e883ac01bc..c44cb0ac1ae 100644 --- a/configs/hsw/config.leon.uefi +++ b/configs/hsw/config.leon.uefi @@ -1,4 +1,3 @@ -CONFIG_LOCALVERSION="MrChromebox-4.19" CONFIG_VENDOR_GOOGLE=y CONFIG_NO_POST=y CONFIG_CBFS_SIZE=0x250000 diff --git a/configs/hsw/config.mccloud.uefi b/configs/hsw/config.mccloud.uefi index 9f09b3e6378..d80e6c22c4c 100644 --- a/configs/hsw/config.mccloud.uefi +++ b/configs/hsw/config.mccloud.uefi @@ -1,4 +1,3 @@ -CONFIG_LOCALVERSION="MrChromebox-4.19" CONFIG_VENDOR_GOOGLE=y CONFIG_NO_POST=y CONFIG_CBFS_SIZE=0x250000 diff --git a/configs/hsw/config.monroe.uefi b/configs/hsw/config.monroe.uefi index 6096bf22c16..69f8e0d1803 100644 --- a/configs/hsw/config.monroe.uefi +++ b/configs/hsw/config.monroe.uefi @@ -1,4 +1,3 @@ -CONFIG_LOCALVERSION="MrChromebox-4.19" CONFIG_VENDOR_GOOGLE=y CONFIG_NO_POST=y CONFIG_CBFS_SIZE=0x250000 diff --git a/configs/hsw/config.panther.uefi b/configs/hsw/config.panther.uefi index 3195dc97ad6..1053404dd48 100644 --- a/configs/hsw/config.panther.uefi +++ b/configs/hsw/config.panther.uefi @@ -1,4 +1,3 @@ -CONFIG_LOCALVERSION="MrChromebox-4.19" CONFIG_VENDOR_GOOGLE=y CONFIG_NO_POST=y CONFIG_CBFS_SIZE=0x250000 diff --git a/configs/hsw/config.peppy.uefi b/configs/hsw/config.peppy.uefi index 9661cae2909..df5d50bb361 100644 --- a/configs/hsw/config.peppy.uefi +++ b/configs/hsw/config.peppy.uefi @@ -1,4 +1,3 @@ -CONFIG_LOCALVERSION="MrChromebox-4.19" CONFIG_VENDOR_GOOGLE=y CONFIG_NO_POST=y CONFIG_CBFS_SIZE=0x250000 diff --git a/configs/hsw/config.tricky.uefi b/configs/hsw/config.tricky.uefi index ccb6505a7fc..7f43c3d6d03 100644 --- a/configs/hsw/config.tricky.uefi +++ b/configs/hsw/config.tricky.uefi @@ -1,4 +1,3 @@ -CONFIG_LOCALVERSION="MrChromebox-4.19" CONFIG_VENDOR_GOOGLE=y CONFIG_NO_POST=y CONFIG_CBFS_SIZE=0x250000 diff --git a/configs/hsw/config.wolf.uefi b/configs/hsw/config.wolf.uefi index f9fe039a171..17f8202dfd6 100644 --- a/configs/hsw/config.wolf.uefi +++ b/configs/hsw/config.wolf.uefi @@ -1,4 +1,3 @@ -CONFIG_LOCALVERSION="MrChromebox-4.19" CONFIG_VENDOR_GOOGLE=y CONFIG_NO_POST=y CONFIG_CBFS_SIZE=0x250000 diff --git a/configs/hsw/config.zako.uefi b/configs/hsw/config.zako.uefi index 58efd9b500a..fc5c93592dc 100644 --- a/configs/hsw/config.zako.uefi +++ b/configs/hsw/config.zako.uefi @@ -1,4 +1,3 @@ -CONFIG_LOCALVERSION="MrChromebox-4.19" CONFIG_VENDOR_GOOGLE=y CONFIG_NO_POST=y CONFIG_CBFS_SIZE=0x250000 diff --git a/configs/jsl/config.bugzzy.uefi b/configs/jsl/config.bugzzy.uefi index 0b442a027ac..26ccb60f34e 100644 --- a/configs/jsl/config.bugzzy.uefi +++ b/configs/jsl/config.bugzzy.uefi @@ -1,4 +1,3 @@ -CONFIG_LOCALVERSION="MrChromebox-4.19" CONFIG_VENDOR_GOOGLE=y CONFIG_NO_POST=y CONFIG_CBFS_SIZE=0x450000 diff --git a/configs/jsl/config.drawcia.uefi b/configs/jsl/config.drawcia.uefi index 2e9b57e1c31..4f845c672dc 100644 --- a/configs/jsl/config.drawcia.uefi +++ b/configs/jsl/config.drawcia.uefi @@ -1,4 +1,3 @@ -CONFIG_LOCALVERSION="MrChromebox-4.19" CONFIG_VENDOR_GOOGLE=y CONFIG_NO_POST=y CONFIG_CBFS_SIZE=0x450000 diff --git a/configs/jsl/config.drawlat.uefi b/configs/jsl/config.drawlat.uefi index 2a9e06aae92..e45d8146358 100644 --- a/configs/jsl/config.drawlat.uefi +++ b/configs/jsl/config.drawlat.uefi @@ -1,4 +1,3 @@ -CONFIG_LOCALVERSION="MrChromebox-4.19" CONFIG_VENDOR_GOOGLE=y CONFIG_NO_POST=y CONFIG_CBFS_SIZE=0x450000 diff --git a/configs/jsl/config.drawman.uefi b/configs/jsl/config.drawman.uefi index 63efce894b9..1f169cafc37 100644 --- a/configs/jsl/config.drawman.uefi +++ b/configs/jsl/config.drawman.uefi @@ -1,4 +1,3 @@ -CONFIG_LOCALVERSION="MrChromebox-4.19" CONFIG_VENDOR_GOOGLE=y CONFIG_NO_POST=y CONFIG_CBFS_SIZE=0x450000 diff --git a/configs/jsl/config.lantis.uefi b/configs/jsl/config.lantis.uefi index e615096d9b8..9e737423360 100644 --- a/configs/jsl/config.lantis.uefi +++ b/configs/jsl/config.lantis.uefi @@ -1,4 +1,3 @@ -CONFIG_LOCALVERSION="MrChromebox-4.19" CONFIG_VENDOR_GOOGLE=y CONFIG_NO_POST=y CONFIG_CBFS_SIZE=0x450000 diff --git a/configs/jsl/config.magpie.uefi b/configs/jsl/config.magpie.uefi index 208f3dfe3b9..e6597694063 100644 --- a/configs/jsl/config.magpie.uefi +++ b/configs/jsl/config.magpie.uefi @@ -1,4 +1,3 @@ -CONFIG_LOCALVERSION="MrChromebox-4.19" CONFIG_VENDOR_GOOGLE=y CONFIG_NO_POST=y CONFIG_CBFS_SIZE=0x450000 diff --git a/configs/kbl/config.atlas.uefi b/configs/kbl/config.atlas.uefi index d063c1b37ad..197e7626a27 100644 --- a/configs/kbl/config.atlas.uefi +++ b/configs/kbl/config.atlas.uefi @@ -1,4 +1,3 @@ -CONFIG_LOCALVERSION="MrChromebox-4.19" CONFIG_VENDOR_GOOGLE=y CONFIG_NO_POST=y CONFIG_CBFS_SIZE=0x450000 diff --git a/configs/kbl/config.eve.uefi b/configs/kbl/config.eve.uefi index 0a4c439dc96..5f79eb3daac 100644 --- a/configs/kbl/config.eve.uefi +++ b/configs/kbl/config.eve.uefi @@ -1,4 +1,3 @@ -CONFIG_LOCALVERSION="MrChromebox-4.19" CONFIG_VENDOR_GOOGLE=y CONFIG_NO_POST=y CONFIG_CBFS_SIZE=0x450000 diff --git a/configs/kbl/config.fizz.uefi b/configs/kbl/config.fizz.uefi index 15bb4f76d97..de356be329b 100644 --- a/configs/kbl/config.fizz.uefi +++ b/configs/kbl/config.fizz.uefi @@ -1,4 +1,3 @@ -CONFIG_LOCALVERSION="MrChromebox-4.19" CONFIG_VENDOR_GOOGLE=y CONFIG_NO_POST=y CONFIG_CBFS_SIZE=0x450000 diff --git a/configs/kbl/config.karma.uefi b/configs/kbl/config.karma.uefi index 3dfaaf1193e..80691541660 100644 --- a/configs/kbl/config.karma.uefi +++ b/configs/kbl/config.karma.uefi @@ -1,4 +1,3 @@ -CONFIG_LOCALVERSION="MrChromebox-4.19" CONFIG_VENDOR_GOOGLE=y CONFIG_NO_POST=y CONFIG_CBFS_SIZE=0x450000 diff --git a/configs/kbl/config.leona.uefi b/configs/kbl/config.leona.uefi index b07518b40d6..82383f1097c 100644 --- a/configs/kbl/config.leona.uefi +++ b/configs/kbl/config.leona.uefi @@ -1,4 +1,3 @@ -CONFIG_LOCALVERSION="MrChromebox-4.19" CONFIG_VENDOR_GOOGLE=y CONFIG_NO_POST=y CONFIG_CBFS_SIZE=0x450000 diff --git a/configs/kbl/config.librem_13v4.uefi b/configs/kbl/config.librem_13v4.uefi index f9f28f11b3c..c072cc254e6 100644 --- a/configs/kbl/config.librem_13v4.uefi +++ b/configs/kbl/config.librem_13v4.uefi @@ -1,4 +1,3 @@ -CONFIG_LOCALVERSION="MrChromebox-4.19" CONFIG_VENDOR_PURISM=y CONFIG_CBFS_SIZE=0xe00000 CONFIG_IFD_BIN_PATH="3rdparty/purism-blobs/mainboard/purism/librem_kbl/descriptor.bin" diff --git a/configs/kbl/config.librem_15v4.uefi b/configs/kbl/config.librem_15v4.uefi index 31aa5930e5e..9d08f010207 100644 --- a/configs/kbl/config.librem_15v4.uefi +++ b/configs/kbl/config.librem_15v4.uefi @@ -1,4 +1,3 @@ -CONFIG_LOCALVERSION="MrChromebox-4.19" CONFIG_VENDOR_PURISM=y CONFIG_CBFS_SIZE=0xe00000 CONFIG_LINEAR_FRAMEBUFFER_MAX_HEIGHT=1080 diff --git a/configs/kbl/config.nami.uefi b/configs/kbl/config.nami.uefi index 94cf9294f40..53c2d3eb907 100644 --- a/configs/kbl/config.nami.uefi +++ b/configs/kbl/config.nami.uefi @@ -1,4 +1,3 @@ -CONFIG_LOCALVERSION="MrChromebox-4.19" CONFIG_VENDOR_GOOGLE=y CONFIG_NO_POST=y CONFIG_CBFS_SIZE=0x450000 diff --git a/configs/kbl/config.nautilus.uefi b/configs/kbl/config.nautilus.uefi index 94ce9d3efce..aac2ce19bee 100644 --- a/configs/kbl/config.nautilus.uefi +++ b/configs/kbl/config.nautilus.uefi @@ -1,4 +1,3 @@ -CONFIG_LOCALVERSION="MrChromebox-4.19" CONFIG_VENDOR_GOOGLE=y CONFIG_NO_POST=y CONFIG_CBFS_SIZE=0x450000 diff --git a/configs/kbl/config.nocturne.uefi b/configs/kbl/config.nocturne.uefi index 803e8e83e1f..0aef0c74cfe 100644 --- a/configs/kbl/config.nocturne.uefi +++ b/configs/kbl/config.nocturne.uefi @@ -1,4 +1,3 @@ -CONFIG_LOCALVERSION="MrChromebox-4.19" CONFIG_VENDOR_GOOGLE=y CONFIG_NO_POST=y CONFIG_CBFS_SIZE=0x450000 diff --git a/configs/kbl/config.shyvana.uefi b/configs/kbl/config.shyvana.uefi index 9dbfa6d02f6..22a558976bb 100644 --- a/configs/kbl/config.shyvana.uefi +++ b/configs/kbl/config.shyvana.uefi @@ -1,4 +1,3 @@ -CONFIG_LOCALVERSION="MrChromebox-4.19" CONFIG_VENDOR_GOOGLE=y CONFIG_CBFS_SIZE=0x450000 # CONFIG_CONSOLE_SERIAL is not set diff --git a/configs/kbl/config.soraka.uefi b/configs/kbl/config.soraka.uefi index 40f88a70949..dae779a70f1 100644 --- a/configs/kbl/config.soraka.uefi +++ b/configs/kbl/config.soraka.uefi @@ -1,4 +1,3 @@ -CONFIG_LOCALVERSION="MrChromebox-4.19" CONFIG_VENDOR_GOOGLE=y CONFIG_NO_POST=y CONFIG_CBFS_SIZE=0x450000 diff --git a/configs/skl/config.asuka.uefi b/configs/skl/config.asuka.uefi index b5714e91022..f36c00c997b 100644 --- a/configs/skl/config.asuka.uefi +++ b/configs/skl/config.asuka.uefi @@ -1,4 +1,3 @@ -CONFIG_LOCALVERSION="MrChromebox-4.19" CONFIG_VENDOR_GOOGLE=y CONFIG_NO_POST=y CONFIG_CBFS_SIZE=0x450000 diff --git a/configs/skl/config.caroline.uefi b/configs/skl/config.caroline.uefi index 40e24b51451..a6276572e40 100644 --- a/configs/skl/config.caroline.uefi +++ b/configs/skl/config.caroline.uefi @@ -1,4 +1,3 @@ -CONFIG_LOCALVERSION="MrChromebox-4.19" CONFIG_VENDOR_GOOGLE=y CONFIG_NO_POST=y CONFIG_CBFS_SIZE=0x450000 diff --git a/configs/skl/config.cave.uefi b/configs/skl/config.cave.uefi index f9eca90992a..f6d8d9a1d4f 100644 --- a/configs/skl/config.cave.uefi +++ b/configs/skl/config.cave.uefi @@ -1,4 +1,3 @@ -CONFIG_LOCALVERSION="MrChromebox-4.19" CONFIG_VENDOR_GOOGLE=y CONFIG_NO_POST=y CONFIG_CBFS_SIZE=0x450000 diff --git a/configs/skl/config.chell.uefi b/configs/skl/config.chell.uefi index 6d6159d1c69..355b024af64 100644 --- a/configs/skl/config.chell.uefi +++ b/configs/skl/config.chell.uefi @@ -1,4 +1,3 @@ -CONFIG_LOCALVERSION="MrChromebox-4.19" CONFIG_VENDOR_GOOGLE=y CONFIG_NO_POST=y CONFIG_CBFS_SIZE=0x450000 diff --git a/configs/skl/config.lars.uefi b/configs/skl/config.lars.uefi index 1f3c2fed11e..927c9681b5c 100644 --- a/configs/skl/config.lars.uefi +++ b/configs/skl/config.lars.uefi @@ -1,4 +1,3 @@ -CONFIG_LOCALVERSION="MrChromebox-4.19" CONFIG_VENDOR_GOOGLE=y CONFIG_NO_POST=y CONFIG_CBFS_SIZE=0x450000 diff --git a/configs/skl/config.librem_13v2.uefi b/configs/skl/config.librem_13v2.uefi index f4ae0d8ad39..f841c9639f9 100644 --- a/configs/skl/config.librem_13v2.uefi +++ b/configs/skl/config.librem_13v2.uefi @@ -1,4 +1,3 @@ -CONFIG_LOCALVERSION="MrChromebox-4.19" CONFIG_VENDOR_PURISM=y CONFIG_CBFS_SIZE=0xe00000 CONFIG_IFD_BIN_PATH="3rdparty/purism-blobs/mainboard/purism/librem_skl/descriptor.bin" diff --git a/configs/skl/config.librem_15v3.uefi b/configs/skl/config.librem_15v3.uefi index ff566e6288c..e3a8c71056c 100644 --- a/configs/skl/config.librem_15v3.uefi +++ b/configs/skl/config.librem_15v3.uefi @@ -1,4 +1,3 @@ -CONFIG_LOCALVERSION="MrChromebox-4.19" CONFIG_VENDOR_PURISM=y CONFIG_CBFS_SIZE=0xe00000 CONFIG_IFD_BIN_PATH="3rdparty/purism-blobs/mainboard/purism/librem_skl/descriptor.bin" diff --git a/configs/skl/config.sentry.uefi b/configs/skl/config.sentry.uefi index ad04ea42767..2d83876aaba 100644 --- a/configs/skl/config.sentry.uefi +++ b/configs/skl/config.sentry.uefi @@ -1,4 +1,3 @@ -CONFIG_LOCALVERSION="MrChromebox-4.19" CONFIG_VENDOR_GOOGLE=y CONFIG_NO_POST=y CONFIG_CBFS_SIZE=0x450000 diff --git a/configs/snb_ivb/config.butterfly.uefi b/configs/snb_ivb/config.butterfly.uefi index 82aa0edc3ba..8e6fe25fae1 100644 --- a/configs/snb_ivb/config.butterfly.uefi +++ b/configs/snb_ivb/config.butterfly.uefi @@ -1,4 +1,3 @@ -CONFIG_LOCALVERSION="MrChromebox-4.19" CONFIG_VENDOR_GOOGLE=y CONFIG_NO_POST=y CONFIG_MAINBOARD_VENDOR="Google" diff --git a/configs/snb_ivb/config.link.uefi b/configs/snb_ivb/config.link.uefi index 6890011530e..5c910f46e7e 100644 --- a/configs/snb_ivb/config.link.uefi +++ b/configs/snb_ivb/config.link.uefi @@ -1,4 +1,3 @@ -CONFIG_LOCALVERSION="MrChromebox-4.19" CONFIG_VENDOR_GOOGLE=y CONFIG_NO_POST=y CONFIG_CBFS_SIZE=0x250000 diff --git a/configs/snb_ivb/config.lumpy.uefi b/configs/snb_ivb/config.lumpy.uefi index a5569366c28..73edc664c41 100644 --- a/configs/snb_ivb/config.lumpy.uefi +++ b/configs/snb_ivb/config.lumpy.uefi @@ -1,4 +1,3 @@ -CONFIG_LOCALVERSION="MrChromebox-4.19" CONFIG_VENDOR_SAMSUNG=y CONFIG_NO_POST=y CONFIG_CBFS_SIZE=0x250000 diff --git a/configs/snb_ivb/config.parrot.uefi b/configs/snb_ivb/config.parrot.uefi index ba314a1afa9..82c49fb0c12 100644 --- a/configs/snb_ivb/config.parrot.uefi +++ b/configs/snb_ivb/config.parrot.uefi @@ -1,4 +1,3 @@ -CONFIG_LOCALVERSION="MrChromebox-4.19" CONFIG_VENDOR_GOOGLE=y CONFIG_NO_POST=y CONFIG_CBFS_SIZE=0x250000 diff --git a/configs/snb_ivb/config.stout.uefi b/configs/snb_ivb/config.stout.uefi index e0e497e60c9..ef087233b87 100644 --- a/configs/snb_ivb/config.stout.uefi +++ b/configs/snb_ivb/config.stout.uefi @@ -1,4 +1,3 @@ -CONFIG_LOCALVERSION="MrChromebox-4.19" CONFIG_VENDOR_GOOGLE=y CONFIG_NO_POST=y CONFIG_CBFS_SIZE=0x250000 diff --git a/configs/snb_ivb/config.stumpy.uefi b/configs/snb_ivb/config.stumpy.uefi index 4b265c3cf32..c3092f647b7 100644 --- a/configs/snb_ivb/config.stumpy.uefi +++ b/configs/snb_ivb/config.stumpy.uefi @@ -1,4 +1,3 @@ -CONFIG_LOCALVERSION="MrChromebox-4.19" CONFIG_VENDOR_SAMSUNG=y CONFIG_NO_POST=y CONFIG_CBFS_SIZE=0x250000 diff --git a/configs/str/config.aleena.uefi b/configs/str/config.aleena.uefi index 61cfe5a7d0b..ae07bb8e278 100644 --- a/configs/str/config.aleena.uefi +++ b/configs/str/config.aleena.uefi @@ -1,4 +1,3 @@ -CONFIG_LOCALVERSION="MrChromebox-4.19" CONFIG_USE_AMD_BLOBS=y CONFIG_VENDOR_GOOGLE=y CONFIG_NO_POST=y diff --git a/configs/str/config.barla.uefi b/configs/str/config.barla.uefi index 9f8f60b8ad7..eae7924bd42 100644 --- a/configs/str/config.barla.uefi +++ b/configs/str/config.barla.uefi @@ -1,4 +1,3 @@ -CONFIG_LOCALVERSION="MrChromebox-4.19" CONFIG_USE_AMD_BLOBS=y CONFIG_VENDOR_GOOGLE=y CONFIG_NO_POST=y diff --git a/configs/str/config.careena.uefi b/configs/str/config.careena.uefi index f3253ff0e7c..a9e1cc58a95 100644 --- a/configs/str/config.careena.uefi +++ b/configs/str/config.careena.uefi @@ -1,4 +1,3 @@ -CONFIG_LOCALVERSION="MrChromebox-4.19" CONFIG_USE_AMD_BLOBS=y CONFIG_VENDOR_GOOGLE=y CONFIG_NO_POST=y diff --git a/configs/str/config.kasumi.uefi b/configs/str/config.kasumi.uefi index 3a522f89bb4..ec4943faa61 100644 --- a/configs/str/config.kasumi.uefi +++ b/configs/str/config.kasumi.uefi @@ -1,4 +1,3 @@ -CONFIG_LOCALVERSION="MrChromebox-4.19" CONFIG_USE_AMD_BLOBS=y CONFIG_VENDOR_GOOGLE=y CONFIG_NO_POST=y diff --git a/configs/str/config.liara.uefi b/configs/str/config.liara.uefi index a6e11f37a29..984aa56993c 100644 --- a/configs/str/config.liara.uefi +++ b/configs/str/config.liara.uefi @@ -1,4 +1,3 @@ -CONFIG_LOCALVERSION="MrChromebox-4.19" CONFIG_USE_AMD_BLOBS=y CONFIG_VENDOR_GOOGLE=y CONFIG_NO_POST=y diff --git a/configs/str/config.treeya.uefi b/configs/str/config.treeya.uefi index b57d6b9aaa9..ee4635e1495 100644 --- a/configs/str/config.treeya.uefi +++ b/configs/str/config.treeya.uefi @@ -1,4 +1,3 @@ -CONFIG_LOCALVERSION="MrChromebox-4.19" CONFIG_USE_AMD_BLOBS=y CONFIG_VENDOR_GOOGLE=y CONFIG_NO_POST=y diff --git a/configs/tgl/config.chronicler.uefi b/configs/tgl/config.chronicler.uefi index 67a0f65d7d1..bd80bef3d21 100644 --- a/configs/tgl/config.chronicler.uefi +++ b/configs/tgl/config.chronicler.uefi @@ -1,4 +1,3 @@ -CONFIG_LOCALVERSION="MrChromebox-4.19" CONFIG_VENDOR_GOOGLE=y CONFIG_NO_POST=y CONFIG_CBFS_SIZE=0x450000 diff --git a/configs/tgl/config.collis.uefi b/configs/tgl/config.collis.uefi index 2f7d49b077e..4e468a78316 100644 --- a/configs/tgl/config.collis.uefi +++ b/configs/tgl/config.collis.uefi @@ -1,4 +1,3 @@ -CONFIG_LOCALVERSION="MrChromebox-4.19" CONFIG_VENDOR_GOOGLE=y CONFIG_NO_POST=y CONFIG_CBFS_SIZE=0x450000 diff --git a/configs/tgl/config.copano.uefi b/configs/tgl/config.copano.uefi index 1f91c8076b5..fa6619e6136 100644 --- a/configs/tgl/config.copano.uefi +++ b/configs/tgl/config.copano.uefi @@ -1,4 +1,3 @@ -CONFIG_LOCALVERSION="MrChromebox-4.19" CONFIG_VENDOR_GOOGLE=y CONFIG_NO_POST=y CONFIG_CBFS_SIZE=0x450000 diff --git a/configs/tgl/config.delbin.uefi b/configs/tgl/config.delbin.uefi index 2406ad8fb54..0520a68ddff 100644 --- a/configs/tgl/config.delbin.uefi +++ b/configs/tgl/config.delbin.uefi @@ -1,4 +1,3 @@ -CONFIG_LOCALVERSION="MrChromebox-4.19" CONFIG_VENDOR_GOOGLE=y CONFIG_NO_POST=y CONFIG_CBFS_SIZE=0x450000 diff --git a/configs/tgl/config.drobit.uefi b/configs/tgl/config.drobit.uefi index c5b2741efe8..077ef47f10c 100644 --- a/configs/tgl/config.drobit.uefi +++ b/configs/tgl/config.drobit.uefi @@ -1,4 +1,3 @@ -CONFIG_LOCALVERSION="MrChromebox-4.19" CONFIG_VENDOR_GOOGLE=y CONFIG_NO_POST=y CONFIG_CBFS_SIZE=0x450000 diff --git a/configs/tgl/config.eldrid.uefi b/configs/tgl/config.eldrid.uefi index 1125d258bfe..35f31f09e1e 100644 --- a/configs/tgl/config.eldrid.uefi +++ b/configs/tgl/config.eldrid.uefi @@ -1,4 +1,3 @@ -CONFIG_LOCALVERSION="MrChromebox-4.19" CONFIG_VENDOR_GOOGLE=y CONFIG_NO_POST=y CONFIG_CBFS_SIZE=0x450000 diff --git a/configs/tgl/config.elemi.uefi b/configs/tgl/config.elemi.uefi index 26a9fb4aeb8..de9c3a257d0 100644 --- a/configs/tgl/config.elemi.uefi +++ b/configs/tgl/config.elemi.uefi @@ -1,4 +1,3 @@ -CONFIG_LOCALVERSION="MrChromebox-4.19" CONFIG_VENDOR_GOOGLE=y CONFIG_NO_POST=y CONFIG_CBFS_SIZE=0x450000 diff --git a/configs/tgl/config.lillipup.uefi b/configs/tgl/config.lillipup.uefi index 55fb553d796..77851c1b775 100644 --- a/configs/tgl/config.lillipup.uefi +++ b/configs/tgl/config.lillipup.uefi @@ -1,4 +1,3 @@ -CONFIG_LOCALVERSION="MrChromebox-4.19" CONFIG_VENDOR_GOOGLE=y CONFIG_NO_POST=y CONFIG_CBFS_SIZE=0x450000 diff --git a/configs/tgl/config.lindar.uefi b/configs/tgl/config.lindar.uefi index 2592d39e926..399514aae8d 100644 --- a/configs/tgl/config.lindar.uefi +++ b/configs/tgl/config.lindar.uefi @@ -1,4 +1,3 @@ -CONFIG_LOCALVERSION="MrChromebox-4.19" CONFIG_VENDOR_GOOGLE=y CONFIG_NO_POST=y CONFIG_CBFS_SIZE=0x450000 diff --git a/configs/tgl/config.voema.uefi b/configs/tgl/config.voema.uefi index 9d0ad6ad1e4..e71d7356308 100644 --- a/configs/tgl/config.voema.uefi +++ b/configs/tgl/config.voema.uefi @@ -1,4 +1,3 @@ -CONFIG_LOCALVERSION="MrChromebox-4.19" CONFIG_VENDOR_GOOGLE=y CONFIG_NO_POST=y CONFIG_CBFS_SIZE=0x450000 diff --git a/configs/tgl/config.volet.uefi b/configs/tgl/config.volet.uefi index e23ed845566..cc9a160ae49 100644 --- a/configs/tgl/config.volet.uefi +++ b/configs/tgl/config.volet.uefi @@ -1,4 +1,3 @@ -CONFIG_LOCALVERSION="MrChromebox-4.19" CONFIG_VENDOR_GOOGLE=y CONFIG_NO_POST=y CONFIG_CBFS_SIZE=0x450000 diff --git a/configs/tgl/config.volta.uefi b/configs/tgl/config.volta.uefi index a107f23f4a8..f68844d13ce 100644 --- a/configs/tgl/config.volta.uefi +++ b/configs/tgl/config.volta.uefi @@ -1,4 +1,3 @@ -CONFIG_LOCALVERSION="MrChromebox-4.19" CONFIG_VENDOR_GOOGLE=y CONFIG_NO_POST=y CONFIG_CBFS_SIZE=0x450000 diff --git a/configs/tgl/config.voxel.uefi b/configs/tgl/config.voxel.uefi index 610704e6cf8..badb959349b 100644 --- a/configs/tgl/config.voxel.uefi +++ b/configs/tgl/config.voxel.uefi @@ -1,4 +1,3 @@ -CONFIG_LOCALVERSION="MrChromebox-4.19" CONFIG_VENDOR_GOOGLE=y CONFIG_NO_POST=y CONFIG_CBFS_SIZE=0x450000 diff --git a/configs/whl/config.librem_mini.uefi b/configs/whl/config.librem_mini.uefi index 0410283e382..8c64759f279 100644 --- a/configs/whl/config.librem_mini.uefi +++ b/configs/whl/config.librem_mini.uefi @@ -1,4 +1,3 @@ -CONFIG_LOCALVERSION="MrChromebox-4.19" CONFIG_VENDOR_PURISM=y CONFIG_CBFS_SIZE=0x800000 CONFIG_IFD_BIN_PATH="3rdparty/purism-blobs/mainboard/purism/librem_cnl/mini/flashdescriptor.bin" diff --git a/configs/whl/config.sarien.uefi b/configs/whl/config.sarien.uefi index ec6079993c2..450ffd957d7 100644 --- a/configs/whl/config.sarien.uefi +++ b/configs/whl/config.sarien.uefi @@ -1,4 +1,3 @@ -CONFIG_LOCALVERSION="MrChromebox-4.19" CONFIG_VENDOR_GOOGLE=y CONFIG_NO_POST=y # CONFIG_CONSOLE_SERIAL is not set diff --git a/configs/zen2/config.berknip.uefi b/configs/zen2/config.berknip.uefi index 760dcce397b..d29ed9612e1 100644 --- a/configs/zen2/config.berknip.uefi +++ b/configs/zen2/config.berknip.uefi @@ -1,4 +1,3 @@ -CONFIG_LOCALVERSION="MrChromebox-4.19" CONFIG_USE_AMD_BLOBS=y CONFIG_VENDOR_GOOGLE=y CONFIG_NO_POST=y diff --git a/configs/zen2/config.dirinboz.uefi b/configs/zen2/config.dirinboz.uefi index f0986fa2a1d..78c62714bc4 100644 --- a/configs/zen2/config.dirinboz.uefi +++ b/configs/zen2/config.dirinboz.uefi @@ -1,4 +1,3 @@ -CONFIG_LOCALVERSION="MrChromebox-4.19" CONFIG_USE_AMD_BLOBS=y CONFIG_VENDOR_GOOGLE=y CONFIG_NO_POST=y diff --git a/configs/zen2/config.morphius.uefi b/configs/zen2/config.morphius.uefi index 1b8322d9e0d..bc3ce08ed6f 100644 --- a/configs/zen2/config.morphius.uefi +++ b/configs/zen2/config.morphius.uefi @@ -1,4 +1,3 @@ -CONFIG_LOCALVERSION="MrChromebox-4.19" CONFIG_USE_AMD_BLOBS=y CONFIG_VENDOR_GOOGLE=y CONFIG_NO_POST=y From 3e2a4f42d07758a70517164d13eb9290751066fa Mon Sep 17 00:00:00 2001 From: Christopher Lentocha Date: Wed, 15 Feb 2023 12:51:22 -0500 Subject: [PATCH 137/137] Fix Byt CB Bootup on SeaBIOS when using coreboot This patch helps fix the internal eMMC card when booting from it with the MrChromebox custom coreboot distro. If this patch isn't applied, the OS cannot boot off of it, and if you boot from USB, then you will get spamming errors in dmesg. This also doesn't show on Windows PE if you do not apply this, and it will be very slow to boot, or to even use. Note that this SMM variable is currently only in the MrChromebox coreboot distro at the moment, and is used by his EDK2 distro as well. Also the line added in this patch should not be added to CBFS booting, so we can assume that the next payload woll do the same thing, like if we chainload SeaBIOS to EDK2. Also this is a dirty patch and should not be sent to mainline SeaBIOS and people hope for it to be removed with a coreboot fix anyways, when it isn't needed in EDK2 as well to boot or use. Tested only on GOOGLE Enguarde at the moment. MrChromebox = Matt DeVillier Byt = Intel Bay Trail CB = ChromeBook (and other Chrome OS Devices like Chromebox) Signed-off-by: Christopher Lentocha --- payloads/external/SeaBIOS/Makefile | 8 ++++ ...ootup-on-SeaBIOS-when-using-coreboot.patch | 42 +++++++++++++++++++ 2 files changed, 50 insertions(+) create mode 100644 payloads/external/SeaBIOS/patches/0001-Fix-Byt-CB-Bootup-on-SeaBIOS-when-using-coreboot.patch diff --git a/payloads/external/SeaBIOS/Makefile b/payloads/external/SeaBIOS/Makefile index 225a42896c0..8eddaa0ab53 100644 --- a/payloads/external/SeaBIOS/Makefile +++ b/payloads/external/SeaBIOS/Makefile @@ -35,6 +35,14 @@ endif checkout: fetch echo " Checking out SeaBIOS revision $(TAG-y)" cd seabios; git checkout master; git branch -D coreboot 2>/dev/null; git checkout -b coreboot $(TAG-y) + cd $(project_dir); \ + for patch in $(CURDIR)/patches/*.patch; do \ + echo "Applying $$patch"; \ + export GIT_COMMITTER_EMAIL="`grep 'From:' $$patch | grep -Po '<\K[^>]+@[^>]+(?=>)'`"; \ + export GIT_COMMITTER_NAME="`grep 'From:' $$patch | cut -d '<' -f 1 | tail -c +7`"; \ + git am --committer-date-is-author-date --keep-cr $$patch || \ + ( echo " Error when applying patches.\n"; git am --abort; exit 1; ); \ + done; config: checkout echo " CONFIG SeaBIOS $(TAG-y)" diff --git a/payloads/external/SeaBIOS/patches/0001-Fix-Byt-CB-Bootup-on-SeaBIOS-when-using-coreboot.patch b/payloads/external/SeaBIOS/patches/0001-Fix-Byt-CB-Bootup-on-SeaBIOS-when-using-coreboot.patch new file mode 100644 index 00000000000..9fef45c092c --- /dev/null +++ b/payloads/external/SeaBIOS/patches/0001-Fix-Byt-CB-Bootup-on-SeaBIOS-when-using-coreboot.patch @@ -0,0 +1,42 @@ +From 28f11be04379080f6eb48471edf1bd03f0d139ef Mon Sep 17 00:00:00 2001 +From: Christopher Lentocha +Date: Wed, 15 Feb 2023 09:10:33 -0500 +Subject: [PATCH] Fix Byt CB Bootup on SeaBIOS when using coreboot + +This patch helps fix the internal eMMC card when booting from it with +the MrChromebox custom coreboot distro. If this patch isn't applied, +the OS cannot boot off of it, and if you boot from USB, then you will +get spamming errors in dmesg. This also doesn't show on Windows PE if +you do not apply this, and it will be very slow to boot, or to even +use. Note that this SMM variable is currently only in the MrChromebox +coreboot distro at the moment, and is used by his EDK2 distro as well. +Also the line added in this patch should not be added to CBFS +booting, so we can assume that the next payload woll do the same thing, +like if we chainload SeaBIOS to EDK2. Also this is a dirty patch and +should not be sent to mainline SeaBIOS and people hope for it to be +removed with a coreboot fix anyways, when it isn't needed in EDK2 +as well to boot or use. Tested only on GOOGLE Enguarde at the moment. +MrChromebox = Matt DeVillier +Byt = Intel Bay Trail +CB = ChromeBook (and other Chrome OS Devices like Chromebox) + +Signed-off-by: Christopher Lentocha +--- + src/boot.c | 1 + + 1 file changed, 1 insertion(+) + +diff --git a/src/boot.c b/src/boot.c +index 1effd80..eb79601 100644 +--- a/src/boot.c ++++ b/src/boot.c +@@ -871,6 +871,7 @@ call_boot_entry(struct segoff_s bootsegip, u8 bootdrv) + // Set the magic number in ax and the boot drive in dl. + br.dl = bootdrv; + br.ax = 0xaa55; ++ outb(0xcd, 0xb2); + farcall16(&br); + } + +-- +2.35.1 +