diff --git a/.github/workflows/Simulate.yml b/.github/workflows/Simulate.yml index 368c6146f..a6398d927 100644 --- a/.github/workflows/Simulate.yml +++ b/.github/workflows/Simulate.yml @@ -119,7 +119,7 @@ jobs: continue-on-error: ${{ inputs.can-fail }} steps: - name: ⏬ Checkout repository - uses: actions/checkout@v6 + uses: actions/checkout@v7 with: lfs: true submodules: true @@ -222,7 +222,7 @@ jobs: continue-on-error: ${{ inputs.can-fail }} steps: - name: ⏬ Checkout repository - uses: actions/checkout@v6 + uses: actions/checkout@v7 with: lfs: true submodules: true @@ -342,7 +342,7 @@ jobs: continue-on-error: ${{ inputs.can-fail }} steps: - name: ⏬ Checkout repository - uses: actions/checkout@v6 + uses: actions/checkout@v7 with: lfs: true submodules: true diff --git a/docs/conf.py b/docs/conf.py index 9765a19ec..fe344c3a3 100644 --- a/docs/conf.py +++ b/docs/conf.py @@ -163,24 +163,13 @@ def _LatestTagName(): latex_elements = { "papersize": "a4paper", # The paper size ('letterpaper' or 'a4paper'). "pointsize": "10pt", # The font size ('10pt', '11pt' or '12pt'). - "inputenc": "", # Let LuaLaTeX handle input encoding + "inputenc": "", # Let LuaLaTeX handle input encoding "utf8extra": "", "polyglossia": "", "babel": r"\usepackage[english]{babel}", "fontenc": r"\usepackage{fontspec}", # Disable the default T1 font encoding (Essential for LuaLaTeX) "fontpkg": dedent("""\ - \\usepackage{unicode-math} - - % Set the Text Fonts (Libertinus) - \\setmainfont{Libertinus Serif} - \\setsansfont{Libertinus Sans} - \\setmonofont{Libertinus Mono} - \\setmathfont{Libertinus Math} - - % Set Symbol font - \\usepackage{newunicodechar} - \\newfontfamily{\\emojifont}[Renderer=OpenType]{NotoColorEmoji.ttf} - \\usepackage{pytooling} + \\usepackage[fontfamily=libertinus]{pytooling} """), "passoptionstopackages": dedent("""\ \\PassOptionsToPackage{verbatimvisiblespace=\\ }{sphinx} diff --git a/src/bus/axi4/axi4_Sink.vhdl b/src/bus/axi4/axi4_Sink.vhdl index 4791614f8..cd5e0435e 100644 --- a/src/bus/axi4/axi4_Sink.vhdl +++ b/src/bus/axi4/axi4_Sink.vhdl @@ -95,13 +95,13 @@ architecture rtl of axi4_Sink is signal nxt_wstate : T_wstate; signal nxt_rstate : T_rstate; - signal AWLen_d : std_logic_vector(7 downto 0); + signal AWLen_d : std_logic_vector(7 downto 0) := (others => '0'); signal AWLen : std_logic_vector(7 downto 0); - signal ARLen_d : std_logic_vector(7 downto 0); + signal ARLen_d : std_logic_vector(7 downto 0) := (others => '0'); signal ARLen : std_logic_vector(7 downto 0); - signal AWID_d : std_logic_vector(IDBits - 1 downto 0); + signal AWID_d : std_logic_vector(IDBits - 1 downto 0) := (others => '0'); signal AWID : std_logic_vector(IDBits - 1 downto 0); - signal ARID_d : std_logic_vector(IDBits - 1 downto 0); + signal ARID_d : std_logic_vector(IDBits - 1 downto 0) := (others => '0'); signal ARID : std_logic_vector(IDBits - 1 downto 0); signal Is_WriteData : std_logic;