From 82c734683f72d185fc633ef11c800546bcd67f00 Mon Sep 17 00:00:00 2001 From: liutong Date: Sun, 23 Aug 2026 04:43:37 +0000 Subject: [PATCH] perf: riscv: Fix counter_idx_base in PMU snapshot restart In pmu_sbi_start_ovf_ctrs_snapshot(), after for_each_set_bit() finishes iterating used_hw_ctrs[i], idx is left at BITS_PER_LONG. The subsequent sbi_ecall() uses idx * BITS_PER_LONG as counter_idx_base, passing an out-of-range value (4096 on 64-bit) to SBI_EXT_PMU_COUNTER_START. This causes the firmware to reject the call and overflowed counters are never restarted. Use the outer loop index 'i' instead of the exhausted iterator 'idx'. Fixes: a8625217a054 ("drivers/perf: riscv: Implement SBI PMU snapshot function") Signed-off-by: liutong Signed-off-by: Linux RISC-V bot --- drivers/perf/riscv_pmu_sbi.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/perf/riscv_pmu_sbi.c b/drivers/perf/riscv_pmu_sbi.c index 50220f7b46d9b0..9f390b503fb238 100644 --- a/drivers/perf/riscv_pmu_sbi.c +++ b/drivers/perf/riscv_pmu_sbi.c @@ -1021,7 +1021,7 @@ static inline void pmu_sbi_start_ovf_ctrs_snapshot(struct cpu_hw_events *cpu_hw_ sdata->ctr_values[idx] = cpu_hw_evt->snapshot_cval_shcopy[idx + i * BITS_PER_LONG]; /* Start all the counters in a single shot */ - sbi_ecall(SBI_EXT_PMU, SBI_EXT_PMU_COUNTER_START, idx * BITS_PER_LONG, + sbi_ecall(SBI_EXT_PMU, SBI_EXT_PMU_COUNTER_START, i * BITS_PER_LONG, cpu_hw_evt->used_hw_ctrs[i], flag, 0, 0, 0); } }