From 307661dd6e830c19e0c79b4aea33998fb638c612 Mon Sep 17 00:00:00 2001 From: Icenowy Zheng Date: Thu, 14 Aug 2025 15:07:54 +0800 Subject: [PATCH 1/4] dt-bindings: mailbox: thead,th1520-mbox: retrofit for other mailboxes The current binding of thead,th1520-mbox can only apply to the C910T mailbox (which has an ID of 0). Because of the weird mailbox register mapping practice for world seperation on TH1520, the binding needs some reword, in addition to add a property for mailbox ID, to describe other mailboxes. Update the binding, in order to make it suitable to describe other mailboxes. The example is also updated, with an addition of mbox_c910t label to show that the example describes this specfiic mailbox, mailbox ID added and the register window sizes updated to the values from the manual (previously the remote-icu0 register windows is declared to be overly small that it would never work). Signed-off-by: Icenowy Zheng Signed-off-by: Linux RISC-V bot --- .../bindings/mailbox/thead,th1520-mbox.yaml | 49 ++++++++++++++----- 1 file changed, 36 insertions(+), 13 deletions(-) diff --git a/Documentation/devicetree/bindings/mailbox/thead,th1520-mbox.yaml b/Documentation/devicetree/bindings/mailbox/thead,th1520-mbox.yaml index 0971fb97896efe..5035de22886d94 100644 --- a/Documentation/devicetree/bindings/mailbox/thead,th1520-mbox.yaml +++ b/Documentation/devicetree/bindings/mailbox/thead,th1520-mbox.yaml @@ -12,6 +12,17 @@ description: through mailbox channels. It also allows one core to signal another processor using interrupts via the Interrupt Controller Unit (ICU). + The SoC is divided to two worlds, REE and TEE, although it's currently unknown + how to enable the seperation between worlds so the seperation does not exist + yet. However each mailbox is assigned to a certain world, and register windows + for mailboxes are assigned to different worlds too. In a certain world's + register windows for mailboxes, only mailboxes assigned to this world will + have the local ICU part mapped (in addition to the remote ICU part of the + other same-world mailbox), and mailboxes assigned to the other world have + only the coressponding remote ICU part mapped to this world. Two mailboxes + (C910T and E902) are assigned to the TEE world and two mailboxes (C906 and + C910R) are assigned to the REE world. + maintainers: - Michal Wilczynski @@ -22,9 +33,9 @@ properties: clocks: items: - description: Clock for the local mailbox - - description: Clock for remote ICU 0 - - description: Clock for remote ICU 1 - - description: Clock for remote ICU 2 + - description: Clock for the other mailbox in the same world + - description: Clock for the first mailbox in the other world + - description: Clock for the second mailbox in the other world clock-names: items: @@ -35,10 +46,14 @@ properties: reg: items: - - description: Mailbox local base address - - description: Remote ICU 0 base address - - description: Remote ICU 1 base address - - description: Remote ICU 2 base address + - description: Base address of this specific mailbox + - description: Base address of the other mailbox in the same world + - description: + Base address of the register window in this world corresponding to the + first other-world mailbox. + - description: + Base address of the register window in this world corresponding to the + second other-world mailbox. reg-names: items: @@ -50,10 +65,17 @@ properties: interrupts: maxItems: 1 + thead,mbox-id: + $ref: /schemas/types.yaml#/definitions/uint32 + description: + The ID of this specific mailbox that this device tree node describes. For + compatibility with old device trees, if missing, the ID is default to 0, + the C910T mailbox. + '#mbox-cells': const: 1 description: - The one and only cell describes destination CPU ID. + The one and only cell describes destination mailbox ID. required: - compatible @@ -72,12 +94,12 @@ examples: soc { #address-cells = <2>; #size-cells = <2>; - mailbox@ffffc38000 { + mbox_c910t: mailbox@ffffc38000 { compatible = "thead,th1520-mbox"; - reg = <0xff 0xffc38000 0x0 0x4000>, - <0xff 0xffc44000 0x0 0x1000>, - <0xff 0xffc4c000 0x0 0x1000>, - <0xff 0xffc54000 0x0 0x1000>; + reg = <0xff 0xffc38000 0x0 0x6000>, + <0xff 0xffc44000 0x0 0x6000>, + <0xff 0xffc4c000 0x0 0x2000>, + <0xff 0xffc54000 0x0 0x2000>; reg-names = "local", "remote-icu0", "remote-icu1", "remote-icu2"; clocks = <&clk CLK_MBOX0>, <&clk CLK_MBOX1>, <&clk CLK_MBOX2>, <&clk CLK_MBOX3>; @@ -85,5 +107,6 @@ examples: "clk-remote-icu2"; interrupts = <28>; #mbox-cells = <1>; + thead,mbox-id = <0>; }; }; From 099bf02ff911812bf7cda1f1691b55388bf01527 Mon Sep 17 00:00:00 2001 From: Icenowy Zheng Date: Thu, 14 Aug 2025 15:07:55 +0800 Subject: [PATCH 2/4] dt-bindings: firmware: thead,th1520-aon: add a mailbox name for SBI The SBI firmware might want to communicate to the AON firmware too. Add a mbox-name item to allow to allocate a mailbox for SBI. Signed-off-by: Icenowy Zheng Signed-off-by: Linux RISC-V bot --- .../devicetree/bindings/firmware/thead,th1520-aon.yaml | 7 ++++--- 1 file changed, 4 insertions(+), 3 deletions(-) diff --git a/Documentation/devicetree/bindings/firmware/thead,th1520-aon.yaml b/Documentation/devicetree/bindings/firmware/thead,th1520-aon.yaml index 3365124c7fd473..555465f4aab4ee 100644 --- a/Documentation/devicetree/bindings/firmware/thead,th1520-aon.yaml +++ b/Documentation/devicetree/bindings/firmware/thead,th1520-aon.yaml @@ -26,11 +26,12 @@ properties: const: thead,th1520-aon mboxes: - maxItems: 1 + maxItems: 2 mbox-names: items: - const: aon + - const: aon-for-sbi resets: maxItems: 1 @@ -54,7 +55,7 @@ examples: - | aon: aon { compatible = "thead,th1520-aon"; - mboxes = <&mbox_910t 1>; - mbox-names = "aon"; + mboxes = <&mbox_910t 1>, <&mbox_910r 1>; + mbox-names = "aon", "aon-for-sbi"; #power-domain-cells = <1>; }; From c2732ea60f76efcc91405423133f7b445ec57070 Mon Sep 17 00:00:00 2001 From: Icenowy Zheng Date: Thu, 14 Aug 2025 15:07:56 +0800 Subject: [PATCH 3/4] riscv: dts: thead: th1520: add reserved node for C910R mailbox The OpenSBI firmware might want to communicate to E902 CPU too. As we have two mailboxes assigned to the C910 CPU, declare the other C910 mailbox as a "reserved" device for OpenSBI to use. Signed-off-by: Icenowy Zheng Signed-off-by: Linux RISC-V bot --- arch/riscv/boot/dts/thead/th1520.dtsi | 16 ++++++++++++++++ 1 file changed, 16 insertions(+) diff --git a/arch/riscv/boot/dts/thead/th1520.dtsi b/arch/riscv/boot/dts/thead/th1520.dtsi index 42724bf7e90e08..136ebe210b8765 100644 --- a/arch/riscv/boot/dts/thead/th1520.dtsi +++ b/arch/riscv/boot/dts/thead/th1520.dtsi @@ -565,6 +565,22 @@ status = "disabled"; }; + mbox_910r: mbox@ffefc53000 { + compatible = "thead,th1520-mbox"; + reg = <0xff 0xefc50000 0x0 0x6000>, + <0xff 0xefc48000 0x0 0x6000>, + <0xff 0xefc3e000 0x0 0x2000>, + <0xff 0xefc46000 0x0 0x2000>; + reg-names = "local", "remote-icu0", "remote-icu1", "remote-icu2"; + clocks = <&clk CLK_MBOX3>, <&clk CLK_MBOX2>, <&clk CLK_MBOX0>, + <&clk CLK_MBOX1>; + clock-names = "clk-local", "clk-remote-icu0", "clk-remote-icu1", + "clk-remote-icu2"; + thead,mbox-id = <3>; + #mbox-cells = <1>; + status = "reserved"; + }; + uart4: serial@fff7f08000 { compatible = "snps,dw-apb-uart"; reg = <0xff 0xf7f08000 0x0 0x4000>; From 2b3dbb2aca84caca7548bc62d351ea8e7312c63f Mon Sep 17 00:00:00 2001 From: Icenowy Zheng Date: Thu, 14 Aug 2025 15:07:57 +0800 Subject: [PATCH 4/4] riscv: dts: thead: th1520: add mailbox channel for SBI-to-AON comm Add a mailbox channel declaration to the AON firmware node to describe the mailbox channel assigned to the SBI firmware to communicate with AON. Signed-off-by: Icenowy Zheng Signed-off-by: Linux RISC-V bot --- arch/riscv/boot/dts/thead/th1520.dtsi | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/riscv/boot/dts/thead/th1520.dtsi b/arch/riscv/boot/dts/thead/th1520.dtsi index 136ebe210b8765..6e5e0223d0c16c 100644 --- a/arch/riscv/boot/dts/thead/th1520.dtsi +++ b/arch/riscv/boot/dts/thead/th1520.dtsi @@ -233,8 +233,8 @@ aon: aon { compatible = "thead,th1520-aon"; - mboxes = <&mbox_910t 1>; - mbox-names = "aon"; + mboxes = <&mbox_910t 1>, <&mbox_910r 1>; + mbox-names = "aon", "aon-for-sbi"; resets = <&rst TH1520_RESET_ID_GPU_CLKGEN>; reset-names = "gpu-clkgen"; #power-domain-cells = <1>;