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10 changes: 9 additions & 1 deletion include/FastSIMD/ToolSet/WASM/128/f32x4.h
Original file line number Diff line number Diff line change
Expand Up @@ -190,7 +190,15 @@ namespace FS
template<FastSIMD::FeatureSet SIMD, typename = EnableIfNative<f32<4, SIMD>>>
FS_FORCEINLINE f32<4, SIMD> Select( const typename f32<4, SIMD>::MaskTypeArg& mask, const f32<4, SIMD>& ifTrue, const f32<4, SIMD>& ifFalse )
{
return wasm_v128_bitselect( ifTrue.native, ifFalse.native, mask.native );
if constexpr( FastSIMD::IsRelaxed() )
{
// Mask lanes are all ones or all zeros, laneselect is a single blend on x64 hosts (bitselect is and/andnot/or)
return wasm_i32x4_relaxed_laneselect( ifTrue.native, ifFalse.native, mask.native );
}
else
{
return wasm_v128_bitselect( ifTrue.native, ifFalse.native, mask.native );
}
}


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10 changes: 9 additions & 1 deletion include/FastSIMD/ToolSet/WASM/128/i32x4.h
Original file line number Diff line number Diff line change
Expand Up @@ -156,7 +156,15 @@ namespace FS
template<FastSIMD::FeatureSet SIMD, typename = EnableIfNative<i32<4, SIMD>>>
FS_FORCEINLINE i32<4, SIMD> Select( const typename i32<4, SIMD>::MaskTypeArg& mask, const i32<4, SIMD>& ifTrue, const i32<4, SIMD>& ifFalse )
{
return wasm_v128_bitselect( ifTrue.native, ifFalse.native, mask.native );
if constexpr( FastSIMD::IsRelaxed() )
{
// Mask lanes are all ones or all zeros, laneselect is a single blend on x64 hosts (bitselect is and/andnot/or)
return wasm_i32x4_relaxed_laneselect( ifTrue.native, ifFalse.native, mask.native );
}
else
{
return wasm_v128_bitselect( ifTrue.native, ifFalse.native, mask.native );
}
}

template<FastSIMD::FeatureSet SIMD, typename = EnableIfNative<i32<4, SIMD>>>
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