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Add native Windows CPU support and tested CI binaries - #4
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* Dispatch AVX2 CPU kernels at runtime on x86-64
Portable x86-64 builds target the SSE2 baseline, so the compile-time
__AVX2__ kernels never ran in shipped binaries and the Q4_0 x Q8_0 dots fell
back to scalar C. Move the AVX2 kernels into kernels_avx2.c behind
per-function target("avx2,fma,f16c") attributes and call them after a
one-time CPUID/XGETBV check. EI_CPU_ISA=auto|baseline|avx2 overrides it.
Use hardware F16C for the block-scale conversions (exact, bit-identical)
and FMA accumulation in the Q4_0 dots. ARM64 NEON object code is unchanged.
Add test_cpu_dispatch (SSE2 vs AVX2 embeddings at 768/512/256/128 dims),
run test_kernels under both routes, run the golden test with the baseline
route too, and add a CI check that AVX code stays in ei_avx2_* functions.
Co-Authored-By: Claude Opus 5.5 (1M context) <noreply@anthropic.com>
Claude-Session: https://claude.ai/code/session_01AAuLpjSTeWf1GysUY4DqwM
* Gate SSE2/AVX2 parity at the golden cosine and report every input
On the real model a last-bit summation difference can flip a Q8_0
activation rounding and cascade, so the routes reach cosine ~0.99988 rather
than bit equality; both match the llama.cpp goldens equally (0.99986 AVX2,
0.99987 SSE2). Collect all comparisons before failing.
Co-Authored-By: Claude Opus 5.5 (1M context) <noreply@anthropic.com>
Claude-Session: https://claude.ai/code/session_01AAuLpjSTeWf1GysUY4DqwM
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Co-authored-by: Claude <noreply@anthropic.com>
Main gained a setenv call (--threads, --cuda-devices) and defaults to the embeddinggemma-2 profile. Add a setenv shim to windows_compat.h, pin the 300m profile in the downloader test, and read test_gemma2's UTF-8 text arguments from the wide command line (the CRT argv is in the ANSI code page). Drop a duplicate include. Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com>
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Thanks for this, it's a really solid PR. The Windows host layer is careful, and the runtime AVX2 dispatch is a big win on its own: shipped x86 binaries were running the Q4 dots in scalar C. Main had moved a long way (the EmbeddingGemma 2 profile landed), so I rebased your branch onto current What changed
Testing (the rebased tree is identical to what was tested)
Small things, not blocking:
When you're happy with it, please take it out of draft. |
The AVX isolation check now also accepts the g2x_*/q8_tile_* kernels in gemma2_fast_x86.c, which run only after __builtin_cpu_supports. Guard weight_cache_lock to the targets that use it so linux-arm64 builds with -Werror. Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com>
Native Windows cannot build the existing POSIX host layer. This adds a native MinGW UCRT64 CPU server and tested CPU executable artifacts for Windows x86-64, Linux x86-64/ARM64 and macOS ARM64.
Refs #3.
Changes
Verification
All four native CI jobs passed at 2cba339.
CI commands on fresh checkouts:
All targets passed the 314-tensor manifest, exact tokenizer vectors (10/10), embedding goldens (10/10, cosine >=0.999), packed-batch parity (1.0), model-free units and HTTP/health/native/OpenAI/Matryoshka checks. Windows also passed downloader path/fallback/cleanup and synthetic UNC/binary-temp/cache-replacement tests. Windows imports were inspected to exclude MSYS/Cygwin/winpthreads/compiler runtime DLL dependencies.
Model revision:
8dd0ca2a66a8f14470acb0e2a71f801afbc5fb73; SHA256:50d28e22432a148f6f8a86eab3700f92add5d1f54baf7790675a2a4dadbccf26. Model weights are excluded from artifacts and commits. Resolved rolling MSYS2 package versions are recorded, not represented as a fixed package snapshot.Downloaded final Windows and Linux x86-64 artifacts independently passed:
All downloaded artifacts matched their checksums/source revision. Physical CPU models were not captured; runner architectures and executable formats were verified. No kernel optimization or performance claim is made.
The literal contributor clean-build check also passed natively at the same commit:
Local host: Windows 11 Enterprise 10.0.26200, Intel Xeon W-2135 (6 cores/12 threads), MSYS2 MINGW64 GCC 16.1.0 Rev5 (POSIX threads), GNU Make 4.4.1 and Python 3.11.9. Tokenizer 10/10, embeddings 10/10 with minimum cosine 0.999869943, batch parity 1.0, units and HTTP checks passed.
Limits
Metal/CUDA/ROCm/XPU were not built or tested for these shared host-code changes. Intel macOS, Windows ARM64/GPU/MSVC, older OS/distribution compatibility, real SMB shares and arbitrary Unicode/extended-length Windows paths are unverified; UNC tests use fictional strings.
These are CI artifacts, not an official release. No version/tag, installer, seven-backend release matrix, release staging or release publication change is included. Linux Ubuntu 24.04 builds do not establish the runbook's older-glibc release compatibility. Explicit Darwin codesign/vtool and post-strip staged HTTP release gates were not run. Those release requirements remain separate.
Summary by CodeRabbit
EI_CPU_ISAtoauto,baseline, oravx2to control CPU instruction selection.