Implementation and Verification of Core Modules for a RISC-V-Based Lightweight Operating System on ucore Framework

Project Introduction

This project is built on ucore — a lightweight operating system framework based on the RISC-V instruction set architecture (ISA). Since core modules of the framework (including page table management, process scheduling, interrupt and exception handling, system call implementation, and physical memory allocation) were unimplemented, the research team completed the coding and functional verification of these key modules, and finally developed a fully functional lightweight operating system that can run stably on the RISC-V architecture.