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1a60421
v2.3.0
Paebbels May 14, 2026
57bb44c
* Refactor PoC file names and signal names
stefanunrein Jun 16, 2026
5579d45
* use integer'image instead of to_string because GHDL can not determi…
stefanunrein Jun 16, 2026
f13f76d
Apply suggestions from code review
Paebbels Jun 16, 2026
d08dd81
Apply suggestions from code review
Paebbels Jun 16, 2026
5627127
Some more naming fixes.
Paebbels Jun 16, 2026
1ea03a5
replace all VLSI-EDA URL's with github.com/VHDL/PoC
stefanunrein Jun 17, 2026
1c408c1
cleanup of filenames for missed components
stefanunrein Jun 17, 2026
041b7a7
separate file list for ddrio
stefanunrein Jun 17, 2026
3b0df31
rename mem files in build.pro
stefanunrein Jun 17, 2026
2760176
apply suggestions from review
stefanunrein Jun 17, 2026
31f5941
Update docs/IPCores/cache/index.rst
stefanunrein Jun 17, 2026
9e63039
renaming
stefanunrein Jun 17, 2026
c46f733
renaming
stefanunrein Jun 17, 2026
bb66d6e
fix compile order, spelling
weilanad Jun 17, 2026
c84e5ec
Updated interfaces in _wf (_WriteFirst) OCRAMs.
Paebbels Jun 17, 2026
140ba4c
Removed pyIPCMI configuration files.
Paebbels Jun 17, 2026
2aa2269
Adjusted port names in OCRAM simulation model.
Paebbels Jun 17, 2026
d645b78
Use new regression.tcl with steps feature.
Paebbels Jun 17, 2026
79cf065
Apply suggestions from code review
Paebbels Jun 17, 2026
e0da95c
Changed references to branch 'master' to 'main'.
Paebbels Jun 17, 2026
5b6ca60
Apply suggestions from code review 2.1
Paebbels Jun 17, 2026
80ecbc5
Fixed ReST table.
Paebbels Jun 17, 2026
d49eed9
Run NVC on older Ubuntu 24.04 images.
Paebbels Jun 17, 2026
b82f6f6
Rename BasicProc to ControlProc
stefanunrein Jun 18, 2026
9e5cd02
cleanup clock and reset name
stefanunrein Jun 18, 2026
b72a302
* remove py folder
stefanunrein Jun 18, 2026
0d7f3e2
process name conflict
stefanunrein Jun 18, 2026
5f33390
add missing files
stefanunrein Jun 18, 2026
1438a03
rename axi4stream testcases
stefanunrein Jun 18, 2026
c964c9c
renaming
stefanunrein Jun 18, 2026
319b777
move arith test benches to correct named folders
stefanunrein Jun 18, 2026
1bcebbe
apply suggestions
stefanunrein Jun 18, 2026
98646a7
fix restructured text header underlines
stefanunrein Jun 18, 2026
4ebfa61
fix copyright
stefanunrein Jun 18, 2026
7a0baa9
fix log2ceil function to work until integer'high
stefanunrein Jun 18, 2026
66ab229
Update tb/bus/axi4stream/DeMux/TC_DeMux_e.vhdl
Paebbels Jun 18, 2026
49a8635
change myConfig and myProject in tcl scripting
stefanunrein Jun 18, 2026
9fc8913
move poc.tcl to tools
stefanunrein Jun 18, 2026
3b3d89a
Merge branch 'dev' into plc2/release-github
stefanunrein Jun 18, 2026
1da5682
fix naming of axi4stream termination modules
stefanunrein Jun 18, 2026
4299a52
pass project root to poc-tcl scripting
stefanunrein Jun 18, 2026
9c721d7
remove old config files
stefanunrein Jun 18, 2026
fe9af5c
remove test code from contributed test-case
stefanunrein Jun 18, 2026
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25 changes: 13 additions & 12 deletions .github/workflows/Pipeline.yml
Original file line number Diff line number Diff line change
Expand Up @@ -15,24 +15,25 @@ jobs:
Prepare:
uses: pyTooling/Actions/.github/workflows/PrepareJob.yml@r7
with:
main_branch: 'master'
release_branch: 'master'
main_branch: 'main'
release_branch: 'main'

Simulate:
uses: ./.github/workflows/Simulate.yml
strategy:
fail-fast: false
matrix:
include:
- { simulator: 'nvc', backend: '', version: 'latest', can-fail: false }
# - { simulator: 'ghdl', backend: 'mcode', version: 'latest', can-fail: false }
- { simulator: 'ghdl', backend: 'llvm', version: 'latest', can-fail: false }
- {ubuntu-version: 'ubuntu-24.04', simulator: 'nvc', backend: '', version: 'latest', can-fail: false}
- {ubuntu-version: 'ubuntu-26.04', simulator: 'ghdl', backend: 'mcode', version: 'nightly', can-fail: false}
- {ubuntu-version: 'ubuntu-26.04', simulator: 'ghdl', backend: 'llvm', version: 'nightly', can-fail: false}
with:
simulator: ${{ matrix.simulator }}
ghdl-version: ${{ matrix.version }}
ghdl-backend: ${{ matrix.backend }}
nvc-version: ${{ matrix.version }}
can-fail: ${{ matrix.can-fail }}
ubuntu-version: ${{ matrix.ubuntu-version }}
simulator: ${{ matrix.simulator }}
ghdl-version: ${{ matrix.version }}
ghdl-backend: ${{ matrix.backend }}
nvc-version: ${{ matrix.version }}
can-fail: ${{ matrix.can-fail }}

PublishTestResults:
uses: pyTooling/Actions/.github/workflows/PublishTestResults.yml@r7
Expand All @@ -52,7 +53,7 @@ jobs:

IntermediateCleanUp:
name: 🗑️ Intermediate Artifact Cleanup
runs-on: 'ubuntu-24.04'
runs-on: 'ubuntu-26.04'
needs:
- Simulate
- PublishTestResults
Expand Down Expand Up @@ -97,7 +98,7 @@ jobs:
latex_artifact: 'PoC-LaTeX'

Test:
runs-on: 'ubuntu-24.04'
runs-on: 'ubuntu-26.04'
needs:
- Simulate
- PublishTestResults
Expand Down
70 changes: 14 additions & 56 deletions .github/workflows/Simulate.yml
Original file line number Diff line number Diff line change
Expand Up @@ -6,7 +6,7 @@ on:
ubuntu-version:
description: 'Version of the Ubuntu image.'
required: false
default: 'ubuntu-24.04'
default: 'ubuntu-26.04'
type: string
can-fail:
description: 'Allow a job combination to fail.'
Expand Down Expand Up @@ -132,26 +132,17 @@ jobs:
run: |
mkdir -p ${{ needs.Parameters.outputs.tempDirectory }}

- name: 🔨 Prepare Script
run: |
cd "${{ needs.Parameters.outputs.tempDirectory }}"

tee run.tcl <<EOF
source ../../lib/OSVVM-Scripts/StartUp.tcl
build ../../lib/OsvvmLibraries.pro [BuildName "OsvvmLibraries"]
EOF

- name: Precompile OSVVM (GHDL)
- name: 🔨 Precompile OSVVM (GHDL)
if: inputs.simulator == 'ghdl'
run: |
cd "${{ needs.Parameters.outputs.tempDirectory }}"
tclsh run.tcl
REGRESSION_STEP=osvvm tclsh ../../regression.tcl

- name: Precompile OSVVM (NVC)
- name: 🔨 Precompile OSVVM (NVC)
if: inputs.simulator == 'nvc'
run: |
cd "${{ needs.Parameters.outputs.tempDirectory }}"
nvc --do run.tcl
REGRESSION_STEP=osvvm nvc --do ../../regression.tcl

- name: 📤 Upload '${{ needs.Parameters.outputs.osvvmReportHTML }}' artifacts
uses: pyTooling/upload-artifact@v7
Expand Down Expand Up @@ -240,7 +231,7 @@ jobs:
run: |
mkdir -p "${{ needs.Parameters.outputs.tempDirectory }}"

mv src/common/my_project.vhdl.template tb/common/my_project.vhdl
mv src/common/local_configuration.vhdl.template tb/common/local_configuration.vhdl

- name: 📥 Download artifacts '${{ needs.Parameters.outputs.osvvmLibraries }}' from 'Build-OSVVM' job
uses: pyTooling/download-artifact@v8
Expand All @@ -253,62 +244,29 @@ jobs:
with:
name: ${{ needs.Parameters.outputs.osvvmGenerated }}

- name: 🔨 Generate build.tcl for pre-compile
run: |
ls -lAh lib/osvvm/*_generated.vhd

cd "${{ needs.Parameters.outputs.tempDirectory }}"

tee build.tcl <<EOF
source ../../lib/OSVVM-Scripts/StartUp.tcl
source ../../tools/OSVVM/poc.tcl
namespace import ::poc::*

configureOSVVM

build ../../src/PoC.pro [BuildName "PoC"]
checkForBuildErrors
EOF

- name: Precompile PoC (GHDL)
- name: 🔨 Precompile PoC (GHDL)
if: inputs.simulator == 'ghdl'
run: |
cd "${{ needs.Parameters.outputs.tempDirectory }}"
tclsh build.tcl
REGRESSION_STEP=poc tclsh ../../regression.tcl

- name: Precompile PoC (NVC)
- name: 🔨 Precompile PoC (NVC)
if: inputs.simulator == 'nvc'
run: |
cd "${{ needs.Parameters.outputs.tempDirectory }}"
nvc --do build.tcl

- name: 📈 Generate simulate.tcl for simulate
if: always()
run: |
cd "${{ needs.Parameters.outputs.tempDirectory }}"

tee simulate.tcl <<EOF
source ../../lib/OSVVM-Scripts/StartUp.tcl
source ../../tools/OSVVM/poc.tcl
namespace import ::poc::*

configureOSVVM

build ../../tb/RunAllTests.pro [BuildName "RunAllTests"]
checkForRunErrors
EOF
REGRESSION_STEP=poc nvc --do ../../regression.tcl

- name: Simulate PoC (GHDL)
- name: 📈 Simulate PoC (GHDL)
if: inputs.simulator == 'ghdl'
run: |
cd "${{ needs.Parameters.outputs.tempDirectory }}"
tclsh simulate.tcl
REGRESSION_STEP=test tclsh ../../regression.tcl

- name: Simulate PoC (NVC)
- name: 📈 Simulate PoC (NVC)
if: always() && inputs.simulator == 'nvc'
run: |
cd "${{ needs.Parameters.outputs.tempDirectory }}"
nvc --do simulate.tcl
REGRESSION_STEP=test nvc --do ../../regression.tcl

- name: 📤 Upload '${{ needs.Parameters.outputs.pocReportHTML }}' artifacts
uses: pyTooling/upload-artifact@v7
Expand Down
2 changes: 1 addition & 1 deletion .gitignore
Original file line number Diff line number Diff line change
Expand Up @@ -35,7 +35,7 @@ temp/*
.pyIPCMI/config.private.ini

# ignore private files from PoC
tb/common/my_project.vhdl
tb/common/local_configuration.vhdl


# ignore external tool files: ActiveHDL, QuestaSim
Expand Down
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