Define Ring hardware and wiring

[exddc]

Define the Ring doorbell hardware around the Pi Zero 2 W, Camera Module 3 Wide, a custom key board, and a power board with two encapsulated mains supplies. Separate board circuits, electrical interfaces, and procurement so board and enclosure design share one reference. Include three wiring drawings and harness estimates for a 300 × 150 mm casing.

Keep the documents concise and distinguish estimates from verified limits. The design includes no heater or heater control circuit. Relay selection (E4) and antenna clearance (E7) remain deferred to casing design; schematics, layouts, and physical verification are pending. Firmware and checker scripts are outside this step.

Validation: WireViz generation and diagram inspection, connectivity and wire-total checks, local links, whitespace, and the version gate pass. This is a prototype specification.

[linear-code]

TW-422

[pullfrog]

ℹ️ No critical issues — a few minor suggestions inline. The electrical content checks out.

Reviewed changes — full initial review of the Ring hardware specification: BOM, button input circuit, qualification plan, electrical interface variant, WireViz harness, and link updates.

• hardware/ring/variants/rpi0w_cm3/README.md — J8 pin map, power architecture, audio/camera configuration, strike drive, power budget, and firmware interface requirements.
• hardware/ring/bom.md — assembly BOM with population variants and harness length estimates for the 300 × 150 mm enclosure.
• hardware/ring/button-input.md — optocoupler-buffered active-low button circuit with worst-case calculations and transient paths.
• hardware/ring/qualification.md — pending acceptance criteria; E4 relay selection and E7 antenna clearance explicitly deferred.
• hardware/ring/wiring.yml + wiring.svg — WireViz harness drawing for the four-button population.
• README.md, ring/README.md — link and structure updates.

Verification performed: the J8 physical-pin/BCM/PCM assignments match the Pi Zero W header and agree between wiring.yml and the variant tables; all harness-length totals and the button-circuit worst-case calculations recompute correctly; the cited external datasheet values (VO617A-3, 1N4148, PESD5V0S1UL, BCM2835 thresholds, effeff 118 A7, GST18E12-P1J, Adafruit 3006/3421/3351, MAX98357A output formula) were checked against their sources and are accurate. Regenerating wiring.svg with WireViz 0.4.1 on Graphviz 2.43 produces layout-level byte differences (the committed file was rendered with Graphviz 15.1.1, and the existing chime SVG differs identically under 2.43), but the text content is semantically identical to wiring.yml — the drawing is current.

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[pullfrog]

Good that this mismatch is called out — but it leaves the out-of-box pairing contract unresolved: this spec commits Ring firmware to ring/pressed/1–4, while Chime's shipped ring_topic default in schema/chime_config.json is the exact-match ring/pressed, so a Ring built to this spec won't trigger a stock Chime. Worth deciding here (or in a tracked follow-up) whether button 1 also publishes plain ring/pressed, or the Chime shipped default moves to ring/pressed/#.

[pullfrog]

The cited schematic is filed as Adafruit I2S Mic SPK0415HM4H.sch — that's the older SPK0415HM4H revision of this breakout, not the SPH0645LM4H fitted on product 3421. The pad order is very likely unchanged (Adafruit reused the repo), but since this line is the source for the corrected pad assignments, consider also citing the SPH0645 pinouts page, which documents the current revision directly.

[pullfrog]

ℹ️ No new issues found in the rework. The three earlier inline suggestions remain open and carry over to the renamed files: the mic schematic citation (now variants/rpi02w_cm3/README.md:77), the out-of-box Chime pairing default (now variants/rpi02w_cm3/README.md:186), and the relay splice wording (button-input.md:27, unchanged).

Reviewed changes — delta since the prior review: commit 47934a3, a platform and power rework of the Ring hardware specification.

• Migrated the variant to the Zero 2 W — replaced variants/rpi0w_cm3/ with variants/rpi02w_cm3/README.md, adding a mains section, thermal budget, gate output, heater/sensor control, Bluetooth-unlock requirements, and revised MQTT topics (ring/<unit>/pressed/1..4, QoS 1).
• Switched power to 230 V mains — two Mean Well IRM-30 Class II modules (5 V / 12 V) behind fuse F0 in a partitioned compartment, an isolated 12 V strike rail with F1/D1, and a single-point PE bonding scheme through stud PE1.
• Split the harness into three WireViz drawings — wiring-power/-audio/-io.yml plus committed SVGs replace the single wiring.yml/wiring.svg; .gitignore patterns widened and .gitattributes now marks hardware SVGs linguist-generated.
• Extended the BOM — mains parts, heater (HTR1 + Q1), SHT40 sensor, enclosure sealing hardware, and recomputed harness and procurement length tables.
• Expanded qualification — mains safety, load-case, thermal soak, condensation, and heater acceptance criteria; new deferred items E8–E10 alongside E4/E7.

Verification performed: regenerated all three SVGs with WireViz 0.4.1 (Graphviz 2.43) — extracted text content matches the committed drawings exactly; the J8 pin map, net names, and wire counts agree across the variant README, button-input.md, the three YAML sources, and the BOM, and every harness-length and procurement total recomputes correctly (including the 26 AWG 4.46/5.36 m and ~10/11 m loose-wire figures); the new external claims (IRM-30 module specs, effeff 118 A7 12 V DC continuous duty, Zero 2 W GPIO power-up defaults and mini-UART console, Camera Module 3 Wide ratings, AO3400A example limits, SHT40 breakout pads and address) were checked against manufacturer sources and are accurate.

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[pullfrog]

ℹ️ No critical issues in the delta — one minor wiring suggestion inline. The relay-splice thread is resolved (its file was removed); the mic schematic citation and the out-of-box Chime pairing default remain open from the initial review.

Reviewed changes — delta since the prior pullfrog review: commit 71c5df3, which removes the custom I/O board and rebuilds the design from bought modules and inline harness parts.

• Dropped the U5 custom board — deleted button-input.md; buttons now wire directly to J8 through inline 1 kΩ resistors on the internal SoC pull-ups, with boot state pinned by config.txt GPIO directives and a 100 nF-per-button fallback if transient tests show false presses.
• Replaced the 5 V star with WAGO blocks — TB1/TB2 lever terminal blocks take over 5 V distribution, the return star, and the PE bond; the Pi feed narrows to J8 pins 2/6 on 20 AWG; F2 becomes an inline PTC and the R15/R16 relay pull-ups are removed in favour of the driven boot state.
• Swapped Q1 for a bought heater switch — HSW1, a low-side MOSFET module (for example AOD4184-based), powered from TB1/TB2 with its control pair on GPIO24 and J8 pin 14; E9 now covers its 3.3 V input compatibility and measured on-state.
• Renumbered the harness — W1–W22 across the three WireViz sources with regenerated SVGs; BOM, procurement totals, qualification criteria, and link structure updated to the board-less design.

Verification performed: all three SVGs regenerate to identical extracted text with WireViz 0.4.1; the dry-circuit figures (65 µA switching current, ~65 mV closed-contact level on a ~50 kΩ internal pull-up through the 1 kΩ series resistor) and every harness and procurement total (0.55 m 20 AWG, 2.00 m 22 AWG, 3.86/4.76 m 26 AWG, 9.3/10.3 m loose wire) recompute correctly; the config.txt gpio= directive syntax and boot-time application match Raspberry Pi documentation; the D4184-style module's common signal/power ground was checked against vendor documentation for the inline finding.

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[pullfrog]

ℹ️ No critical issues in the delta — one wiring suggestion inline on the new key board definition, plus two nitpicks. The heater ground-loop thread from the prior review is resolved by this commit; the mic schematic citation and the out-of-box Chime pairing default remain open from the initial review.

Reviewed changes — delta since the prior pullfrog review: commit 85ffba6, which introduces two custom PCBs and rebuilds the harness around them.

• Added boards.md defining U5 and U7 — the key board U5 (Kailh BOX switches in hot-swap sockets, per-channel pull-up/series/RC/TVS, PWM backlight via Q1) and the power board U7 (mains inlet JAC, F0, RV1, both IRM-30 modules, PE bonding with JP1, distribution terminals, relay PTC F2, heater MOSFET Q71), with mains-section creepage, material, and cover design rules.
• Moved the heater switch onto U7 — Q71 replaces the bought HSW1 module, so the heater return stays on U7's copper and no longer crosses J8; E9 now covers Q71 drive margin.
• Replaced the anti-vandal buttons with a keyboard-style key board — Kailh BOX tactile switches (IP56, gold crosspoint), relegendable keycaps, a per-switch white backlight dimmed by hardware PWM on GPIO12 (J8 pin 32, op,dl at boot), and new open item E11 for key sealing.
• Rerouted power distribution through U7 terminals — the WAGO TB1/TB2 star, inline PTC, and inline button resistors are gone; the harness renumbers to WAC + W1–W20, and the BOM gains board-contents tables with recomputed procurement totals.
• Extended qualification — bare-board U7 dielectric/creepage checks with RV1 removed, PE-bonding continuity, backlight and keycap criteria, and E8 rescoped from the mains compartment to the U7 board.

Verification performed: all three SVGs regenerate to identical extracted text with WireViz 0.4.1; the J8 pin map (including new pin 32 / BCM12 and its power-up pull-down), net names, and wire numbers agree across the variant README, boards.md, bom.md, and the three YAML sources; every harness and procurement total recomputes (0.25 m green-yellow, 0.40 m 20 AWG, 2.30 m 22 AWG, 5.11 m 26 AWG, ≈ 9.7 m with waste); the button-circuit figures (330 µA contact current, < 0.1 V closed, 0.1 ms RC, 9 mA per LED) recompute; and the mains-section values (S14K275 continuous rating, 6 mm creepage for 250 V reinforced insulation, FR4 CTI class, IRM-30 inrush and isolation-resistance figures, RV1-after-fuse topology) were checked against manufacturer and standards sources and are sound.

ℹ️ Nitpicks

• The low-voltage ground is bonded to protective earth through JP1, which makes it PELV rather than SELV under IEC 61140 terminology; the documents consistently say "SELV ground" / "SELV copper". Worth renaming (or dropping the SELV claim) before this wording lands in compliance-facing qualification records.
• boards.md:47 claims Q1 dissipation "below 5 mW at 36 mA", which implies R_DS(on) ≤ ~3.9 Ω; the 2N7002 maximum is 7.5 Ω at V_GS 4.5 V and higher at 3.3 V drive. "Below ~15 mW" would stay true worst-case — still negligible either way.

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[pullfrog]

✅ No new issues found in the delta. Both nitpicks from the prior review are addressed and the backlight-return thread is resolved by the documented shared return. Only the mic schematic citation and the out-of-box Chime pairing default remain open from the initial review, which is why this is not an approval.

Reviewed changes — delta since the prior pullfrog review: commit 7e32151, a claims-tightening pass over the whole specification with no architecture change.

• Restructured qualification into ranked release blockers — a severity table (U7 mains insulation/PE/fault protection, GPIO transient protection, branch fault current, camera thermal/condensation, Q1 drive margin, unmeasured supply/audio margins) with required passing evidence, replacing status-column checklists.
• Removed unsupported claims — the power budget becomes explicit planning inputs with measurement requirements, the thermal-rise estimates are withdrawn, protection is stated as unqualified (PESD5V0S1BA 10 V clamp at 1 A, no reliance on SoC clamp capacity), and the audio contract now requires measured, tracked capture/playback delay instead of assuming sample alignment.
• Corrected grounding terminology — "SELV ground" becomes "5 V return" throughout, with an explicit note that the JP1 PE bond makes the rail non-SELV and PELV classification depends on the assembly assessment; the Q1 "below 5 mW" dissipation claim is dropped and the 2N7002's unguaranteed 3.3 V drive is now a named blocker.
• Documented the U5 return topology — boards.md states that J51 GND and J52 GND_LED share the board return and requires a shared-current voltage-drop assessment during layout.
• Condensed prose and reformatted WireViz notes — all four documents tightened, YAML notes moved to block scalars, SVGs regenerated, and the regeneration instructions now cite Graphviz 15.1.1.

Verification performed: all three SVGs regenerate to text-identical drawings with WireViz 0.4.1; the new figures recompute (press/release RC constants 0.1 ms and 1.1 ms, pull-up budget 1.32 mA nominal and 1.40 mA worst-case, backlight 9 mA per LED, strike 280 mA at 43 Ω); the 2N7002 R_DS(on) test conditions and the PESD5V0S1BA clamping characterization match their datasheets; and the condensed documents stay mutually consistent on pin assignments, net names, E-items, and harness totals.

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[pullfrog]

ℹ️ No new issues in the delta — one observation on the qualification-document removal, nothing anchored. The mic schematic citation and the out-of-box Chime pairing default remain open from the initial review.

Reviewed changes — delta since the prior pullfrog review: commit 93ddcbf, which removes the heater subsystem and deletes the qualification document.

• Removed the heater circuit end to end — HTR1, Q71, R71/R72, connectors J75/J76, wires W5/W20, and GPIO24 are gone from boards.md, bom.md, the variant README, and the WireViz sources; the boot config.txt block, power budget, firmware table, and enclosure layout drop their heater rows, and both regenerated SVGs shrink accordingly.
• Deleted qualification.md — the ranked release-blocker table and the electrical/environmental acceptance criteria are removed; E8–E11 references are rescoped to prose ("pending casing design", "unverified"), leaving E4 and E7 as the only named deferred items.
• Rescoped thermal risk to casing design — the camera's 0–50 °C rating against the −20 °C outdoor target is now stated as unverified with enclosure temperature and condensation control assigned to casing design; U6 becomes a logging-only sensor.
• Recomputed harness totals — 22 AWG drops to 1.60 m cut / 1.92 m with waste, 26 AWG to 4.71 m / 5.65 m, and the loose-wire allowance to ≈ 8.4 m.

Verification performed: all three SVGs regenerate to text-identical drawings with WireViz 0.4.1; a tree-wide search finds no dangling heater, Q71, J75/J76, GPIO24, E8–E11, or qualification.md references; every harness and procurement total recomputes (2.30 − 0.70 = 1.60 m, 5.11 − 0.40 = 4.71 m, loose 8.35 ≈ 8.4 m); and the remaining documents stay mutually consistent on pin assignments, connector counts (J72–J74, J77 = 4), and wire numbering.

ℹ️ Mains-safety acceptance criteria no longer live anywhere

Deleting qualification.md also deletes the dielectric-test, PE-bonding, and fault-protection acceptance criteria for the U7 mains section. The hazard itself is unchanged, and the surviving prose does say protection coordination is a release blocker and warns against energizing an assembled prototype first — but there is now no document stating what evidence closes those blockers. Fine for a prototype spec if that record is planned elsewhere (e.g. alongside the pending U7 schematic/layout work); worth a deliberate decision rather than an implicit one.

Technical details

# Qualification record removed with no successor location

## Affected sites
- `hardware/ring/qualification.md` — deleted; contained the ranked release-blocker table (U7 mains insulation/PE/fault protection, GPIO transient protection, branch fault current) and the electrical/environmental acceptance tables.
- `hardware/ring/boards.md` (U7 section) — retains "Fuse and PE-path verification remain open" but no longer points anywhere.
- `hardware/ring/variants/rpi02w_cm3/README.md:23` — "protection coordination is a release blocker" with no definition of passing evidence.

## Required outcome
- A stated home for the mains-safety qualification evidence before an assembled U7 prototype is energized — either a note in `hardware/ring/README.md` deferring it to the U7 schematic/layout step, or restoring a minimal blockers list.

## Open questions for the human
- Is the qualification record intended to return with the U5/U7 schematic capture step, or is it dropped from this repo's scope?

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[pullfrog]

✅ No new issues found in the delta. The rename and backlight removal are complete and internally consistent. Only the mic schematic citation and the out-of-box Chime pairing default remain open from the initial review, which is why this is not an approval.

Reviewed changes — delta since the prior pullfrog review: commit 8d678c9, which renames the custom boards and removes the backlight subsystem.

• Renamed the boards to Clapper and Yoke — U5 becomes the Clapper key board and U7 the Yoke power board across all documents and WireViz sources, with naming rationale added to boards.md; connectors follow (J51→JC1, J71/J72/J74/J77→JY1–JY4, Yoke service indicator LED71/R73→LED1/R1).
• Removed the backlight end to end — LEDs, R3n, Q1, R41/R42, connector J52, terminal J73, wire W6, and GPIO12/LED_PWM are gone from boards.md, bom.md, the variant README, and the wiring sources; pin 32 is now listed free, the gpio=12 boot directive and the firmware backlight row are dropped, and the unresolved 2N7002 3.3 V drive-margin blocker disappears with Q1.
• Renumbered the harness gaplessly — W1–W17 (power W1–W8, audio W9–W14, io W15–W17) with regenerated SVGs; procurement totals recompute to 1.40 m 22 AWG, 4.46 m 26 AWG, and ≈ 7.8 m loose wire.
• Replaced E4/E7 labels with prose — "relay module qualification open" and "antenna keep-out … open for casing design"; no document references to the E-numbers remain.
• Relaxed the regeneration instruction — Graphviz 14 or newer, with the note that each SVG records its Graphviz version in the header comment (the committed drawings record 14.1.2).

Verification performed: all three SVGs regenerate to text-identical drawings with WireViz 0.4.1; a tree-wide search finds no dangling backlight, LED_PWM, GPIO12, J51/J52, J7x, U5/U7, E4/E7, Q1, or R4x references; every harness and procurement total recomputes (22 AWG 1.60 − 0.20 = 1.40 m, 26 AWG 4.71 − 0.25 = 4.46 m including the 60 mm of straps, loose 0.30 + 0.48 + 1.68 + 5.35 = 7.81 ≈ 7.8 m); JC1's six circuits agree with the W15 loom, the J8 table, and the BOM; and the SVG header comments do record the Graphviz version as claimed.

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