Check timestamp writes against the clock lock - #41
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Two checks cover CLK_UNLOCK and CLK_LOCK, asserting that the bit reads back and that R_TIMESTAMP_SECOND takes the written value while unlocked and keeps its value while locked. Both run in the default v1 baseline. The lock check restores the unlocked state in a finally. The specification says a locked device rejects a write without saying whether it errors or acknowledges and ignores. The assertion is on the timestamp value, and the reply form is reported in the message. A device that refuses the ClockConfig write, or takes it with no effect, is skipped as not implementing the lock. Both checks also skip when CLK_REP or CLK_GEN is set, where the specification gives contradictory rules on whether the timestamp is writable. ReportSyncCapability now reads its bits through ClockConfigurationFlags.
bruno-f-cruz
approved these changes
Sep 13, 2026
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Two checks cover the
CLK_UNLOCKandCLK_LOCKbits ofR_CLOCK_CONFIGagainstR_TIMESTAMP_SECOND, closing the two remaining clock boxes in #28. Each sets the bit, asserts it reads back, and then asserts that the timestamp takes the written value while unlocked and keeps its value while locked.The v1 specification text already carries both obligations, including the read-back requirement: "it will reject any new timestamp values" and "The bit is read as 1 if the timestamp register is locked", so these run as part of the default baseline rather than prerelease.
What the checks deliberately do not assert
The reply form. The specification says a locked device rejects a write, without saying whether it answers with an
Erroror acknowledges and ignores it, and the tagged document has no error model at all. Asserting anErrorwould invent a requirement, so the assertion is that the timestamp value did not change, and the message reports which form the refusal took. A clarification for this is worth raising separately.Anything about clock routing.
CLK_REPends with "Setting this bit also enables writing on the timestamp register", which contradictsCLK_LOCKdisabling the same writes, and nothing says which wins. Both checks skip whenCLK_REPorCLK_GENis set, so they run only where both readings agree. That also avoids overriding clock routing, since the lock bits are written as a whole-register value.Whether an unimplemented lock is a defect. Implementing
R_CLOCK_CONFIGis only RECOMMENDED, so a device that refuses the write, or takes it with no effect, is skipped rather than failed. Both are treated the same because an unimplemented optional register is required to answer a write by reporting no effect, which makes the two indistinguishable by design.core.picorefuses the write today, so this is what keeps the checks meaningful on a Pico.Verified on hardware
Behavior device on firmware 3.2, which implements the lock fully: 26 passed, 0 failed, 4 skipped of 30, exit 0, and the device left at
0x40withCLK_UNLOCKset.The undefined encodings were probed separately from known starting states, and the results are why the checks are shaped this way rather than asserting more. A locked timestamp write is answered with an
Errorand the value is unchanged. Writing both lock bits at once resolves as lock wins. Writing neither is a no-op preserving the current state. Every write is acknowledged, and the device never reports an invalid encoding.Documentation
The warning gets one additional sentence, stating that an interrupted run can leave the timestamp register locked until the device is power cycled.