Add A5 sin/cos and integer vdiv PTODSL SoftLib implementations

[Zhendong404]

Fixes #993
Fixes #1181

Adds the unified A5 PTODSL SoftLib path for operations that cannot rely on the released BiSheng lowering. The late materialization pass now expands SIMT sin/cos and signed i32 vector vdiv after the main VPTO/TileLib optimizations, then the normal inline pass lowers the DSL helpers.

The i32 division helper is reused by the A5 tdiv, tdivs, and tcolexpanddiv TileLib templates and has lit, materialization, and tilelib-st precision coverage.

Validation:

• check-pto: 1689 passed, 1 existing unsupported test
• check-dsl: 34/34 passed
• SoftLib/TileLib targeted tests: 39 passed
• license-header-check: passed
• git diff --check: passed

[bingmeiyou]

#1181 在本地初步验证通过

[KurrinQu]

当前实现和ASC的接口功能和精度接近，但不是逐比特一致。对于大角度输入，ASC功能和精度相对完整些。后续有场景需要时，可以作为参考。

[reedhecre]

A3 板测失败

• 触发方式：merged
• 源码提交：11eb0837980d
• 结果汇总：OK 0 / FAIL 0 / SKIP 0
• 日志：/home/zhongxuan/ptoas-board-monitor/runtime/logs/20260813_051139_merged_pr1193.log
• 失败阶段：sample-build-and-test / exit=1

日志尾部

oisa_vec.py) SKIP requires --pto-arch=a5
Sync(test_intercore_sync_a5.py) SKIP requires --pto-arch=a5
Sync(test_mem_inject_sync_basic.py) OK   generated: test_mem_inject_sync_basic-pto.cpp
Sync(test_set_wait_unified_api.py) OK   generated: test_set_wait_unified_api-pto.cpp
Sync(test_tmov_col_major_16x1_align_a5.pto) SKIP requires --pto-arch=a5
Sync(test_tmov_col_major_16x1_align_a5.py) SKIP requires --pto-arch=a5
Sync(test_tmov_row_major_1x16_control_a5.pto) SKIP requires --pto-arch=a5
Sync(test_tmov_row_major_1x16_control_a5.py) SKIP requires --pto-arch=a5
Sync(tmatmulk_autosync.py) OK   generated: tmatmulk_autosync-pto.cpp
TileSetGetValue(tile_getval_mat_invalid.py) XFAIL ptobc encode failed as expected
TileSetGetValue(tileSetGetValue.py) OK   generated: tileSetGetValue-pto.cpp
TInsert(tinsert_fp.py) OK   generated: tinsert_fp-pto.cpp
TInsert(tinsert.py) OK   generated: tinsert-pto.cpp
Tpows(tpows.py) OK   generated: tpows-pto.cpp
Tpow(tpow.py) OK   generated: tpow-pto.cpp
TPrefetchAsync(tprefetch_async_binding.py) OK   generated: tprefetch_async_binding-pto.cpp
TPrefetch(tprefetch.py) OK   generated: tprefetch-pto.cpp
TquantMxDn(tquant_mx_dn.pto) FAIL ptoas failed: tquant_mx_dn.pto
Trans(trans.py) OK   generated: trans-pto.cpp
Trap(trap.py) OK   generated: trap-pto.cpp
TTri(ttri.py) OK   generated: ttri-pto.cpp
VectorAddition(vadd_pto_ir.py) OK   generated: vadd_pto_ir-pto.cpp
VectorAddition(vadd_validshape_hyper.py) OK   generated: vadd_validshape_hyper-pto.cpp
VectorAddition(vectorAddition.py) OK   generated: vectorAddition-pto.cpp
Xors(xors.py) OK   generated: xors-pto.cpp
Xor(xor.py)  OK   generated: xor-pto.cpp
-----------------------------
OK=238  FAIL=1  SKIP=37
=============================
===== END STAGE sample-build-and-test rc=1 @ 2026-08-13 05:27:01 =====

[reedhecre]

A5 板测失败

• 触发方式：merged
• 源码提交：11eb0837980d
• 结果汇总：OK 20 / FAIL 1 / SKIP 0
• 日志：/root/ptoas-board-monitor-a5/logs/20260813_211606_merged_pr1193.log
• 结果 TSV：/root/ptoas-board-monitor-a5/logs/20260813_211606_merged_pr1193.tsv
• 失败阶段：board-validation-qwen / exit=1

失败用例

• rope_kv_cache (run, exit=2)