[VPTO] Add scheduler analysis framework

[yexiaosu]

Summary

Implement phase one of the VPTO scheduler framework described in #1143 .

This phase establishes the scheduling abstractions, dependency information, target model, and analysis infrastructure required by the full scheduler. It only analyzes operations inside pto.vecscope and pto.strict_vecscope; it does not select a new schedule or modify IR.

Key changes

• Introduce VPTOSchedulingOpInterface and normalized operation-local scheduling semantics.
• Partition vecscope blocks into independent scheduling regions using explicit boundaries.
• Build typed scheduling DAGs with:
  • SSA and live-in/live-out information;
  • memory and alias dependencies;
  • implicit register dependencies;
  • barrier, event, pipe, and buffer-ID synchronization dependencies.
• Define the generic A5 scheduling model, including scheduling classes, resources, issue width, latency, and pressure sets.
• Add directional scheduling boundaries with resource, hazard, and register-pressure trackers.
• Support top and bottom ready queues and multi-set register-pressure analysis.
• Add off, analyze, and on scheduler modes, restricted to A5 vector kernels.
• Produce deterministic analysis reports for regions, DAG edges, resource timelines, pressure changes, and operation coverage.
• Audit all registered emission-stage scheduling operations, with explicit reporting for unsupported, boundary, and unclassified operations.
• Add focused tests for resource reservations, shared resources, issue width, live-in/live-out handling, last use, bottom-up pressure, and predicate-pressure ordering.

Testing

• Full lit suite: 1691 passed, 1 unsupported, 0 failed.

[mouliangyu]

Blocking issue: the scheduler pass only analyzes pto.vecscope / pto.strict_vecscope bodies, while pto.set_flag and pto.wait_flag are required to remain outside the vector scope and synchronize the scope with the surrounding pipes. PTOInferVPTOVecScope also treats these operations as scope boundaries.

The new dependency tests place set/wait operations inside a vecscope (for example, event_signal_wait, dynamic_event_may_match, and event_pipe_order) in order to exercise event/pipe DAG edges. Those fixtures use an illegal VPTO shape and therefore do not demonstrate coverage of any legal emission path. The event/set-wait DAG handling is unreachable for the legal input accepted by this vecscope-only scheduler.

Please remove the illegal scope-internal set/wait fixtures and the corresponding out-of-scope handling from this phase. If the current verifier still accepts set/wait inside a vecscope, that is a verifier gap and should be rejected explicitly rather than treated as scheduler input. Event/pipe scheduling can be introduced when a legal scheduling region is expanded to include those operations.

[mouliangyu]

复核结论：最新提交已补上 vecscope 内同步操作的 verifier 约束，build-and-test 已通过；未发现当前会导致错误代码生成的 blocking correctness issue。

发现以下问题：

1. [P2] PR 删除了整个 docs/vpto-spec.md（1549 行），但新增的 docs/designs/vpto-scheduler-framework.md 只是调度器设计文档，并不是 VPTO/PTO micro instruction 规范的替代品。README 仍将该能力作为公开使用面，release 文档也继续依赖 micro-ISA 规范体系。若删除是有意迁移，需要明确新的 canonical 文档入口；否则这是与本 PR 无关的文档回归。

2. [P2] lib/PTO/IR/VPTOScheduling.cpp:318-334 的注册覆盖率审计从未递增 coverage.boundary 或填充 boundaryOps。任何实现 VPTOSchedulingOpInterface 且返回 SchedulingBoundary 的已注册操作，都会被错误地统计为 unclassified（或无法反映 boundary）。当前注册表恰好没有触发该分支，因此现有测试看不出问题，但审计 API 的结果不符合其 contract。

当前 head: 8f0a541b64dd5f399220bb126417b6558b99be0e。

[reedhecre]

A5 板测失败

• 触发方式：merged
• 源码提交：d2f3eaf8d963
• 结果汇总：OK 20 / FAIL 1 / SKIP 0
• 日志：/root/ptoas-board-monitor-a5/logs/20260813_152205_merged_pr1202.log
• 结果 TSV：/root/ptoas-board-monitor-a5/logs/20260813_152205_merged_pr1202.tsv
• 失败阶段：board-validation-qwen / exit=1

失败用例

• rope_kv_cache (run, exit=2)

[reedhecre]

A3 板测失败

• 触发方式：merged
• 源码提交：d2f3eaf8d963
• 结果汇总：OK 0 / FAIL 0 / SKIP 0
• 日志：/home/zhongxuan/ptoas-board-monitor/runtime/logs/20260813_012024_merged_pr1202.log
• 失败阶段：sample-build-and-test / exit=1

日志尾部

oisa_vec.py) SKIP requires --pto-arch=a5
Sync(test_intercore_sync_a5.py) SKIP requires --pto-arch=a5
Sync(test_mem_inject_sync_basic.py) OK   generated: test_mem_inject_sync_basic-pto.cpp
Sync(test_set_wait_unified_api.py) OK   generated: test_set_wait_unified_api-pto.cpp
Sync(test_tmov_col_major_16x1_align_a5.pto) SKIP requires --pto-arch=a5
Sync(test_tmov_col_major_16x1_align_a5.py) SKIP requires --pto-arch=a5
Sync(test_tmov_row_major_1x16_control_a5.pto) SKIP requires --pto-arch=a5
Sync(test_tmov_row_major_1x16_control_a5.py) SKIP requires --pto-arch=a5
Sync(tmatmulk_autosync.py) OK   generated: tmatmulk_autosync-pto.cpp
TileSetGetValue(tile_getval_mat_invalid.py) XFAIL ptobc encode failed as expected
TileSetGetValue(tileSetGetValue.py) OK   generated: tileSetGetValue-pto.cpp
TInsert(tinsert_fp.py) OK   generated: tinsert_fp-pto.cpp
TInsert(tinsert.py) OK   generated: tinsert-pto.cpp
Tpows(tpows.py) OK   generated: tpows-pto.cpp
Tpow(tpow.py) OK   generated: tpow-pto.cpp
TPrefetchAsync(tprefetch_async_binding.py) OK   generated: tprefetch_async_binding-pto.cpp
TPrefetch(tprefetch.py) OK   generated: tprefetch-pto.cpp
TquantMxDn(tquant_mx_dn.pto) FAIL ptoas failed: tquant_mx_dn.pto
Trans(trans.py) OK   generated: trans-pto.cpp
Trap(trap.py) OK   generated: trap-pto.cpp
TTri(ttri.py) OK   generated: ttri-pto.cpp
VectorAddition(vadd_pto_ir.py) OK   generated: vadd_pto_ir-pto.cpp
VectorAddition(vadd_validshape_hyper.py) OK   generated: vadd_validshape_hyper-pto.cpp
VectorAddition(vectorAddition.py) OK   generated: vectorAddition-pto.cpp
Xors(xors.py) OK   generated: xors-pto.cpp
Xor(xor.py)  OK   generated: xor-pto.cpp
-----------------------------
OK=238  FAIL=1  SKIP=37
=============================
===== END STAGE sample-build-and-test rc=1 @ 2026-08-13 01:53:44 =====