BM/topology: add QEMU DMR CPUID and cache topology checks - #599
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Add three CPU topology scenarios that validate the CPUID enumeration of a guest booted with a DMR Core Building Block SMP layout: - verify_qemu_dmr_one_socket_cpuid and verify_qemu_dmr_two_sockets_cpuid check CPUID leaf 0x1f thread/core/module/die/invalid domains, verifying each domain's level type, bit-width line and number of logical processors. - verify_qemu_dmr_cache_topo_cpuid checks CPUID leaf 0x04H cache topology for L1d/L1i/L2/L3, verifying cache type, cache level and the maximum addressable IDs for CPUs sharing the cache and for cores in the package. The scenarios are collected in tests-qemu-dmr, which documents the required guest -smp topology. Co-authored-by: GitHub Copilot <copilot@github.com> Signed-off-by: Farrah Chen <farrah.chen@intel.com> (cherry picked from commit b9efee96f64eac2cf36f9a814436dd8967a0b618)
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Add three CPU topology scenarios that validate the CPUID enumeration of a guest booted with a DMR Core Building Block SMP layout:
The scenarios are collected in tests-qemu-dmr, which documents the required guest -smp topology.
(cherry picked from commit b9efee96f64eac2cf36f9a814436dd8967a0b618)