[LKVS Sync] sync/KVM-20260914 form 20260429 - #601
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TDX module initialization info changed from "tdx: module initialized" to "tdx: TDX-Module initialized" from upstream kernel 7.1 Signed-off-by: Farrah Chen <farrah.chen@intel.com> (cherry picked from commit c3bed41)
Add WRMSRNS variant to x86_cpuid.cfg to verify CPUID(7.0.1.0:EAX[19]) support in both VM and TDX guests. The feature is already defined in BM/instruction-check/feature_list.py, so only a cfg addition is needed. Supported variants: - x86_cpuid.vm.wrmsrns - x86_cpuid.tdvm.wrmsrns Signed-off-by: Farrah Chen <farrah.chen@intel.com> (cherry picked from commit 89781fc)
(cherry picked from commit 0c282e8)
waitpkg won't be exposed to SPR, EMR and GNR cpu model. Signed-off-by: Xudong Hao <xudong.hao@intel.com> (cherry picked from commit 5d19b08)
(cherry picked from commit 935fb0c)
Add the AVX512_BF16 feature mapping, x86_cpuid and x86_cpu_flags variant for vm and tdvm coverage. Add the amx_vm_icx x86_cpuid variant for vm coverage only, because TDX does not support the required named CPU model. Guard x86_cpuid session cleanup so setup failures do not mask the real error. Signed-off-by: Farrah Chen <farrah.chen@intel.com> (cherry picked from commit a892440)
(cherry picked from commit 1577282)
TDX VE reduction test case family covering CPUID compliance validation
with topology matrix and CPU feature toggles.
Implementation details:
- 10 test variants: tdx_ve_enabled, tdx_ve_cpuid_default,
tdx_ve_cpuid_cpu_tp{1,2,3}, tdx_ve_back_feature_{off,on},
tdx_ve_back_feature_on_ve, tdx_ve_ctls_feature_{off,on}
- Handler: tdx_ve_reduction.py with actions (ve_check, compliance,
compliance_ve_series)
- CFG-driven variant matrix for topology, CPU model flags, and
VE verification combinations
- Verification: guest dmesg REDUCE_VE marker, TDX-compliance module
output validation, VE trigger count in debug logs
Signed-off-by: Farrah Chen <farrah.chen@intel.com>
(cherry picked from commit 283894b)
Migrate save/restore cases from vmm_tree ha/save_restore suite. Uses QEMU migrate "exec:..." mechanism via avocado-vt's vm.save_to_file() / vm.restore_from_file() APIs. Supported variants (VM only, TDX does not support SR): - vm_1vcpu_sr, vm_2vcpu_sr, vm_4vcpu_sr, vm_8vcpu_sr - vm_sr_2times (2 iterations) - cpu_num_after_sr, cpu_flag_after_sr, mem_size_after_sr - time_test_after_sr, vm_sr_continuity, vm_sr_avx Signed-off-by: Farrah Chen <farrah.chen@intel.com> (cherry picked from commit 6b3df07)
Add 11 live migration cases migrated from vmm_tree: - vm_1vcpu_lm, vm_2vcpu_lm, vm_4vcpu_lm, vm_8vcpu_lm (vcpu variants) - vm_lm_2times, vm_stress_local_lm (iteration-based) - cpu_flag_after_lm, cpu_num_after_lm, mem_size_after_lm (state verify) - time_test_after_lm, vm_lm_continuity (post-migration verify) Two Python handlers: - live_migration_repeat.py: iteration-based migration with configurable count - live_migration_verify.py: post-migration state verification (cpu flags, cpu count, memory size, time drift, process continuity) All 11 variants validated via avocado run. Signed-off-by: Farrah Chen <farrah.chen@intel.com> (cherry picked from commit e17e000)
Test verifies TD VM can boot with NUMA configuration: - TD VM boot with 1 NUMA node (4G RAM, 4 vCPUs, memory-backend-ram, prealloc=on) - Uses boot_check handler to verify boot and resource allocation Signed-off-by: Farrah Chen <farrah.chen@intel.com> (cherry picked from commit 958000a)
- Remove force_create_image/remove_image params from all cfg files force_create_image defaults to no, remove_image defaults to yes but is already set to no in base.cfg, so both are unnecessary in case cfg - Add shell_prompt with default centos regex to all cfg files - Add comment noting it can be overwritten in runtime cfg Signed-off-by: Farrah Chen <farrah.chen@intel.com> (cherry picked from commit 3806d61)
Add 3 new cpu_model test variants and update QEMU CPU model versions for existing variants to match latest definitions. New variants in KVM/qemu/cpu_model.cfg: - broadwell: Broadwell-v4, CPUID check for ADX - cascadelake: Cascadelake-Server-v7 with +vmx flag, checks AVX512_VNNI, PKU, ARCH_CAPABILITIES, IBRS, SSBD, VMX, and stepping (CPUID.01H:EAX bits 0:3 = 6) - skylake_server: Skylake-Server-v6, checks AVX512_F Version bumps for existing variants: - DiamondRapids-v1 -> DiamondRapids-v2 - GraniteRapids-v3 -> GraniteRapids-v7 - SapphireRapids-v4 -> SapphireRapids-v8 - Icelake-Server-v7 -> Icelake-Server-v9 Add 5 new feature entries in BM/instruction-check/feature_list.py: - ADX, VMX, IBRS, ARCH_CAPABILITIES, SSBD with CPUID leaf/bit definitions and platform support (SPR, EMR, GNR, SRF, CWF, DMR) Signed-off-by: Farrah Chen <farrah.chen@intel.com> (cherry picked from commit 26b82d7)
Add NMI Source CPUID negative test that boots a VM with -cpu host,-nmi-source and verifies CPUID.7.1:EAX[20] is hidden. Implementation: - Prerequisite: checks FRED CPUID and /proc/cpuinfo flag - Negative check: confirms NMI source bit is NOT visible in guest - Reuses cpuid_utils.prepare_cpuid() + check_cpuid() with get_baremetal_dir() Supports: vm (standard guest with -nmi-source disabled) Signed-off-by: Farrah Chen <farrah.chen@intel.com> (cherry picked from commit 5ad6f93)
Test verifies TD VM can boot with quote-generation-socket (vsock) configured and validates the TSM report interface inside guest: - TD VM boot with QGS vsock params (cid=2, port=4050) - TSM configfs report interface validation (mkdir, inblob, outblob) Uses JSON cmdline format for tdx-guest object to support nested quote-generation-socket properties. Signed-off-by: Farrah Chen <farrah.chen@intel.com> (cherry picked from commit a9fa381)
Add CPUID leaf 0x1F (V2 Extended Topology Enumeration) validation test with 4 variants: - host: validate on bare-metal host directly - srf: SierraForest-v6 model, 2S/2D/2C topology - gnr: GraniteRapids-v7 model, 2S/2D/2C topology - spr: SapphireRapids-v8 model, 2S/2D/2C topology Implementation uses a self-contained C program (cpuid_1f_check.c) with inline CPUID assembly to enumerate sub-leaves and verify that total logical CPUs are evenly divisible by CPUs-per-package reported at the highest topology level. Guest variants require dies > 1 to expose CPUID 0x1F in QEMU. Signed-off-by: Farrah Chen <farrah.chen@intel.com> (cherry picked from commit 4bd86c4)
Add cpuid_after_lm variant to live_migration_verify test that dumps
all CPUID leaves (cpuid -1 -r) before and after local live migration,
then compares them line-by-line. Any difference causes test failure.
Implementation:
- Copy host cpuid binary to guest if not present (dnf install on
host if needed, cancel if unavailable)
- Collect full CPUID dump pre-migration
- Perform local live migration
- Collect post-migration dump and diff against pre-state
- Report exact changed lines on failure
Supports: vm (standard guest, 4 vCPU)
Signed-off-by: Farrah Chen <farrah.chen@intel.com>
(cherry picked from commit f722f34)
For verify_target=cpuid in live_migration_verify: - check whether cpuid exists in guest with which - if missing, install cpuid in guest via utils_package.package_install() - cancel the case if package installation fails This follows review feedback to avoid host-side dnf/copy workaround and keeps package handling distro-aware in guest. Signed-off-by: Farrah Chen <farrah.chen@intel.com> (cherry picked from commit 5790115)
Add vm_incr_vcpu test case that boots a guest with vCPU count exceeding the host physical CPU count (host_count + 1), using q35 machine with kernel-irqchip=split and cpu=host model. Test verifies: - Guest boots successfully with oversubscribed vCPU count - Guest reports expected vCPU count via /proc/cpuinfo - No kernel errors in host dmesg Signed-off-by: Farrah Chen <farrah.chen@intel.com> (cherry picked from commit 432350cfba8b700449f32f16fc400070176e7ad4)
(cherry picked from commit 7efac233f09d8e36e5fca047a394d5c24a308918)
(cherry picked from commit 85680966528754c0dd608ecf98987a0f9ff65855)
Collect PMU hardware events inside a TD guest for a fixed 5 second window and verify the perf output header is produced. Behavior: - Prepare host for mediated PMU before boot: disable nmi_watchdog and reload kvm_intel with enable_mediated_pmu=Y. - Boot TD VM with pmu enabled via cpu_model_flags=,pmu=on. - Inside guest, run perf stat over six events (cache-misses, instructions, branch-misses, bus-cycles, branch-instructions, L1-dcache-loads) with -a -- sleep 5. - Assert output contains 'Performance counter stats'. - Restore host state after guest destroy: re-enable nmi_watchdog and reload kvm_intel without mediated PMU. Variants: - tdx_hdevents_in5sec (TD guest) Signed-off-by: Farrah Chen <farrah.chen@intel.com> (cherry picked from commit 5e60d0e63b3f134299e399375075b5000df49f5b)
Add four vcpu hotplug variants under KVM/qemu/vcpu_hotplug.cfg that exercise QEMU device_add/device_del for cold-plug vcpu devices: - vcpu_hot_add: hotplug one vcpu device and verify guest cpu count. - vcpu_hot_remove: hotplug + verify, then hotunplug + verify. - vcpu_repeat_hotplug: 15 iterations of hotplug + hotunplug. - vcpu_multiple_hotplug: hotplug 15 vcpu devices in one cycle, then hotunplug all and verify guest cpu count is restored. The shared handler KVM/qemu/tests/vcpu_hotplug.py dispatches on vcpu_action, uses vm.hotplug_vcpu_device / vm.hotunplug_vcpu_device from avocado-vt qemu_vm, verifies guest cpu count via cpu_utils.check_if_vm_vcpus_match_qemu, and explicitly onlines / offlines newly added guest CPUs via /sys/devices/system/cpu to tolerate guests without automatic udev online rules. Boot topology is pinned per variant (smp + vcpu_maxcpus + vcpu_cores with vcpu_sockets/vcpu_threads = 1) so that the vcpu bus initialize step in avocado-vt can locate the first hotpluggable slot deterministically. Signed-off-by: Farrah Chen <farrah.chen@intel.com> (cherry picked from commit 843752df674054c0756e3a8a3417ca52af63f43a)
Add an avx2 variant to the existing x86_cpu_flags test instead of creating a separate handler. The x86_cpu_flags framework already checks host flags, boots a guest with cpu_model=host, and verifies the same flags inside the guest — exactly what the avx2 check needs. Signed-off-by: Farrah Chen <farrah.chen@intel.com> (cherry picked from commit 5269f9f238b5000a1fadd16038f996c7627cbc46)
Add two QEMU/KVM bus-lock VM-exit test variants under the shared buslock_ve handler: - bus_lock_exit: boot a VM with "-machine bus-lock-ratelimit=20", trigger a bus lock inside the guest via the existing bus_lock.c helper, and verify a BUS_LOCK VM exit is recorded on the host kvm/kvm_exit tracepoint by simply grepping BUS_LOCK from /sys/kernel/debug/tracing/trace. The legacy raw kvm_exit exit_reason bit-decoding is replaced by a robust presence check. - ratelimit_effect: boot two VMs sequentially, baseline (no ratelimit) and ratelimited (bus-lock-ratelimit=20), each running a continuous locked_add_1 loop on an unaligned cache-line-crossing address (new bus_lock_ct.c). On host, sample the bus_lock.split_locks PMU event twice via "perf stat -a -I 1000 --interval-count 2" and assert baseline >= ratelimited. On modern Intel server CPUs the legacy SQ_MISC.BUS_LOCK raw encoding (cpu/event=0x2c,umask=0x10/) is no longer available, so the modernized named event is used and controlled entirely from cfg. The handler dispatches on the buslock_ve_action cfg key, boots via start_vm=no + env_process.preprocess_vm(), always cleans up VMs and the host kvm_exit tracepoint state in finally blocks, uses utils_package.package_install() for guest gcc, and cancels early if the host does not report IA32_VMX_PROCBASED_CTLS2[62]. Signed-off-by: Farrah Chen <farrah.chen@intel.com> Co-authored-by: GitHub Copilot <copilot@github.com> (cherry picked from commit bfafe5dafd3173d4653a34f6514949850b673209)
New avocado-vt test verifying that no guest #PF vmexits reach KVM when Intel EPT is enabled on the host. The handler enables a narrowly filtered kvm_exit tracepoint (exit_reason == EXCEPTION_NMI, i.e. VMX reason 0), boots the guest via env_process.preprocess_vm, sleeps trace_duration seconds, then greps the ftrace buffer on the host to count total EXCEPTION_NMI exits and the subset whose intr_info vector is 14 (#PF). Any non-zero #PF count fails the case; total_exc is only logged for context. Signed-off-by: Farrah Chen <farrah.chen@intel.com> Co-authored-by: GitHub Copilot <copilot@github.com> (cherry picked from commit 0faf3b9a2a2a2406aa134b0e09f9fdcd3972833c)
Add xsaves to KVM/qemu/x86_cpu_flags.cfg so guest exposure of the XSAVES flag is covered by the existing x86_cpu_flags handler, which already checks the flag on host and in the guest (cpu_model=host). This drops the standalone xsaves_feature case per PR review: - The 'present' variant was a straight subset of what x86_cpu_flags does, so it moves into that cfg as a one-line variant. - The 'disabled' variant (append 'noxsaves' via grubby + reboot) is removed as low-value: it verifies a Linux kernel switch, not KVM behaviour, and the reboot dominates the runtime. Signed-off-by: Farrah Chen <farrah.chen@intel.com> Co-authored-by: GitHub Copilot <copilot@github.com> (cherry picked from commit b363ed74d39a67657fcb9cf2c08012d7e10bd100)
Migrate the HVM_XSAVES_VZ, HVM_XSAVES_SECURITY, and HVM_XSAVES_NBENCH
XVS cases to avocado-vt.
The new xsaves_workload test verifies XSAVES support in the guest via
three self-contained user-space payloads that all rely on the guest FPU
state save/restore path being correct:
vz - Compiles two variants of a tight SSE loop, with and without
vzeroupper (-DVZ), and asserts that neither variant is more
than 4x the runtime of the other under KVM.
security - Corrupts the signal-frame fpstate pointer from a SIGHUP
handler and expects the guest kernel to kill the process
and emit 'bad frame' via dmesg. Confirms sigreturn fpstate
validation stays intact under XSAVES.
nbench - Builds and runs the classic nbench numeric benchmark suite
as a full FP workload and verifies that at least two
benchmarks complete under a bounded run window.
The vz and security sources are vendored under KVM/qemu/deps/xsaves_workload
alongside the upstream nbench-byte-2.2.3 tarball. security.c is updated
to use ucontext_t (the anonymous 'struct ucontext' name was removed in
glibc 2.26+). nbench needs '-static' dropped from its Makefile at build
time because glibc-static is not available on all guest images; the
handler applies this via a one-line sed step.
Host XSAVES support is checked before boot; the test cancels if the
host lacks the flag. Guest verification uses provider.cpu_utils
.check_cpu_flags so the flag list is easy to extend for XSAVE variants.
The VM is torn down unconditionally in a finally block.
Signed-off-by: Farrah Chen <farrah.chen@intel.com>
Co-authored-by: GitHub Copilot <copilot@github.com>
(cherry picked from commit 25032fb6f4cdf4bdfbec786eb955523cbccc128c)
Migrate the HVM_XSAVES_SR (save/restore) and HVM_XSAVES_LM
(live migrate) XVS cases to avocado-vt.
The new xsaves_persistence test exercises the XSAVES / FPU state-save
path across VM state transitions and asserts that the flag survives the
transition AND that the guest can still successfully run an FP workload
afterwards.
Variants:
sr - Pause the guest, save state to a file via 'exec:cat' migration,
restore from the file, resume, and re-verify.
lm - Live-migrate the guest to a fresh local QEMU instance over TCP
and re-verify.
Both variants run the nbench numeric benchmark before and after the
transition (bounded to 60 seconds so total case time stays reasonable).
The tarball is reused from KVM/qemu/deps/xsaves_workload/.
Host XSAVES availability is checked first via
provider.cpu_utils.check_cpu_flags; the case is cancelled on hosts
without XSAVES. The save-state file is removed and the VM destroyed in
a finally block.
Signed-off-by: Farrah Chen <farrah.chen@intel.com>
Co-authored-by: GitHub Copilot <copilot@github.com>
(cherry picked from commit be7dbb5c6b67fb44e2045dfa4130e373b696740d)
…elivery Add Local Machine Check Exception (LMCE) tests and extend the existing RAS suite to cover SRAO/SRAR with the LMCE local-delivery path. Naming ------ Every case name follows `<mce_hmp|mce_einj>.<error_type>_lmce_<state>`: - `mce_hmp.*` QEMU HMP `mce` injection path (no real hardware required) - `mce_einj.*` real APEI EINJ path (requires BIOS EINJ enabled, Patrol Scrub disabled) The top-level name makes the injection method explicit, so cases with the same `<error_type>_lmce_<state>` suffix (e.g. `mce_hmp.srao_lmce_on` vs `mce_einj.srao_lmce_on`) are visibly distinguished by their delivery path instead of by two similarly-named test files. Cases ----- KVM/qemu/mce_hmp.cfg HMP `mce` injection path: - sanity_lmce_off / sanity_lmce_on: verify guest IA32_MCG_CAP[27], IA32_FEATURE_CONTROL[20] and IA32_MCG_EXT_CTL[0] match the configured `-cpu ...,lmce=on|off` flag. - srao_lmce_off: broadcast SRAO MCE via HMP `mce -b` with LMCE disabled; expect no LMCE marker in guest dmesg. - srao_lmce_on: LMCE-flagged (MCG_STATUS.LMCE_S) SRAO MCE via HMP `mce` with LMCE enabled; verify local delivery. - srar_lmce_on: compile guest victim helper pinned to vCPU 0 (`taskset -c 0`), start it consuming, then inject SRAR (MCG_STATUS=EIPV|LMCE_S) at the mapped GPA; expect action-required QMP event, victim exit=135 (SIGBUS.AR), guest dmesg `Uncorrected` + LMCE marker. KVM/qemu/mce_einj.cfg real APEI EINJ path: - srao_lmce_off: host EINJ error_type=0x10 -> guest victim consumes -> SIGBUS + host EDAC decode. LMCE off, so the SRAO is broadcast to every vCPU. This variant is exposed to a probabilistic host + KVM + guest rendezvous panic: if any vCPU misses the fixed MCE_TIMEOUT_US window in `mce_start`, the guest panics in `mce_panic()` before it can log the SIGBUS. The test file explains this in a top-of-run() comment and logs a warning on failure asking for a rerun before treating it as a regression. - srao_lmce_on: SRAO variant with cpu_model_flags=,lmce=on; additionally asserts LMCE MSR bits and LMCE marker in guest dmesg proves KVM preserves MCG_STATUS.LMCE_S when forwarding a real host-injected MCE. Local delivery, not affected by broadcast rendezvous. - srar_lmce_on: SRAR variant with LMCE enabled, covering the XVS SRAR+LMCE end-to-end scenario. Local delivery. Implementation -------------- New shared helper KVM/qemu/provider/lmce_utils.py: - MCG_STATUS / MCI_STATUS constants (Intel SDM Vol.3B Table 15-20). - install_msr_tools, check_lmce_state (LMCE MSR bits), check_lmce_marker (dmesg strict for lmce=off, informational for lmce=on because CentOS 9's deferred workqueue logs `Machine check events logged` instead of an explicit `LMCE` marker). - build_victim (guest gcc + deps/ras/victim.c compile) and parse_victim_gpa (robust `physical address of ... = 0xGPA` parse), consolidated so both the HMP flow (mce_hmp.py) and the EINJ flow (mce_einj.py) share one implementation. KVM/qemu/tests/mce_hmp.py: - Injection uses HMP `mce` (`mce -b` broadcast for lmce=off, single-CPU for lmce=on) and returns as soon as QEMU emits the MEMORY_FAILURE QMP event no legacy mcelog scraping. - SRAR path pins the victim to vCPU 0, triggers the read loop before injection so the SRAR arrives while the victim is current, and verifies SIGBUS.AR delivery via exit=135. KVM/qemu/tests/mce_einj.py: - After the existing host+guest dmesg checks, when lmce_state is set, run lmce_utils.check_lmce_state + check_lmce_marker. - Both host and guest dmesg polls use utils_misc.wait_for(..., timeout=30s, step=1s). EINJ error_inject returns as soon as the poison is planted; the MCE, EDAC decode and guest memory_failure propagation happen on background workqueues and can lag several seconds reading dmesg once immediately after `echo trigger` races the path. - srao_lmce_off broadcast risk is documented at the top of run() and the on-failure warning() names the likely cause and asks for a rerun before treating it as a regression. The finally block is guarded so a guest unreachable after a rendezvous panic cannot mask the original exception. Coverage relative to XVS ------------------------ | XVS case | Coverage in this PR | |-----------------------------|----------------------------------------------------------------------| | lmce_off state | mce_hmp.sanity_lmce_off | | lmce_on state | mce_hmp.sanity_lmce_on | | lmce_off_srao (mce-inject) | mce_hmp.srao_lmce_off + mce_einj.srao_lmce_off (rendezvous note) | | lmce_on_srao | mce_hmp.srao_lmce_on + mce_einj.srao_lmce_on | | lmce_on_srar | mce_hmp.srar_lmce_on + mce_einj.srar_lmce_on | Dependencies ------------ Reuses the existing KVM/qemu/deps/ras/victim.c helper (already in tree; sourced from https://github.com/andikleen/mce-test/tree/master/tools/victim, GPL-2.0). No binaries added. Smoke: 8/8 PASS on CWF-1S3, kernel 6.14.0-cwf.bkc.6.14.13.1.16.x86_64, Intel-patched QEMU, guest q35 + RHEL 9 (job-2026-07-21T16.03-b788944, 414.03s). Signed-off-by: Farrah Chen <farrah.chen@intel.com> Co-authored-by: GitHub Copilot <copilot@github.com> (cherry picked from commit 7d24b3fb75191d7687e67b5a6ab9580dc252c4e1)
Signed-off-by: Xudong Hao <xudong.hao@intel.com> (cherry picked from commit f9da009832ab127475e5bf9b7161ae224850a475)
Add stress_test to run a stress-ng CPU/mem/io/hdd workload inside a KVM guest. The handler installs stress-ng via utils_package, runs it with the configured worker/memory/disk/timeout parameters, and verifies the tool's completion banner reports 'successful'. stress-ng supersedes the classic 'stress' tool and is actively maintained; a single variant (stress_test) is sufficient. Signed-off-by: Farrah Chen <farrah.chen@intel.com> Co-authored-by: GitHub Copilot <copilot@github.com> (cherry picked from commit 48315ca6b2ac23391283746a12830714b5e8cac6)
Add virt_interrupt to verify kvm:kvm_inj_virq tracepoint fires during guest execution. The handler starts perf record on the host for the configured duration, boots a guest, then parses perf report to assert that virtual interrupt injection events were observed (count > 0). Signed-off-by: Farrah Chen <farrah.chen@intel.com> Co-authored-by: GitHub Copilot <copilot@github.com> (cherry picked from commit 7f77a5c75b27e28a0205e54a91115c1af949ca88)
Cover three SierraForest CPU model scenarios: - cpu_model.srf_vmx: boot with SierraForest-v3 + vmx enabled, verify VMX feature exposed to guest via CPUID check - live_migration.srf_lm: live migrate a guest running with SierraForest-v3 CPU model (1 iteration, 4 vCPUs) - cache_model.srf: boot with SierraForest-v3 and module-aware SMP topology, compare host vs guest cache share scope (per-core, per-module, per-die, per-socket) for each cache index Note: KVM_SRF_AVX_NC is already covered by existing cpu_model.srf variant which checks AVX_NE_CONVERT in its features list. Signed-off-by: Farrah Chen <farrah.chen@intel.com> Co-authored-by: GitHub Copilot <copilot@github.com> (cherry picked from commit ef8e62fc85a3167c6be79f593a1071808e94f84e)
Add multiple CPU model validation scenarios: VMX boot variants (cfg-only, reuse cpu_model handler): - cpu_model.srf_vmx: SierraForest-v3 + vmx - cpu_model.gnr_vmx: GraniteRapids-v7 + vmx - cpu_model.spr_vmx: SapphireRapids-v8 + vmx - cpu_model.cooperlake_vmx: Cooperlake-v2 + vmx Live migration variants (cfg-only, reuse live_migration_repeat): - live_migration.srf_lm: SierraForest-v3 - live_migration.gnr_lm: GraniteRapids-v7 - live_migration.spr_lm: SapphireRapids-v8 - live_migration.cascadelake_lm: Cascadelake-Server-v7 Cache topology verification (new handler): - cache_model.srf: SierraForest-v3 - cache_model.gnr: GraniteRapids-v3 - cache_model.spr: SapphireRapids-v4 Compares host vs guest cache share scope per index. Platform-specific: only passes on matching hardware. CPUID extended leaf verification (new handler): - cpuid_extended.leaf_80000005: all registers zero - cpuid_extended.leaf_80000006: all registers zero (Intel) Signed-off-by: Farrah Chen <farrah.chen@intel.com> Co-authored-by: GitHub Copilot <copilot@github.com> (cherry picked from commit 3e47f11986855787f07d668a462b378b3449e12c)
AMX-TF32 CPUID.1EH.01H:EAX[bit 06] was removed from DMR and future products per the latest Intel Spec. Signed-off-by: Xudong Hao <xudong.hao@intel.com> (cherry picked from commit 5a2f059a7a1e34fcf8852bcee5ee631f889cd494)
Add a nested KVM test suite that boots an L2 guest inside an L1 KVM guest using a reflink copy of the L1 image attached to L1 as a virtio-blk device (/dev/vdb). No NFS or initramfs is required; both raw and qcow2 images are supported. - nested_boot.py / nested_boot.cfg: boot L2 inside L1 and verify it over SSH (uname). Includes CPU model variants for nested hypervisor coverage (Cascadelake/Cooperlake/Denverton/GraniteRapids/ Icelake-Server/SapphireRapids/SierraForest/Snowridge). - nested_l2_test.py / nested_l2_test.cfg + deps/nested_l2_test/ pku_test.c: reuse the nested_boot helpers to run in-L2 feature checks for PKU and vPMU. Host nested KVM is enabled from the cfg via pre_command (test error if it cannot be enabled) and restored via post_command only when the case itself toggled it on, leaving already-nested hosts untouched. This combines the work previously split across three PRs (nested boot, CPU model variants, and PKU/vPMU feature tests). Co-authored-by: GitHub Copilot <copilot@github.com> Signed-off-by: Farrah Chen <farrah.chen@intel.com> (cherry picked from commit 90a248cdb8df21fa94b075c158ef1139ae1f2d6f)
Add an avx2 variant to x86_cpuid.cfg that verifies AVX2 enumeration via CPUID.(EAX=07H,ECX=0):EBX[bit 5] on both host and guest. Signed-off-by: Farrah Chen <farrah.chen@intel.com> (cherry picked from commit 6008a6ef694c83357bd5a39830a75bed9cf9ed16)
Add five feature_test variants that boot a guest with a DMR-style CPU topology (module SMP level via smp-cache) and run the existing BM topology scenarios inside the guest: - topology_die_cluster_1: single-socket DMR CPUID 0x1f level check - topology_die_cluster_2: two-socket DMR CPUID 0x1f level check - topology_cores_per_socket: cores-per-socket consistency - topology_sockets_number: socket count vs NUMA node count - topology_cache_topo: DMR cache topology (leaf 0x04H) check Each variant appends a second -smp carrying the modules= level via extra_params (the module level cannot be emitted natively) and enables per-module L2 sharing through the machine smp-cache options. The sockets_number variant uses native NUMA params so the guest exposes one NUMA node per socket. Add the matching BM/topology scenario list files consumed by runtests.py. Co-authored-by: GitHub Copilot <copilot@github.com> Signed-off-by: Farrah Chen <farrah.chen@intel.com> (cherry picked from commit 4643bbc2b2c252f5cfd42c4c81197ad3edd5d9b6)
Add a 2031M variant to boot_check.cfg that boots a guest with an unaligned memory size (mem=2031) for both vm and tdvm, restricted to the 1_cpu combination. Since 2031 is not aligned to the guest memory block size, the in-guest total memory can not match it exactly, so a check_mem switch is added (default on) and turned off for this variant to only require a successful boot. Signed-off-by: Farrah Chen <farrah.chen@intel.com> (cherry picked from commit 1418e419c955564abbbf7be6136aa9a9857d5541)
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Automated synchronization via LKVS BKM Sync (Type A).
mainsync/KVM-20260914fd4cbee063b6ca1acd39807f2a77bf31ba175cad