[PW_SID:1150311] perf: riscv: Fix counter_idx_base in PMU snapshot restart - #2514
[PW_SID:1150311] perf: riscv: Fix counter_idx_base in PMU snapshot restart#2514linux-riscv-bot wants to merge 1 commit into
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In pmu_sbi_start_ovf_ctrs_snapshot(), after for_each_set_bit() finishes iterating used_hw_ctrs[i], idx is left at BITS_PER_LONG. The subsequent sbi_ecall() uses idx * BITS_PER_LONG as counter_idx_base, passing an out-of-range value (4096 on 64-bit) to SBI_EXT_PMU_COUNTER_START. This causes the firmware to reject the call and overflowed counters are never restarted. Use the outer loop index 'i' instead of the exhausted iterator 'idx'. Fixes: a862521 ("drivers/perf: riscv: Implement SBI PMU snapshot function") Signed-off-by: liutong <liutong@iscas.ac.cn> Signed-off-by: Linux RISC-V bot <linux.riscv.bot@gmail.com>
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Patch 1: "perf: riscv: Fix counter_idx_base in PMU snapshot restart" |
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Patch 1: "perf: riscv: Fix counter_idx_base in PMU snapshot restart" |
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Patch 1: "perf: riscv: Fix counter_idx_base in PMU snapshot restart" |
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Patch 1: "perf: riscv: Fix counter_idx_base in PMU snapshot restart" |
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Patch 1: "perf: riscv: Fix counter_idx_base in PMU snapshot restart" |
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Patch 1: "perf: riscv: Fix counter_idx_base in PMU snapshot restart" |
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Patch 1: "perf: riscv: Fix counter_idx_base in PMU snapshot restart" |
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Patch 1: "perf: riscv: Fix counter_idx_base in PMU snapshot restart" |
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Patch 1: "perf: riscv: Fix counter_idx_base in PMU snapshot restart" |
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Patch 1: "perf: riscv: Fix counter_idx_base in PMU snapshot restart" |
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Patch 1: "perf: riscv: Fix counter_idx_base in PMU snapshot restart" |
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Patch 1: "perf: riscv: Fix counter_idx_base in PMU snapshot restart" |
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PR for series 1150311 applied to workflow__riscv__fixes
Name: perf: riscv: Fix counter_idx_base in PMU snapshot restart
URL: https://patchwork.kernel.org/project/linux-riscv/list/?series=1150311
Version: 1