[PW_SID:1155128] RISC-V: KVM: Preserve LCOFIP when checking pending interrupts - #2562
[PW_SID:1155128] RISC-V: KVM: Preserve LCOFIP when checking pending interrupts#2562linux-riscv-bot wants to merge 4 commits into
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Overflow status and restart masks are u64, but bits were built with BIT(). On RV32 that is an unsigned long shift, so indices >= 32 truncate or wrap and corrupt the mask. Use BIT_ULL() for those u64 bitops. Fixes: a862521 ("drivers/perf: riscv: Implement SBI PMU snapshot function") Assisted-by: DeepSeek:deepseek-v3 Signed-off-by: Xixin Liu <liuxixin@kylinos.cn> Link: https://patch.msgid.link/prpmask01bitul.v2.1786434000.git.liuxixin@kylinos.cn [pjw@kernel.org: updated to apply] Signed-off-by: Paul Walmsley <pjw@kernel.org>
The available-counter mask was a single unsigned long, but iteration uses RISCV_MAX_COUNTERS, which is 64. On RV32 that reads past the object. Filling with an unsigned-long bit at index 32 and above is also wrong. Use DECLARE_BITMAP and set_bit/bitmap helpers. Walk each bitmap word into CFG_MATCH when checking events, when allocating an index, and when stopping all counters. Set the counter base to i times BITS_PER_LONG. Share the CFG_MATCH ecall through a small helper so the 32-bit argument split is not duplicated. On qemu-system-riscv32 the probe bitmap has bits above XLEN set, so the first word alone is not enough. Fixes: e999143 ("RISC-V: Add perf platform driver based on SBI PMU extension") Assisted-by: DeepSeek:deepseek-v3 Signed-off-by: Xixin Liu <liuxixin@kylinos.cn> Link: https://patch.msgid.link/prpmask02cmap.v2.1786434000.git.liuxixin@kylinos.cn [pjw@kernel.org: updated to apply] Signed-off-by: Paul Walmsley <pjw@kernel.org>
KVM injects the guest counter-overflow interrupt into HVIP bit 13 and records the same bit in irqs_pending. The guest enables it through VSIE LCOFIE, also at bit 13. kvm_riscv_vcpu_has_interrupts() shifts the complete VSIP valid mask by VSIP_TO_HVIP_SHIFT before matching it against irqs_pending. That maps SSIP, STIP, and SEIP to VSSIP, VSTIP, and VSEIP, but incorrectly moves LCOFIP from bit 13 to bit 14. The following high-interrupt term excludes all local interrupt bits, so it cannot recover LCOFIP. As a result, kvm_arch_vcpu_runnable() can report false for a vCPU waiting in WFI even though an enabled PMU overflow interrupt is pending. Keep LCOFIP in place while shifting the three interrupt classes that have distinct VS-level bit positions. This makes a vCPU halted in WFI runnable when its PMU overflow interrupt is pending. Fixes: 16b0bde ("RISC-V: KVM: Add perf sampling support for guests") Signed-off-by: Pengpeng Hou <pengpeng@iscas.ac.cn> Signed-off-by: Linux RISC-V bot <linux.riscv.bot@gmail.com>
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Patch 1: "RISC-V: KVM: Preserve LCOFIP when checking pending interrupts" |
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Patch 1: "RISC-V: KVM: Preserve LCOFIP when checking pending interrupts" |
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Patch 1: "RISC-V: KVM: Preserve LCOFIP when checking pending interrupts" |
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Patch 1: "RISC-V: KVM: Preserve LCOFIP when checking pending interrupts" |
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Patch 1: "RISC-V: KVM: Preserve LCOFIP when checking pending interrupts" |
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Patch 1: "RISC-V: KVM: Preserve LCOFIP when checking pending interrupts" |
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Patch 1: "RISC-V: KVM: Preserve LCOFIP when checking pending interrupts" |
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Patch 1: "RISC-V: KVM: Preserve LCOFIP when checking pending interrupts" |
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Patch 1: "RISC-V: KVM: Preserve LCOFIP when checking pending interrupts" |
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Patch 1: "RISC-V: KVM: Preserve LCOFIP when checking pending interrupts" |
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Patch 1: "RISC-V: KVM: Preserve LCOFIP when checking pending interrupts" |
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Patch 1: "RISC-V: KVM: Preserve LCOFIP when checking pending interrupts" |
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PR for series 1155128 applied to workflow__riscv__fixes
Name: RISC-V: KVM: Preserve LCOFIP when checking pending interrupts
URL: https://patchwork.kernel.org/project/linux-riscv/list/?series=1155128
Version: 1