[PW_SID:1155392] iommu/riscv: Fix command queue publishing races - #2566
[PW_SID:1155392] iommu/riscv: Fix command queue publishing races#2566linux-riscv-bot wants to merge 6 commits into
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Overflow status and restart masks are u64, but bits were built with BIT(). On RV32 that is an unsigned long shift, so indices >= 32 truncate or wrap and corrupt the mask. Use BIT_ULL() for those u64 bitops. Fixes: a862521 ("drivers/perf: riscv: Implement SBI PMU snapshot function") Assisted-by: DeepSeek:deepseek-v3 Signed-off-by: Xixin Liu <liuxixin@kylinos.cn> Link: https://patch.msgid.link/prpmask01bitul.v2.1786434000.git.liuxixin@kylinos.cn [pjw@kernel.org: updated to apply] Signed-off-by: Paul Walmsley <pjw@kernel.org>
The available-counter mask was a single unsigned long, but iteration uses RISCV_MAX_COUNTERS, which is 64. On RV32 that reads past the object. Filling with an unsigned-long bit at index 32 and above is also wrong. Use DECLARE_BITMAP and set_bit/bitmap helpers. Walk each bitmap word into CFG_MATCH when checking events, when allocating an index, and when stopping all counters. Set the counter base to i times BITS_PER_LONG. Share the CFG_MATCH ecall through a small helper so the 32-bit argument split is not duplicated. On qemu-system-riscv32 the probe bitmap has bits above XLEN set, so the first word alone is not enough. Fixes: e999143 ("RISC-V: Add perf platform driver based on SBI PMU extension") Assisted-by: DeepSeek:deepseek-v3 Signed-off-by: Xixin Liu <liuxixin@kylinos.cn> Link: https://patch.msgid.link/prpmask02cmap.v2.1786434000.git.liuxixin@kylinos.cn [pjw@kernel.org: updated to apply] Signed-off-by: Paul Walmsley <pjw@kernel.org>
Add a raw spinlock to the RISC-V IOMMU queue state so command queue publishing can be serialized by a later change. Fixes: 856c0cf ("iommu/riscv: Command and fault queue support") Signed-off-by: Fangyu Yu <fangyu.yu@linux.alibaba.com> Signed-off-by: Linux RISC-V bot <linux.riscv.bot@gmail.com>
Serialize command queue publishing so software producer state advances only after a command is written and the hardware tail is updated. Wait for hardware consumption outside the queue lock when the command queue is full so other CPUs are not blocked behind a long poll. Fixes: 856c0cf ("iommu/riscv: Command and fault queue support") Signed-off-by: Fangyu Yu <fangyu.yu@linux.alibaba.com> Signed-off-by: Linux RISC-V bot <linux.riscv.bot@gmail.com>
Do not wait for IOFENCE.C completion when the command failed to enter the queue. The command was not published to hardware, so waiting for its producer index can only report a misleading execution timeout. Fixes: 856c0cf ("iommu/riscv: Command and fault queue support") Signed-off-by: Fangyu Yu <fangyu.yu@linux.alibaba.com> Signed-off-by: Linux RISC-V bot <linux.riscv.bot@gmail.com>
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Patch 1: "[v2,1/3] iommu/riscv: Add command queue lock" |
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Patch 1: "[v2,1/3] iommu/riscv: Add command queue lock" |
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Patch 1: "[v2,1/3] iommu/riscv: Add command queue lock" |
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Patch 1: "[v2,1/3] iommu/riscv: Add command queue lock" |
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Patch 1: "[v2,1/3] iommu/riscv: Add command queue lock" |
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Patch 1: "[v2,1/3] iommu/riscv: Add command queue lock" |
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Patch 1: "[v2,1/3] iommu/riscv: Add command queue lock" |
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Patch 1: "[v2,1/3] iommu/riscv: Add command queue lock" |
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Patch 1: "[v2,1/3] iommu/riscv: Add command queue lock" |
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Patch 1: "[v2,1/3] iommu/riscv: Add command queue lock" |
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Patch 1: "[v2,1/3] iommu/riscv: Add command queue lock" |
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Patch 1: "[v2,1/3] iommu/riscv: Add command queue lock" |
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Patch 2: "[v2,2/3] iommu/riscv: Serialize command queue publishing" |
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Patch 2: "[v2,2/3] iommu/riscv: Serialize command queue publishing" |
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Patch 2: "[v2,2/3] iommu/riscv: Serialize command queue publishing" |
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Patch 2: "[v2,2/3] iommu/riscv: Serialize command queue publishing" |
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Patch 2: "[v2,2/3] iommu/riscv: Serialize command queue publishing" |
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Patch 2: "[v2,2/3] iommu/riscv: Serialize command queue publishing" |
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Patch 2: "[v2,2/3] iommu/riscv: Serialize command queue publishing" |
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Patch 2: "[v2,2/3] iommu/riscv: Serialize command queue publishing" |
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Patch 2: "[v2,2/3] iommu/riscv: Serialize command queue publishing" |
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Patch 2: "[v2,2/3] iommu/riscv: Serialize command queue publishing" |
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Patch 2: "[v2,2/3] iommu/riscv: Serialize command queue publishing" |
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Patch 2: "[v2,2/3] iommu/riscv: Serialize command queue publishing" |
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Patch 3: "[v2,3/3] iommu/riscv: Avoid waiting on failed command enqueue" |
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Patch 3: "[v2,3/3] iommu/riscv: Avoid waiting on failed command enqueue" |
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Patch 3: "[v2,3/3] iommu/riscv: Avoid waiting on failed command enqueue" |
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Patch 3: "[v2,3/3] iommu/riscv: Avoid waiting on failed command enqueue" |
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Patch 3: "[v2,3/3] iommu/riscv: Avoid waiting on failed command enqueue" |
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Patch 3: "[v2,3/3] iommu/riscv: Avoid waiting on failed command enqueue" |
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Patch 3: "[v2,3/3] iommu/riscv: Avoid waiting on failed command enqueue" |
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Patch 3: "[v2,3/3] iommu/riscv: Avoid waiting on failed command enqueue" |
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Patch 3: "[v2,3/3] iommu/riscv: Avoid waiting on failed command enqueue" |
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Patch 3: "[v2,3/3] iommu/riscv: Avoid waiting on failed command enqueue" |
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Patch 3: "[v2,3/3] iommu/riscv: Avoid waiting on failed command enqueue" |
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Patch 3: "[v2,3/3] iommu/riscv: Avoid waiting on failed command enqueue" |
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PR for series 1155392 applied to workflow__riscv__fixes
Name: iommu/riscv: Fix command queue publishing races
URL: https://patchwork.kernel.org/project/linux-riscv/list/?series=1155392
Version: 2