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e209039
clk: at91: peripheral: fix return value
masneyb Aug 11, 2025
a690a9d
clk: at91: peripheral: convert from round_rate() to determine_rate()
masneyb Aug 11, 2025
1b2330a
clk: fixed-factor: add determine_rate() ops
masneyb Aug 11, 2025
603f091
clk: at91: audio-pll: convert from round_rate() to determine_rate()
masneyb Aug 11, 2025
68432a3
clk: at91: h32mx: convert from round_rate() to determine_rate()
masneyb Aug 11, 2025
6ed58a5
clk: at91: pll: convert from round_rate() to determine_rate()
masneyb Aug 11, 2025
ad8aa7f
clk: at91: plldiv: convert from round_rate() to determine_rate()
masneyb Aug 11, 2025
9c92524
clk: at91: sam9x60-pll: convert from round_rate() to determine_rate()
masneyb Aug 11, 2025
37e5352
clk: at91: usb: convert from round_rate() to determine_rate()
masneyb Aug 11, 2025
3903391
clk: baikal-t1: ccu-div: convert from round_rate() to determine_rate()
masneyb Aug 11, 2025
d9f3fa4
clk: baikal-t1: ccu-pll: convert from round_rate() to determine_rate()
masneyb Aug 11, 2025
24fe10e
clk: cdce925: convert from round_rate() to determine_rate()
masneyb Aug 11, 2025
c73615e
clk: cs2000-cp: convert from round_rate() to determine_rate()
masneyb Aug 11, 2025
49571e9
clk: ep93xx: convert from round_rate() to determine_rate()
masneyb Aug 11, 2025
edefc04
clk: fractional-divider: convert from round_rate() to determine_rate()
masneyb Aug 11, 2025
a8a620b
clk: gemini: convert from round_rate() to determine_rate()
masneyb Aug 11, 2025
21067a8
clk: highbank: convert from round_rate() to determine_rate()
masneyb Aug 11, 2025
9b2ba28
clk: hisilicon: clkdivider-hi6220: convert from round_rate() to deter…
masneyb Aug 11, 2025
9edb781
clk: hisilicon: hi3660-stub: move comma from declaration of DEFINE_CL…
masneyb Aug 11, 2025
449f378
clk: hisilicon: hi3660-stub: convert from round_rate() to determine_r…
masneyb Aug 11, 2025
1f52090
clk: hisilicon: hi6220-stub: convert from round_rate() to determine_r…
masneyb Aug 11, 2025
b7c4cc9
clk: ingenic: cgu: convert from round_rate() to determine_rate()
masneyb Aug 11, 2025
48a5324
clk: ingenic: jz4780-cgu: convert from round_rate() to determine_rate()
masneyb Aug 11, 2025
ee74000
clk: ingenic: x1000-cgu: convert from round_rate() to determine_rate()
masneyb Aug 11, 2025
8944f0d
clk: lmk04832: convert from round_rate() to determine_rate()
masneyb Aug 11, 2025
d3a00b9
clk: loongson1: convert from round_rate() to determine_rate()
masneyb Aug 11, 2025
fded50a
clk: max9485: convert from round_rate() to determine_rate()
masneyb Aug 11, 2025
2144b5a
clk: milbeaut: convert from round_rate() to determine_rate()
masneyb Aug 11, 2025
c7a938e
clk: mmp: audio: convert from round_rate() to determine_rate()
masneyb Aug 11, 2025
0de2eca
clk: mmp: frac: convert from round_rate() to determine_rate()
masneyb Aug 11, 2025
e847151
clk: multiplier: convert from round_rate() to determine_rate()
masneyb Aug 11, 2025
6bcd699
clk: mxs: div: convert from round_rate() to determine_rate()
masneyb Aug 11, 2025
c9b6c2b
clk: mxs: frac: convert from round_rate() to determine_rate()
masneyb Aug 11, 2025
4a5ea94
clk: mxs: ref: convert from round_rate() to determine_rate()
masneyb Aug 11, 2025
04c7f6f
clk: nuvoton: ma35d1-divider: convert from round_rate() to determine_…
masneyb Aug 11, 2025
41a25ba
clk: nuvoton: ma35d1-pll: convert from round_rate() to determine_rate()
masneyb Aug 11, 2025
f7ee60c
clk: nxp: lpc18xx-cgu: convert from round_rate() to determine_rate()
masneyb Aug 11, 2025
2b059c5
clk: nxp: lpc32xx: convert from round_rate() to determine_rate()
masneyb Aug 11, 2025
7963118
clk: pistachio: pll: convert from round_rate() to determine_rate()
masneyb Aug 11, 2025
7c1f394
clk: scpi: convert from round_rate() to determine_rate()
masneyb Aug 11, 2025
9f71a07
clk: si514: convert from round_rate() to determine_rate()
masneyb Aug 11, 2025
c0ef0c9
clk: si521xx: convert from round_rate() to determine_rate()
masneyb Aug 11, 2025
27e1b7d
clk: si5341: convert from round_rate() to determine_rate()
masneyb Aug 11, 2025
7a66909
clk: si544: convert from round_rate() to determine_rate()
masneyb Aug 11, 2025
e60545d
clk: si570: convert from round_rate() to determine_rate()
masneyb Aug 11, 2025
237fa83
clk: sifive: sifive-prci: convert from round_rate() to determine_rate()
masneyb Aug 11, 2025
804fead
clk: sophgo: cv18xx-ip: convert from round_rate() to determine_rate()
masneyb Aug 11, 2025
1aff6a0
clk: sophgo: sg2042-clkgen: convert from round_rate() to determine_ra…
masneyb Aug 11, 2025
4b58e64
clk: spacemit: ccu_ddn: convert from round_rate() to determine_rate()
masneyb Aug 11, 2025
41b6e00
clk: spacemit: ccu_mix: convert from round_rate() to determine_rate()
masneyb Aug 11, 2025
eaca666
clk: spacemit: ccu_pll: convert from round_rate() to determine_rate()
masneyb Aug 11, 2025
69059ee
clk: sparx5: convert from round_rate() to determine_rate()
masneyb Aug 11, 2025
c69dca6
clk: sprd: div: convert from round_rate() to determine_rate()
masneyb Aug 11, 2025
dfcaf20
clk: sprd: pll: convert from round_rate() to determine_rate()
masneyb Aug 11, 2025
4f672b7
clk: st: clkgen-fsyn: convert from round_rate() to determine_rate()
masneyb Aug 11, 2025
17f68eb
clk: st: clkgen-pll: convert from round_rate() to determine_rate()
masneyb Aug 11, 2025
c3579a9
clk: stm32f4: convert from round_rate() to determine_rate()
masneyb Aug 11, 2025
14aac9f
clk: stm32: stm32-core: convert from round_rate() to determine_rate()
masneyb Aug 11, 2025
205307f
clk: stm32: stm32mp1: convert from round_rate() to determine_rate()
masneyb Aug 11, 2025
7f2cdc0
clk: tps68470: convert from round_rate() to determine_rate()
masneyb Aug 11, 2025
153b5dc
clk: versaclock3: convert from round_rate() to determine_rate()
masneyb Aug 11, 2025
fd27fa2
clk: vt8500: convert from round_rate() to determine_rate()
masneyb Aug 11, 2025
fd6bd6c
clk: wm831x: convert from round_rate() to determine_rate()
masneyb Aug 11, 2025
47e61b2
clk: x86: cgu: convert from round_rate() to determine_rate()
masneyb Aug 11, 2025
070506c
clk: xgene: convert from round_rate() to determine_rate()
masneyb Aug 11, 2025
c94b3eb
clk: xilinx: xlnx-clock-wizard: convert from round_rate() to determin…
masneyb Aug 11, 2025
70c30f6
clk: xilinx: xlnx_vcu: convert from round_rate() to determine_rate()
masneyb Aug 11, 2025
c91f521
clk: zynqmp: divider: convert from round_rate() to determine_rate()
masneyb Aug 11, 2025
43f872a
clk: zynqmp: pll: convert from round_rate() to determine_rate()
masneyb Aug 11, 2025
af495bb
clk: zynq: pll: convert from round_rate() to determine_rate()
masneyb Aug 11, 2025
a3e32e8
clk: actions: owl-composite: convert from round_rate() to determine_r…
masneyb Aug 11, 2025
19bd4fb
clk: actions: owl-divider: convert from round_rate() to determine_rate()
masneyb Aug 11, 2025
5a50e46
clk: actions: owl-factor: convert from round_rate() to determine_rate()
masneyb Aug 11, 2025
abe362c
clk: actions: owl-pll: convert from round_rate() to determine_rate()
masneyb Aug 11, 2025
37b3766
clk: apple-nco: convert from round_rate() to determine_rate()
masneyb Aug 11, 2025
d213320
clk: axs10x: i2s_pll_clock: convert from round_rate() to determine_ra…
masneyb Aug 11, 2025
ade0967
clk: axs10x: pll_clock: convert from round_rate() to determine_rate()
masneyb Aug 11, 2025
fcae598
clk: bcm: iproc-asiu: convert from round_rate() to determine_rate()
masneyb Aug 11, 2025
9ce7b7c
clk: bm1880: convert from round_rate() to determine_rate()
masneyb Aug 11, 2025
536c4ce
clk: cdce706: convert from round_rate() to determine_rate()
masneyb Aug 11, 2025
3677e6c
clk: hsdk-pll: convert from round_rate() to determine_rate()
masneyb Aug 11, 2025
a1b4563
clk: mediatek: pll: convert from round_rate() to determine_rate()
masneyb Aug 11, 2025
aff1569
clk: microchip: core: convert from round_rate() to determine_rate()
masneyb Aug 11, 2025
bdd4e8e
clk: mstar: msc313-cpupll: convert from round_rate() to determine_rate()
masneyb Aug 11, 2025
32cceaa
clk: mvebu: ap-cpu-clk: convert from round_rate() to determine_rate()
masneyb Aug 11, 2025
d799cb8
clk: mvebu: armada-37xx-periph: convert from round_rate() to determin…
masneyb Aug 11, 2025
eefc633
clk: mvebu: corediv: convert from round_rate() to determine_rate()
masneyb Aug 11, 2025
a031d8b
clk: mvebu: cpu: convert from round_rate() to determine_rate()
masneyb Aug 11, 2025
5643afb
clk: mvebu: dove-divider: convert from round_rate() to determine_rate()
masneyb Aug 11, 2025
3287164
clk: qcom: alpha-pll: convert from round_rate() to determine_rate()
masneyb Aug 11, 2025
f15744f
clk: qcom: regmap-divider: convert from round_rate() to determine_rate()
masneyb Aug 11, 2025
2568835
clk: renesas: rzg2l-cpg: convert from round_rate() to determine_rate()
masneyb Aug 11, 2025
d784119
clk: renesas: rzv2h-cpg: remove round_rate() in favor of determine_ra…
masneyb Aug 11, 2025
97c6a63
clk: rockchip: ddr: convert from round_rate() to determine_rate()
masneyb Aug 11, 2025
3b2d1cd
clk: rockchip: half-divider: convert from round_rate() to determine_r…
masneyb Aug 11, 2025
e24e955
clk: rockchip: pll: convert from round_rate() to determine_rate()
masneyb Aug 11, 2025
365b33a
clk: rp1: convert from round_rate() to determine_rate()
masneyb Aug 11, 2025
8304c7d
clk: samsung: cpu: convert from round_rate() to determine_rate()
masneyb Aug 11, 2025
81fc305
clk: samsung: pll: convert from round_rate() to determine_rate()
masneyb Aug 11, 2025
ecc3105
clk: sp7021: convert from round_rate() to determine_rate()
masneyb Aug 11, 2025
9dba93a
clk: spear: aux-synth: convert from round_rate() to determine_rate()
masneyb Aug 11, 2025
7c4e875
clk: spear: frac-synth: convert from round_rate() to determine_rate()
masneyb Aug 11, 2025
b7af5f5
clk: spear: gpt-synth: convert from round_rate() to determine_rate()
masneyb Aug 11, 2025
7d4b44c
clk: spear: vco-pll: convert from round_rate() to determine_rate()
masneyb Aug 11, 2025
00e0b56
clk: ux500: prcmu: convert from round_rate() to determine_rate()
masneyb Aug 11, 2025
230fa0d
clk: versaclock5: convert from round_rate() to determine_rate()
masneyb Aug 11, 2025
405bb7a
clk: versaclock7: convert from round_rate() to determine_rate()
masneyb Aug 11, 2025
cb88df8
clk: versatile: icst: convert from round_rate() to determine_rate()
masneyb Aug 11, 2025
da07992
clk: versatile: vexpress-osc: convert from round_rate() to determine_…
masneyb Aug 11, 2025
e0d47e4
clk: visconti: pll: convert from round_rate() to determine_rate()
masneyb Aug 11, 2025
d8a80ce
clk: divider: remove round_rate() in favor of determine_rate()
masneyb Aug 11, 2025
8679301
clk: scmi: remove round_rate() in favor of determine_rate()
masneyb Aug 11, 2025
e6e0bc6
clk: sophgo: sg2042-pll: remove round_rate() in favor of determine_ra…
masneyb Aug 11, 2025
eecd001
clk: fixed-factor: drop round_rate() clk ops
masneyb Aug 11, 2025
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8 changes: 4 additions & 4 deletions drivers/clk/actions/owl-composite.c
Original file line number Diff line number Diff line change
Expand Up @@ -122,13 +122,13 @@ static int owl_comp_fact_set_rate(struct clk_hw *hw, unsigned long rate,
rate, parent_rate);
}

static long owl_comp_fix_fact_round_rate(struct clk_hw *hw, unsigned long rate,
unsigned long *parent_rate)
static int owl_comp_fix_fact_determine_rate(struct clk_hw *hw,
struct clk_rate_request *req)
{
struct owl_composite *comp = hw_to_owl_comp(hw);
struct clk_fixed_factor *fix_fact_hw = &comp->rate.fix_fact_hw;

return comp->fix_fact_ops->round_rate(&fix_fact_hw->hw, rate, parent_rate);
return comp->fix_fact_ops->determine_rate(&fix_fact_hw->hw, req);
}

static unsigned long owl_comp_fix_fact_recalc_rate(struct clk_hw *hw,
Expand Down Expand Up @@ -193,7 +193,7 @@ const struct clk_ops owl_comp_fix_fact_ops = {
.is_enabled = owl_comp_is_enabled,

/* fix_fact_ops */
.round_rate = owl_comp_fix_fact_round_rate,
.determine_rate = owl_comp_fix_fact_determine_rate,
.recalc_rate = owl_comp_fix_fact_recalc_rate,
.set_rate = owl_comp_fix_fact_set_rate,
};
Expand Down
13 changes: 8 additions & 5 deletions drivers/clk/actions/owl-divider.c
Original file line number Diff line number Diff line change
Expand Up @@ -23,13 +23,16 @@ long owl_divider_helper_round_rate(struct owl_clk_common *common,
div_hw->div_flags);
}

static long owl_divider_round_rate(struct clk_hw *hw, unsigned long rate,
unsigned long *parent_rate)
static int owl_divider_determine_rate(struct clk_hw *hw,
struct clk_rate_request *req)
{
struct owl_divider *div = hw_to_owl_divider(hw);

return owl_divider_helper_round_rate(&div->common, &div->div_hw,
rate, parent_rate);
req->rate = owl_divider_helper_round_rate(&div->common, &div->div_hw,
req->rate,
&req->best_parent_rate);

return 0;
}

unsigned long owl_divider_helper_recalc_rate(struct owl_clk_common *common,
Expand Down Expand Up @@ -89,6 +92,6 @@ static int owl_divider_set_rate(struct clk_hw *hw, unsigned long rate,

const struct clk_ops owl_divider_ops = {
.recalc_rate = owl_divider_recalc_rate,
.round_rate = owl_divider_round_rate,
.determine_rate = owl_divider_determine_rate,
.set_rate = owl_divider_set_rate,
};
12 changes: 7 additions & 5 deletions drivers/clk/actions/owl-factor.c
Original file line number Diff line number Diff line change
Expand Up @@ -130,14 +130,16 @@ long owl_factor_helper_round_rate(struct owl_clk_common *common,
return *parent_rate * mul / div;
}

static long owl_factor_round_rate(struct clk_hw *hw, unsigned long rate,
unsigned long *parent_rate)
static int owl_factor_determine_rate(struct clk_hw *hw,
struct clk_rate_request *req)
{
struct owl_factor *factor = hw_to_owl_factor(hw);
struct owl_factor_hw *factor_hw = &factor->factor_hw;

return owl_factor_helper_round_rate(&factor->common, factor_hw,
rate, parent_rate);
req->rate = owl_factor_helper_round_rate(&factor->common, factor_hw,
req->rate, &req->best_parent_rate);

return 0;
}

unsigned long owl_factor_helper_recalc_rate(struct owl_clk_common *common,
Expand Down Expand Up @@ -214,7 +216,7 @@ static int owl_factor_set_rate(struct clk_hw *hw, unsigned long rate,
}

const struct clk_ops owl_factor_ops = {
.round_rate = owl_factor_round_rate,
.determine_rate = owl_factor_determine_rate,
.recalc_rate = owl_factor_recalc_rate,
.set_rate = owl_factor_set_rate,
};
25 changes: 16 additions & 9 deletions drivers/clk/actions/owl-pll.c
Original file line number Diff line number Diff line change
Expand Up @@ -56,26 +56,33 @@ static const struct clk_pll_table *_get_pll_table(
return table;
}

static long owl_pll_round_rate(struct clk_hw *hw, unsigned long rate,
unsigned long *parent_rate)
static int owl_pll_determine_rate(struct clk_hw *hw,
struct clk_rate_request *req)
{
struct owl_pll *pll = hw_to_owl_pll(hw);
struct owl_pll_hw *pll_hw = &pll->pll_hw;
const struct clk_pll_table *clkt;
u32 mul;

if (pll_hw->table) {
clkt = _get_pll_table(pll_hw->table, rate);
return clkt->rate;
clkt = _get_pll_table(pll_hw->table, req->rate);
req->rate = clkt->rate;

return 0;
}

/* fixed frequency */
if (pll_hw->width == 0)
return pll_hw->bfreq;
if (pll_hw->width == 0) {
req->rate = pll_hw->bfreq;

mul = owl_pll_calculate_mul(pll_hw, rate);
return 0;
}

mul = owl_pll_calculate_mul(pll_hw, req->rate);

return pll_hw->bfreq * mul;
req->rate = pll_hw->bfreq * mul;

return 0;
}

static unsigned long owl_pll_recalc_rate(struct clk_hw *hw,
Expand Down Expand Up @@ -188,7 +195,7 @@ const struct clk_ops owl_pll_ops = {
.enable = owl_pll_enable,
.disable = owl_pll_disable,
.is_enabled = owl_pll_is_enabled,
.round_rate = owl_pll_round_rate,
.determine_rate = owl_pll_determine_rate,
.recalc_rate = owl_pll_recalc_rate,
.set_rate = owl_pll_set_rate,
};
42 changes: 23 additions & 19 deletions drivers/clk/at91/clk-audio-pll.c
Original file line number Diff line number Diff line change
Expand Up @@ -270,8 +270,8 @@ static int clk_audio_pll_frac_determine_rate(struct clk_hw *hw,
return 0;
}

static long clk_audio_pll_pad_round_rate(struct clk_hw *hw, unsigned long rate,
unsigned long *parent_rate)
static int clk_audio_pll_pad_determine_rate(struct clk_hw *hw,
struct clk_rate_request *req)
{
struct clk_hw *pclk = clk_hw_get_parent(hw);
long best_rate = -EINVAL;
Expand All @@ -283,7 +283,7 @@ static long clk_audio_pll_pad_round_rate(struct clk_hw *hw, unsigned long rate,
int best_diff = -1;

pr_debug("A PLL/PAD: %s, rate = %lu (parent_rate = %lu)\n", __func__,
rate, *parent_rate);
req->rate, req->best_parent_rate);

/*
* Rate divisor is actually made of two different divisors, multiplied
Expand All @@ -304,12 +304,12 @@ static long clk_audio_pll_pad_round_rate(struct clk_hw *hw, unsigned long rate,
continue;

best_parent_rate = clk_hw_round_rate(pclk,
rate * tmp_qd * div);
req->rate * tmp_qd * div);
tmp_rate = best_parent_rate / (div * tmp_qd);
tmp_diff = abs(rate - tmp_rate);
tmp_diff = abs(req->rate - tmp_rate);

if (best_diff < 0 || best_diff > tmp_diff) {
*parent_rate = best_parent_rate;
req->best_parent_rate = best_parent_rate;
best_rate = tmp_rate;
best_diff = tmp_diff;
}
Expand All @@ -318,11 +318,13 @@ static long clk_audio_pll_pad_round_rate(struct clk_hw *hw, unsigned long rate,
pr_debug("A PLL/PAD: %s, best_rate = %ld, best_parent_rate = %lu\n",
__func__, best_rate, best_parent_rate);

return best_rate;
req->rate = best_rate;

return 0;
}

static long clk_audio_pll_pmc_round_rate(struct clk_hw *hw, unsigned long rate,
unsigned long *parent_rate)
static int clk_audio_pll_pmc_determine_rate(struct clk_hw *hw,
struct clk_rate_request *req)
{
struct clk_hw *pclk = clk_hw_get_parent(hw);
long best_rate = -EINVAL;
Expand All @@ -333,20 +335,20 @@ static long clk_audio_pll_pmc_round_rate(struct clk_hw *hw, unsigned long rate,
int best_diff = -1;

pr_debug("A PLL/PMC: %s, rate = %lu (parent_rate = %lu)\n", __func__,
rate, *parent_rate);
req->rate, req->best_parent_rate);

if (!rate)
if (!req->rate)
return 0;

best_parent_rate = clk_round_rate(pclk->clk, 1);
div = max(best_parent_rate / rate, 1UL);
div = max(best_parent_rate / req->rate, 1UL);
for (; div <= AUDIO_PLL_QDPMC_MAX; div++) {
best_parent_rate = clk_round_rate(pclk->clk, rate * div);
best_parent_rate = clk_round_rate(pclk->clk, req->rate * div);
tmp_rate = best_parent_rate / div;
tmp_diff = abs(rate - tmp_rate);
tmp_diff = abs(req->rate - tmp_rate);

if (best_diff < 0 || best_diff > tmp_diff) {
*parent_rate = best_parent_rate;
req->best_parent_rate = best_parent_rate;
best_rate = tmp_rate;
best_diff = tmp_diff;
tmp_qd = div;
Expand All @@ -356,9 +358,11 @@ static long clk_audio_pll_pmc_round_rate(struct clk_hw *hw, unsigned long rate,
}

pr_debug("A PLL/PMC: %s, best_rate = %ld, best_parent_rate = %lu (qd = %d)\n",
__func__, best_rate, *parent_rate, tmp_qd - 1);
__func__, best_rate, req->best_parent_rate, tmp_qd - 1);

req->rate = best_rate;

return best_rate;
return 0;
}

static int clk_audio_pll_frac_set_rate(struct clk_hw *hw, unsigned long rate,
Expand Down Expand Up @@ -436,15 +440,15 @@ static const struct clk_ops audio_pll_pad_ops = {
.enable = clk_audio_pll_pad_enable,
.disable = clk_audio_pll_pad_disable,
.recalc_rate = clk_audio_pll_pad_recalc_rate,
.round_rate = clk_audio_pll_pad_round_rate,
.determine_rate = clk_audio_pll_pad_determine_rate,
.set_rate = clk_audio_pll_pad_set_rate,
};

static const struct clk_ops audio_pll_pmc_ops = {
.enable = clk_audio_pll_pmc_enable,
.disable = clk_audio_pll_pmc_disable,
.recalc_rate = clk_audio_pll_pmc_recalc_rate,
.round_rate = clk_audio_pll_pmc_round_rate,
.determine_rate = clk_audio_pll_pmc_determine_rate,
.set_rate = clk_audio_pll_pmc_set_rate,
};

Expand Down
33 changes: 22 additions & 11 deletions drivers/clk/at91/clk-h32mx.c
Original file line number Diff line number Diff line change
Expand Up @@ -40,21 +40,32 @@ static unsigned long clk_sama5d4_h32mx_recalc_rate(struct clk_hw *hw,
return parent_rate;
}

static long clk_sama5d4_h32mx_round_rate(struct clk_hw *hw, unsigned long rate,
unsigned long *parent_rate)
static int clk_sama5d4_h32mx_determine_rate(struct clk_hw *hw,
struct clk_rate_request *req)
{
unsigned long div;

if (rate > *parent_rate)
return *parent_rate;
div = *parent_rate / 2;
if (rate < div)
return div;
if (req->rate > req->best_parent_rate) {
req->rate = req->best_parent_rate;

if (rate - div < *parent_rate - rate)
return div;
return 0;
}
div = req->best_parent_rate / 2;
if (req->rate < div) {
req->rate = div;

return 0;
}

if (req->rate - div < req->best_parent_rate - req->rate) {
req->rate = div;

return *parent_rate;
return 0;
}

req->rate = req->best_parent_rate;

return 0;
}

static int clk_sama5d4_h32mx_set_rate(struct clk_hw *hw, unsigned long rate,
Expand All @@ -77,7 +88,7 @@ static int clk_sama5d4_h32mx_set_rate(struct clk_hw *hw, unsigned long rate,

static const struct clk_ops h32mx_ops = {
.recalc_rate = clk_sama5d4_h32mx_recalc_rate,
.round_rate = clk_sama5d4_h32mx_round_rate,
.determine_rate = clk_sama5d4_h32mx_determine_rate,
.set_rate = clk_sama5d4_h32mx_set_rate,
};

Expand Down
48 changes: 29 additions & 19 deletions drivers/clk/at91/clk-peripheral.c
Original file line number Diff line number Diff line change
Expand Up @@ -279,8 +279,11 @@ static int clk_sam9x5_peripheral_determine_rate(struct clk_hw *hw,
long best_diff = LONG_MIN;
u32 shift;

if (periph->id < PERIPHERAL_ID_MIN || !periph->range.max)
return parent_rate;
if (periph->id < PERIPHERAL_ID_MIN || !periph->range.max) {
req->rate = parent_rate;

return 0;
}

/* Fist step: check the available dividers. */
for (shift = 0; shift <= PERIPHERAL_MAX_SHIFT; shift++) {
Expand Down Expand Up @@ -332,50 +335,57 @@ static int clk_sam9x5_peripheral_determine_rate(struct clk_hw *hw,
return 0;
}

static long clk_sam9x5_peripheral_round_rate(struct clk_hw *hw,
unsigned long rate,
unsigned long *parent_rate)
static int clk_sam9x5_peripheral_no_parent_determine_rate(struct clk_hw *hw,
struct clk_rate_request *req)
{
int shift = 0;
unsigned long best_rate;
unsigned long best_diff;
unsigned long cur_rate = *parent_rate;
unsigned long cur_rate = req->best_parent_rate;
unsigned long cur_diff;
struct clk_sam9x5_peripheral *periph = to_clk_sam9x5_peripheral(hw);

if (periph->id < PERIPHERAL_ID_MIN || !periph->range.max)
return *parent_rate;
if (periph->id < PERIPHERAL_ID_MIN || !periph->range.max) {
req->rate = req->best_parent_rate;

return 0;
}

if (periph->range.max) {
for (; shift <= PERIPHERAL_MAX_SHIFT; shift++) {
cur_rate = *parent_rate >> shift;
cur_rate = req->best_parent_rate >> shift;
if (cur_rate <= periph->range.max)
break;
}
}

if (rate >= cur_rate)
return cur_rate;
if (req->rate >= cur_rate) {
req->rate = cur_rate;

return 0;
}

best_diff = cur_rate - rate;
best_diff = cur_rate - req->rate;
best_rate = cur_rate;
for (; shift <= PERIPHERAL_MAX_SHIFT; shift++) {
cur_rate = *parent_rate >> shift;
if (cur_rate < rate)
cur_diff = rate - cur_rate;
cur_rate = req->best_parent_rate >> shift;
if (cur_rate < req->rate)
cur_diff = req->rate - cur_rate;
else
cur_diff = cur_rate - rate;
cur_diff = cur_rate - req->rate;

if (cur_diff < best_diff) {
best_diff = cur_diff;
best_rate = cur_rate;
}

if (!best_diff || cur_rate < rate)
if (!best_diff || cur_rate < req->rate)
break;
}

return best_rate;
req->rate = best_rate;

return 0;
}

static int clk_sam9x5_peripheral_set_rate(struct clk_hw *hw,
Expand Down Expand Up @@ -427,7 +437,7 @@ static const struct clk_ops sam9x5_peripheral_ops = {
.disable = clk_sam9x5_peripheral_disable,
.is_enabled = clk_sam9x5_peripheral_is_enabled,
.recalc_rate = clk_sam9x5_peripheral_recalc_rate,
.round_rate = clk_sam9x5_peripheral_round_rate,
.determine_rate = clk_sam9x5_peripheral_no_parent_determine_rate,
.set_rate = clk_sam9x5_peripheral_set_rate,
.save_context = clk_sam9x5_peripheral_save_context,
.restore_context = clk_sam9x5_peripheral_restore_context,
Expand Down
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