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[PW_SID:993658] RISC-V: Define pgprot_dmacoherent() for non-coherent devices #812

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[PW_SID:993658] RISC-V: Define pgprot_dmacoherent() for non-coherent devices #812

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2 changes: 2 additions & 0 deletions arch/riscv/include/asm/pgtable.h
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Original file line number Diff line number Diff line change
Expand Up @@ -653,6 +653,8 @@ static inline pgprot_t pgprot_writecombine(pgprot_t _prot)
return __pgprot(prot);
}

#define pgprot_dmacoherent pgprot_writecombine

/*
* Both Svade and Svadu control the hardware behavior when the PTE A/D bits need to be set. By
* default the M-mode firmware enables the hardware updating scheme when only Svadu is present in
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