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[PW_SID:995448] irqchip/sg2042-msi: Set irq type according to DT configuration #836

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[PW_SID:995448] irqchip/sg2042-msi: Set irq type according to DT configuration #836

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69cd2fe
irqchip/sg2042-msi: Set irq type according to DT configuration
unicornx Aug 26, 2025
f410cd0
riscv: sophgo: dts: sg2042: change msi irq type to IRQ_TYPE_EDGE_RISING
unicornx Aug 26, 2025
58380fa
riscv: sophgo: dts: sg2044: change msi irq type to IRQ_TYPE_EDGE_RISING
unicornx Aug 26, 2025
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2 changes: 1 addition & 1 deletion arch/riscv/boot/dts/sophgo/sg2042.dtsi
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Original file line number Diff line number Diff line change
Expand Up @@ -190,7 +190,7 @@
reg-names = "clr", "doorbell";
msi-controller;
#msi-cells = <0>;
msi-ranges = <&intc 64 IRQ_TYPE_LEVEL_HIGH 32>;
msi-ranges = <&intc 64 IRQ_TYPE_EDGE_RISING 32>;
};

rpgate: clock-controller@7030010368 {
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2 changes: 1 addition & 1 deletion arch/riscv/boot/dts/sophgo/sg2044.dtsi
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Expand Up @@ -214,7 +214,7 @@
reg-names = "clr", "doorbell";
#msi-cells = <0>;
msi-controller;
msi-ranges = <&intc 352 IRQ_TYPE_LEVEL_HIGH 512>;
msi-ranges = <&intc 352 IRQ_TYPE_EDGE_RISING 512>;
status = "disabled";
};

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7 changes: 5 additions & 2 deletions drivers/irqchip/irq-sg2042-msi.c
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Expand Up @@ -30,6 +30,7 @@ struct sg204x_msi_chip_info {
* @doorbell_addr: see TRM, 10.1.32, GP_INTR0_SET
* @irq_first: First vectors number that MSIs starts
* @num_irqs: Number of vectors for MSIs
* @irq_type: IRQ type for MSIs
* @msi_map: mapping for allocated MSI vectors.
* @msi_map_lock: Lock for msi_map
* @chip_info: chip specific infomations
Expand All @@ -41,6 +42,7 @@ struct sg204x_msi_chipdata {

u32 irq_first;
u32 num_irqs;
unsigned int irq_type;

unsigned long *msi_map;
struct mutex msi_map_lock;
Expand Down Expand Up @@ -133,14 +135,14 @@ static int sg204x_msi_parent_domain_alloc(struct irq_domain *domain, unsigned in
fwspec.fwnode = domain->parent->fwnode;
fwspec.param_count = 2;
fwspec.param[0] = data->irq_first + hwirq;
fwspec.param[1] = IRQ_TYPE_EDGE_RISING;
fwspec.param[1] = data->irq_type;

ret = irq_domain_alloc_irqs_parent(domain, virq, 1, &fwspec);
if (ret)
return ret;

d = irq_domain_get_irq_data(domain->parent, virq);
return d->chip->irq_set_type(d, IRQ_TYPE_EDGE_RISING);
return d->chip->irq_set_type(d, data->irq_type);
}

static int sg204x_msi_middle_domain_alloc(struct irq_domain *domain, unsigned int virq,
Expand Down Expand Up @@ -289,6 +291,7 @@ static int sg2042_msi_probe(struct platform_device *pdev)
}

data->irq_first = (u32)args.args[0];
data->irq_type = (unsigned int)args.args[1];
data->num_irqs = (u32)args.args[args.nargs - 1];

mutex_init(&data->msi_map_lock);
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