[PW_SID:995713] riscv: Add Zalasr ISA exntesion support by linux-riscv-bot · Pull Request #839 · linux-riscv/linux

linux-riscv-bot · 2025-08-26T15:20:29Z

PR for series 995713 applied to workflow__riscv__fixes

Name: riscv: Add Zalasr ISA exntesion support
URL: https://patchwork.kernel.org/project/linux-riscv/list/?series=995713
Version: 1

Add parsing for Zalasr ISA extension. Signed-off-by: Xu Lu <luxu.kernel@bytedance.com> Signed-off-by: Linux RISC-V bot <linux.riscv.bot@gmail.com>

Add description for the Zalasr ISA extension Signed-off-by: Xu Lu <luxu.kernel@bytedance.com> Signed-off-by: Linux RISC-V bot <linux.riscv.bot@gmail.com>

Introduce l{b|h|w|d}.{aq|aqrl} and s{b|h|w|d}.{rl|aqrl} instruction encodings. Signed-off-by: Xu Lu <luxu.kernel@bytedance.com> Signed-off-by: Linux RISC-V bot <linux.riscv.bot@gmail.com>

Replace fence instructions with Zalasr instructions during acquire or release operations. Signed-off-by: Xu Lu <luxu.kernel@bytedance.com> Signed-off-by: Linux RISC-V bot <linux.riscv.bot@gmail.com>

linux-riscv-bot · 2025-08-26T15:26:01Z

Patch 1: "[RFC,1/4] riscv: add ISA extension parsing for Zalasr"
build-rv32-defconfig
Desc: Builds riscv32 defconfig
Duration: 106.57 seconds
Result: PASS

linux-riscv-bot · 2025-08-26T15:54:32Z

Patch 1: "[RFC,1/4] riscv: add ISA extension parsing for Zalasr"
build-rv64-clang-allmodconfig
Desc: Builds riscv64 allmodconfig with Clang, and checks for errors and added warnings
Duration: 1709.39 seconds
Result: PASS

linux-riscv-bot · 2025-08-26T16:30:27Z

Patch 1: "[RFC,1/4] riscv: add ISA extension parsing for Zalasr"
build-rv64-gcc-allmodconfig
Desc: Builds riscv64 allmodconfig with GCC, and checks for errors and added warnings
Duration: 2152.67 seconds
Result: PASS

linux-riscv-bot · 2025-08-26T16:30:49Z

Patch 1: "[RFC,1/4] riscv: add ISA extension parsing for Zalasr"
build-rv64-nommu-k210-defconfig
Desc: Builds riscv64 defconfig with NOMMU for K210
Duration: 20.93 seconds
Result: PASS

linux-riscv-bot · 2025-08-26T16:31:13Z

Patch 1: "[RFC,1/4] riscv: add ISA extension parsing for Zalasr"
build-rv64-nommu-k210-virt
Desc: Builds riscv64 defconfig with NOMMU for the virt platform
Duration: 22.31 seconds
Result: PASS

linux-riscv-bot · 2025-08-26T16:31:16Z

Patch 1: "[RFC,1/4] riscv: add ISA extension parsing for Zalasr"
checkpatch
Desc: Runs checkpatch.pl on the patch
Duration: 0.92 seconds
Result: PASS

linux-riscv-bot · 2025-08-26T16:32:32Z

Patch 1: "[RFC,1/4] riscv: add ISA extension parsing for Zalasr"
dtb-warn-rv64
Desc: Checks for Device Tree warnings/errors
Duration: 74.98 seconds
Result: PASS

linux-riscv-bot · 2025-08-26T16:32:34Z

Patch 1: "[RFC,1/4] riscv: add ISA extension parsing for Zalasr"
header-inline
Desc: Detects static functions without inline keyword in header files
Duration: 0.23 seconds
Result: PASS

linux-riscv-bot · 2025-08-26T16:32:37Z

Patch 1: "[RFC,1/4] riscv: add ISA extension parsing for Zalasr"
kdoc
Desc: Detects for kdoc errors
Duration: 0.86 seconds
Result: PASS

linux-riscv-bot · 2025-08-26T16:32:38Z

Patch 1: "[RFC,1/4] riscv: add ISA extension parsing for Zalasr"
module-param
Desc: Detect module_param changes
Duration: 0.25 seconds
Result: PASS

linux-riscv-bot · 2025-08-26T16:32:40Z

Patch 1: "[RFC,1/4] riscv: add ISA extension parsing for Zalasr"
verify-fixes
Desc: Verifies that the Fixes: tags exist
Duration: 0.22 seconds
Result: PASS

linux-riscv-bot · 2025-08-26T16:32:42Z

Patch 1: "[RFC,1/4] riscv: add ISA extension parsing for Zalasr"
verify-signedoff
Desc: Verifies that Signed-off-by: tags are correct
Duration: 0.29 seconds
Result: PASS

linux-riscv-bot · 2025-08-26T16:34:41Z

Patch 2: "[RFC,2/4] dt-bindings: riscv: Add Zalasr ISA extension description"
build-rv32-defconfig
Desc: Builds riscv32 defconfig
Duration: 103.52 seconds
Result: PASS

linux-riscv-bot · 2025-08-26T16:51:47Z

Patch 2: "[RFC,2/4] dt-bindings: riscv: Add Zalasr ISA extension description"
build-rv64-clang-allmodconfig
Desc: Builds riscv64 allmodconfig with Clang, and checks for errors and added warnings
Duration: 1024.61 seconds
Result: PASS

linux-riscv-bot · 2025-08-26T17:13:54Z

Patch 2: "[RFC,2/4] dt-bindings: riscv: Add Zalasr ISA extension description"
build-rv64-gcc-allmodconfig
Desc: Builds riscv64 allmodconfig with GCC, and checks for errors and added warnings
Duration: 1325.69 seconds
Result: PASS

linux-riscv-bot · 2025-08-26T17:14:16Z

Patch 2: "[RFC,2/4] dt-bindings: riscv: Add Zalasr ISA extension description"
build-rv64-nommu-k210-defconfig
Desc: Builds riscv64 defconfig with NOMMU for K210
Duration: 20.51 seconds
Result: PASS

linux-riscv-bot · 2025-08-26T17:14:42Z

Patch 2: "[RFC,2/4] dt-bindings: riscv: Add Zalasr ISA extension description"
build-rv64-nommu-k210-virt
Desc: Builds riscv64 defconfig with NOMMU for the virt platform
Duration: 24.34 seconds
Result: PASS

linux-riscv-bot · 2025-08-26T17:14:44Z

Patch 2: "[RFC,2/4] dt-bindings: riscv: Add Zalasr ISA extension description"
checkpatch
Desc: Runs checkpatch.pl on the patch
Duration: 0.63 seconds
Result: PASS

linux-riscv-bot · 2025-08-26T17:16:01Z

Patch 2: "[RFC,2/4] dt-bindings: riscv: Add Zalasr ISA extension description"
dtb-warn-rv64
Desc: Checks for Device Tree warnings/errors
Duration: 74.84 seconds
Result: PASS

linux-riscv-bot · 2025-08-26T17:16:02Z

Patch 2: "[RFC,2/4] dt-bindings: riscv: Add Zalasr ISA extension description"
header-inline
Desc: Detects static functions without inline keyword in header files
Duration: 0.22 seconds
Result: PASS

linux-riscv-bot · 2025-08-26T17:16:05Z

Patch 2: "[RFC,2/4] dt-bindings: riscv: Add Zalasr ISA extension description"
kdoc
Desc: Detects for kdoc errors
Duration: 0.87 seconds
Result: PASS

linux-riscv-bot · 2025-08-26T17:16:07Z

Patch 2: "[RFC,2/4] dt-bindings: riscv: Add Zalasr ISA extension description"
module-param
Desc: Detect module_param changes
Duration: 0.45 seconds
Result: PASS

linux-riscv-bot · 2025-08-26T17:16:09Z

Patch 2: "[RFC,2/4] dt-bindings: riscv: Add Zalasr ISA extension description"
verify-fixes
Desc: Verifies that the Fixes: tags exist
Duration: 0.21 seconds
Result: PASS

linux-riscv-bot · 2025-08-26T17:16:11Z

Patch 2: "[RFC,2/4] dt-bindings: riscv: Add Zalasr ISA extension description"
verify-signedoff
Desc: Verifies that Signed-off-by: tags are correct
Duration: 0.29 seconds
Result: PASS

linux-riscv-bot · 2025-08-26T17:18:09Z

Patch 3: "[RFC,3/4] riscv: Instroduce Zalasr instructions"
build-rv32-defconfig
Desc: Builds riscv32 defconfig
Duration: 103.31 seconds
Result: PASS

linux-riscv-bot · 2025-08-26T17:47:00Z

Patch 3: "[RFC,3/4] riscv: Instroduce Zalasr instructions"
build-rv64-clang-allmodconfig
Desc: Builds riscv64 allmodconfig with Clang, and checks for errors and added warnings
Duration: 1730.10 seconds
Result: PASS

linux-riscv-bot · 2025-08-26T18:22:50Z

Patch 3: "[RFC,3/4] riscv: Instroduce Zalasr instructions"
build-rv64-gcc-allmodconfig
Desc: Builds riscv64 allmodconfig with GCC, and checks for errors and added warnings
Duration: 2147.65 seconds
Result: PASS

linux-riscv-bot · 2025-08-26T18:23:12Z

Patch 3: "[RFC,3/4] riscv: Instroduce Zalasr instructions"
build-rv64-nommu-k210-defconfig
Desc: Builds riscv64 defconfig with NOMMU for K210
Duration: 21.22 seconds
Result: PASS

linux-riscv-bot · 2025-08-26T18:23:36Z

Patch 3: "[RFC,3/4] riscv: Instroduce Zalasr instructions"
build-rv64-nommu-k210-virt
Desc: Builds riscv64 defconfig with NOMMU for the virt platform
Duration: 22.54 seconds
Result: PASS

linux-riscv-bot · 2025-08-26T18:23:40Z

Patch 3: "[RFC,3/4] riscv: Instroduce Zalasr instructions"
checkpatch
Desc: Runs checkpatch.pl on the patch
Duration: 1.85 seconds
Result: WARNING
Output:

WARNING: Argument 'dest' is not used in function-like macro
#96: FILE: arch/riscv/include/asm/insn-def.h:277:
+#define LD_AQ(dest, addr)					\
+	__ASM_STR(.error "ld.aq requires 64-bit support")

WARNING: Argument 'addr' is not used in function-like macro
#96: FILE: arch/riscv/include/asm/insn-def.h:277:
+#define LD_AQ(dest, addr)					\
+	__ASM_STR(.error "ld.aq requires 64-bit support")

WARNING: Argument 'dest' is not used in function-like macro
#99: FILE: arch/riscv/include/asm/insn-def.h:280:
+#define LD_AQRL(dest, addr)					\
+	__ASM_STR(.error "ld.aqrl requires 64-bit support")

WARNING: Argument 'addr' is not used in function-like macro
#99: FILE: arch/riscv/include/asm/insn-def.h:280:
+#define LD_AQRL(dest, addr)					\
+	__ASM_STR(.error "ld.aqrl requires 64-bit support")

WARNING: Argument 'dest' is not used in function-like macro
#102: FILE: arch/riscv/include/asm/insn-def.h:283:
+#define SD_RL(dest, addr)					\
+	__ASM_STR(.error "sd.rl requires 64-bit support")

WARNING: Argument 'addr' is not used in function-like macro
#102: FILE: arch/riscv/include/asm/insn-def.h:283:
+#define SD_RL(dest, addr)					\
+	__ASM_STR(.error "sd.rl requires 64-bit support")

WARNING: Argument 'dest' is not used in function-like macro
#105: FILE: arch/riscv/include/asm/insn-def.h:286:
+#define SD_AQRL(dest, addr)					\
+	__ASM_STR(.error "sd.aqrl requires 64-bit support")

WARNING: Argument 'addr' is not used in function-like macro
#105: FILE: arch/riscv/include/asm/insn-def.h:286:
+#define SD_AQRL(dest, addr)					\
+	__ASM_STR(.error "sd.aqrl requires 64-bit support")

total: 0 errors, 8 warnings, 0 checks, 91 lines checked

NOTE: For some of the reported defects, checkpatch may be able to
      mechanically convert to the typical style using --fix or --fix-inplace.

Commit 7c11673eddbb ("riscv: Instroduce Zalasr instructions") has style problems, please review.

NOTE: Ignored message types: ALLOC_SIZEOF_STRUCT CAMELCASE COMMIT_LOG_LONG_LINE GIT_COMMIT_ID MACRO_ARG_REUSE NO_AUTHOR_SIGN_OFF

NOTE: If any of the errors are false positives, please report
      them to the maintainer, see CHECKPATCH in MAINTAINERS.
total: 0 errors, 8 warnings, 0 checks, 91 lines checked
WARNING: Argument 'addr' is not used in function-like macro
WARNING: Argument 'dest' is not used in function-like macro

linux-riscv-bot · 2025-08-26T18:24:56Z

Patch 3: "[RFC,3/4] riscv: Instroduce Zalasr instructions"
dtb-warn-rv64
Desc: Checks for Device Tree warnings/errors
Duration: 75.06 seconds
Result: PASS

linux-riscv-bot · 2025-08-26T18:24:58Z

Patch 3: "[RFC,3/4] riscv: Instroduce Zalasr instructions"
header-inline
Desc: Detects static functions without inline keyword in header files
Duration: 0.24 seconds
Result: PASS

linux-riscv-bot · 2025-08-26T18:25:01Z

Patch 3: "[RFC,3/4] riscv: Instroduce Zalasr instructions"
kdoc
Desc: Detects for kdoc errors
Duration: 0.83 seconds
Result: PASS

linux-riscv-bot · 2025-08-26T18:25:02Z

Patch 3: "[RFC,3/4] riscv: Instroduce Zalasr instructions"
module-param
Desc: Detect module_param changes
Duration: 0.25 seconds
Result: PASS

linux-riscv-bot · 2025-08-26T18:25:04Z

Patch 3: "[RFC,3/4] riscv: Instroduce Zalasr instructions"
verify-fixes
Desc: Verifies that the Fixes: tags exist
Duration: 0.22 seconds
Result: PASS

linux-riscv-bot · 2025-08-26T18:25:06Z

Patch 3: "[RFC,3/4] riscv: Instroduce Zalasr instructions"
verify-signedoff
Desc: Verifies that Signed-off-by: tags are correct
Duration: 0.30 seconds
Result: PASS

linux-riscv-bot · 2025-08-26T18:27:06Z

Patch 4: "[RFC,4/4] riscv: Use Zalasr for smp_load_acquire/smp_store_release"
build-rv32-defconfig
Desc: Builds riscv32 defconfig
Duration: 105.24 seconds
Result: PASS

linux-riscv-bot · 2025-08-26T19:04:13Z

Patch 4: "[RFC,4/4] riscv: Use Zalasr for smp_load_acquire/smp_store_release"
build-rv64-clang-allmodconfig
Desc: Builds riscv64 allmodconfig with Clang, and checks for errors and added warnings
Duration: 2225.50 seconds
Result: PASS

linux-riscv-bot · 2025-08-26T19:52:34Z

Patch 4: "[RFC,4/4] riscv: Use Zalasr for smp_load_acquire/smp_store_release"
build-rv64-gcc-allmodconfig
Desc: Builds riscv64 allmodconfig with GCC, and checks for errors and added warnings
Duration: 2899.59 seconds
Result: PASS

linux-riscv-bot · 2025-08-26T19:52:57Z

Patch 4: "[RFC,4/4] riscv: Use Zalasr for smp_load_acquire/smp_store_release"
build-rv64-nommu-k210-defconfig
Desc: Builds riscv64 defconfig with NOMMU for K210
Duration: 21.46 seconds
Result: PASS

linux-riscv-bot · 2025-08-26T19:53:21Z

Patch 4: "[RFC,4/4] riscv: Use Zalasr for smp_load_acquire/smp_store_release"
build-rv64-nommu-k210-virt
Desc: Builds riscv64 defconfig with NOMMU for the virt platform
Duration: 22.41 seconds
Result: PASS

linux-riscv-bot · 2025-08-26T19:53:24Z

Patch 4: "[RFC,4/4] riscv: Use Zalasr for smp_load_acquire/smp_store_release"
checkpatch
Desc: Runs checkpatch.pl on the patch
Duration: 1.72 seconds
Result: WARNING
Output:

CHECK: extern prototypes should be avoided in .h files
#28: FILE: arch/riscv/include/asm/barrier.h:54:
+extern void __bad_size_call_parameter(void);

CHECK: Macro argument 'p' may be better as '(p)' to avoid precedence issues
#30: FILE: arch/riscv/include/asm/barrier.h:56:
+#define __smp_store_release(p, v)						\
+do {										\
+	compiletime_assert_atomic_type(*p);					\
+	switch (sizeof(*p)) {							\
+	case 1:									\
+		asm volatile(ALTERNATIVE("fence rw, w;\t\nsb %0, 0(%1)\t\n",	\
+					 SB_RL(%0, %1) "\t\nnop\t\n",		\
+					 0, RISCV_ISA_EXT_ZALASR, 1)		\
+					 : : "r" (v), "r" (p) : "memory");	\
+		break;								\
+	case 2:									\
+		asm volatile(ALTERNATIVE("fence rw, w;\t\nsh %0, 0(%1)\t\n",	\
+					 SH_RL(%0, %1) "\t\nnop\t\n",		\
+					 0, RISCV_ISA_EXT_ZALASR, 1)		\
+					 : : "r" (v), "r" (p) : "memory");	\
+		break;								\
+	case 4:									\
+		asm volatile(ALTERNATIVE("fence rw, w;\t\nsw %0, 0(%1)\t\n",	\
+					 SW_RL(%0, %1) "\t\nnop\t\n",		\
+					 0, RISCV_ISA_EXT_ZALASR, 1)		\
+					 : : "r" (v), "r" (p) : "memory");	\
+		break;								\
+	case 8:									\
+		asm volatile(ALTERNATIVE("fence rw, w;\t\nsd %0, 0(%1)\t\n",	\
+					 SD_RL(%0, %1) "\t\nnop\t\n",		\
+					 0, RISCV_ISA_EXT_ZALASR, 1)		\
+					 : : "r" (v), "r" (p) : "memory");	\
+		break;								\
+	default:								\
+		__bad_size_call_parameter();					\
+		break;								\
+	}									\
 } while (0)

CHECK: spaces preferred around that '%' (ctx:BxV)
#36: FILE: arch/riscv/include/asm/barrier.h:62:
+					 SB_RL(%0, %1) "\t\nnop\t\n",		\
 					       ^

CHECK: spaces preferred around that '%' (ctx:WxV)
#36: FILE: arch/riscv/include/asm/barrier.h:62:
+					 SB_RL(%0, %1) "\t\nnop\t\n",		\
 					           ^

CHECK: spaces preferred around that '%' (ctx:BxV)
#42: FILE: arch/riscv/include/asm/barrier.h:68:
+					 SH_RL(%0, %1) "\t\nnop\t\n",		\
 					       ^

CHECK: spaces preferred around that '%' (ctx:WxV)
#42: FILE: arch/riscv/include/asm/barrier.h:68:
+					 SH_RL(%0, %1) "\t\nnop\t\n",		\
 					           ^

CHECK: spaces preferred around that '%' (ctx:BxV)
#48: FILE: arch/riscv/include/asm/barrier.h:74:
+					 SW_RL(%0, %1) "\t\nnop\t\n",		\
 					       ^

CHECK: spaces preferred around that '%' (ctx:WxV)
#48: FILE: arch/riscv/include/asm/barrier.h:74:
+					 SW_RL(%0, %1) "\t\nnop\t\n",		\
 					           ^

CHECK: spaces preferred around that '%' (ctx:BxV)
#54: FILE: arch/riscv/include/asm/barrier.h:80:
+					 SD_RL(%0, %1) "\t\nnop\t\n",		\
 					       ^

CHECK: spaces preferred around that '%' (ctx:WxV)
#54: FILE: arch/riscv/include/asm/barrier.h:80:
+					 SD_RL(%0, %1) "\t\nnop\t\n",		\
 					           ^

CHECK: Macro argument 'p' may be better as '(p)' to avoid precedence issues
#70: FILE: arch/riscv/include/asm/barrier.h:90:
+#define __smp_load_acquire(p)							\
+({										\
+	TYPEOF_UNQUAL(*p) val;							\
+	compiletime_assert_atomic_type(*p);					\
+	switch (sizeof(*p)) {							\
+	case 1:									\
+		asm volatile(ALTERNATIVE("lb %0, 0(%1)\t\nfence r, rw\t\n",	\
+					 LB_AQ(%0, %1) "\t\nnop\t\n",		\
+					 0, RISCV_ISA_EXT_ZALASR, 1)		\
+					 : "=r" (val) : "r" (p) : "memory");	\
+		break;								\
+	case 2:									\
+		asm volatile(ALTERNATIVE("lh %0, 0(%1)\t\nfence r, rw\t\n",	\
+					 LH_AQ(%0, %1) "\t\nnop\t\n",		\
+					 0, RISCV_ISA_EXT_ZALASR, 1)		\
+					 : "=r" (val) : "r" (p) : "memory");	\
+		break;								\
+	case 4:									\
+		asm volatile(ALTERNATIVE("lw %0, 0(%1)\t\nfence r, rw\t\n",	\
+					 LW_AQ(%0, %1) "\t\nnop\t\n",		\
+					 0, RISCV_ISA_EXT_ZALASR, 1)		\
+					 : "=r" (val) : "r" (p) : "memory");	\
+		break;								\
+	case 8:									\
+		asm volatile(ALTERNATIVE("ld %0, 0(%1)\t\nfence r, rw\t\n",	\
+					 LD_AQ(%0, %1) "\t\nnop\t\n",		\
+					 0, RISCV_ISA_EXT_ZALASR, 1)		\
+					 : "=r" (val) : "r" (p) : "memory");	\
+		break;								\
+	default:								\
+		__bad_size_call_parameter();					\
+		break;								\
+	}									\
+	val;									\
 })

CHECK: spaces preferred around that '%' (ctx:BxV)
#77: FILE: arch/riscv/include/asm/barrier.h:97:
+					 LB_AQ(%0, %1) "\t\nnop\t\n",		\
 					       ^

CHECK: spaces preferred around that '%' (ctx:WxV)
#77: FILE: arch/riscv/include/asm/barrier.h:97:
+					 LB_AQ(%0, %1) "\t\nnop\t\n",		\
 					           ^

CHECK: spaces preferred around that '%' (ctx:BxV)
#83: FILE: arch/riscv/include/asm/barrier.h:103:
+					 LH_AQ(%0, %1) "\t\nnop\t\n",		\
 					       ^

CHECK: spaces preferred around that '%' (ctx:WxV)
#83: FILE: arch/riscv/include/asm/barrier.h:103:
+					 LH_AQ(%0, %1) "\t\nnop\t\n",		\
 					           ^

CHECK: spaces preferred around that '%' (ctx:BxV)
#89: FILE: arch/riscv/include/asm/barrier.h:109:
+					 LW_AQ(%0, %1) "\t\nnop\t\n",		\
 					       ^

CHECK: spaces preferred around that '%' (ctx:WxV)
#89: FILE: arch/riscv/include/asm/barrier.h:109:
+					 LW_AQ(%0, %1) "\t\nnop\t\n",		\
 					           ^

CHECK: spaces preferred around that '%' (ctx:BxV)
#95: FILE: arch/riscv/include/asm/barrier.h:115:
+					 LD_AQ(%0, %1) "\t\nnop\t\n",		\
 					       ^

CHECK: spaces preferred around that '%' (ctx:WxV)
#95: FILE: arch/riscv/include/asm/barrier.h:115:
+					 LD_AQ(%0, %1) "\t\nnop\t\n",		\
 					           ^

total: 0 errors, 0 warnings, 19 checks, 87 lines checked

NOTE: For some of the reported defects, checkpatch may be able to
      mechanically convert to the typical style using --fix or --fix-inplace.

Commit 733ceb1bb962 ("riscv: Use Zalasr for smp_load_acquire/smp_store_release") has style problems, please review.

NOTE: Ignored message types: ALLOC_SIZEOF_STRUCT CAMELCASE COMMIT_LOG_LONG_LINE GIT_COMMIT_ID MACRO_ARG_REUSE NO_AUTHOR_SIGN_OFF

NOTE: If any of the errors are false positives, please report
      them to the maintainer, see CHECKPATCH in MAINTAINERS.
total: 0 errors, 0 warnings, 19 checks, 87 lines checked
CHECK: Macro argument 'p' may be better as '(p)' to avoid precedence issues
CHECK: extern prototypes should be avoided in .h files
CHECK: spaces preferred around that '%' (ctx:BxV)
CHECK: spaces preferred around that '%' (ctx:WxV)

linux-riscv-bot · 2025-08-26T19:54:40Z

Patch 4: "[RFC,4/4] riscv: Use Zalasr for smp_load_acquire/smp_store_release"
dtb-warn-rv64
Desc: Checks for Device Tree warnings/errors
Duration: 74.36 seconds
Result: PASS

linux-riscv-bot · 2025-08-26T19:54:42Z

Patch 4: "[RFC,4/4] riscv: Use Zalasr for smp_load_acquire/smp_store_release"
header-inline
Desc: Detects static functions without inline keyword in header files
Duration: 0.26 seconds
Result: PASS

linux-riscv-bot · 2025-08-26T19:54:44Z

Patch 4: "[RFC,4/4] riscv: Use Zalasr for smp_load_acquire/smp_store_release"
kdoc
Desc: Detects for kdoc errors
Duration: 0.82 seconds
Result: PASS

linux-riscv-bot · 2025-08-26T19:54:46Z

Patch 4: "[RFC,4/4] riscv: Use Zalasr for smp_load_acquire/smp_store_release"
module-param
Desc: Detect module_param changes
Duration: 0.24 seconds
Result: PASS

linux-riscv-bot · 2025-08-26T19:54:47Z

Patch 4: "[RFC,4/4] riscv: Use Zalasr for smp_load_acquire/smp_store_release"
verify-fixes
Desc: Verifies that the Fixes: tags exist
Duration: 0.22 seconds
Result: PASS

linux-riscv-bot · 2025-08-26T19:54:49Z

Patch 4: "[RFC,4/4] riscv: Use Zalasr for smp_load_acquire/smp_store_release"
verify-signedoff
Desc: Verifies that Signed-off-by: tags are correct
Duration: 0.29 seconds
Result: PASS

luxukernel added 4 commits August 26, 2025 15:20

riscv: add ISA extension parsing for Zalasr

b047148

Add parsing for Zalasr ISA extension. Signed-off-by: Xu Lu <luxu.kernel@bytedance.com> Signed-off-by: Linux RISC-V bot <linux.riscv.bot@gmail.com>

dt-bindings: riscv: Add Zalasr ISA extension description

559e2e9

Add description for the Zalasr ISA extension Signed-off-by: Xu Lu <luxu.kernel@bytedance.com> Signed-off-by: Linux RISC-V bot <linux.riscv.bot@gmail.com>

riscv: Instroduce Zalasr instructions

7c11673

Introduce l{b|h|w|d}.{aq|aqrl} and s{b|h|w|d}.{rl|aqrl} instruction encodings. Signed-off-by: Xu Lu <luxu.kernel@bytedance.com> Signed-off-by: Linux RISC-V bot <linux.riscv.bot@gmail.com>

riscv: Use Zalasr for smp_load_acquire/smp_store_release

733ceb1

Replace fence instructions with Zalasr instructions during acquire or release operations. Signed-off-by: Xu Lu <luxu.kernel@bytedance.com> Signed-off-by: Linux RISC-V bot <linux.riscv.bot@gmail.com>

linux-riscv-bot closed this Sep 1, 2025

linux-riscv-bot deleted the pw995713 branch September 1, 2025 14:19

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