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[CUDA] Add BitwiseAnd, BitwiseOr, and BitwiseNot integer kernels - #33646
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Justin Chu (justinchuby) wants to merge 4 commits into
Open
Justin Chu (justinchuby) wants to merge 4 commits into
Justin Chu (justinchuby) wants to merge 4 commits into
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Reuse the elementwise broadcast/unary CUDA machinery for all eight integer types. Add strict CUDA-only extrema, broadcast, empty and tail regressions while preserving logical boolean kernels. Co-authored-by: Copilot App <223556219+Copilot@users.noreply.github.com> Signed-off-by: Justin Chu <justinchuby@users.noreply.github.com>
Co-authored-by: Copilot App <223556219+Copilot@users.noreply.github.com> Signed-off-by: Justin Chu <justinchuby@users.noreply.github.com>
Co-authored-by: Copilot App <223556219+Copilot@users.noreply.github.com> Signed-off-by: Justin Chu <justinchuby@users.noreply.github.com>
Avoid instantiating the tensor vector overloads with the non-contiguous std::vector<bool> specialization. Co-authored-by: Copilot App <223556219+Copilot@users.noreply.github.com> Signed-off-by: Justin Chu <justinchuby@users.noreply.github.com>
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🟢 Approval recommended
The focused additions consistently reuse established elementwise infrastructure, include strict CUDA regression coverage, and have no unresolved findings.
No open issues 🎉
What changed in this PR
Adds native CUDA support for ONNX BitwiseAnd, BitwiseOr, and BitwiseNot across all eight integer types at opset 18+, avoiding CPU fallback while preserving existing boolean operators.
Changes:
- Reuses existing binary broadcasting and unary elementwise infrastructure.
- Adds strict CUDA-only regressions for integer boundaries, broadcasting, scalars, empty tensors, tail sizes, and boolean behavior.
- Updates the three CUDA operator-support documentation rows.
| File | Description |
|---|---|
onnxruntime/test/providers/cuda/bitwise_ops_test.cc |
Adds integer and boolean regressions with CPU fallback disabled. |
onnxruntime/core/providers/cuda/math/unary_elementwise_ops.h |
Declares the BitwiseNot kernel class. |
onnxruntime/core/providers/cuda/math/unary_elementwise_ops.cc |
Registers integer BitwiseNot kernels. |
onnxruntime/core/providers/cuda/math/unary_elementwise_ops_impl.h |
Defines the bitwise complement expression. |
onnxruntime/core/providers/cuda/math/unary_elementwise_ops_impl.cu |
Instantiates integer BitwiseNot device implementations. |
onnxruntime/core/providers/cuda/math/binary_elementwise_ops.cc |
Registers integer BitwiseAnd and BitwiseOr kernels. |
onnxruntime/core/providers/cuda/math/binary_elementwise_ops_impl.cu |
Instantiates integer And/Or device implementations. |
onnxruntime/core/providers/cuda/cuda_execution_provider.cc |
Adds the new kernels to the CUDA registry. |
docs/OperatorKernels.md |
Documents CUDA support, types, and opset ranges. |
Review effort: Balanced
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Description
Add standard ONNX CUDA
BitwiseAnd,BitwiseOr, andBitwiseNotkernels for all eight integer types, starting at opset 18. And/Or reuse the existing bitwise functors and binary broadcasting machinery; Not uses the shared unary elementwise launch with~a. Existing booleanAnd,Or, andNotregistrations and semantics are unchanged.Add shared, strict CUDA-only regressions (
session.disable_cpu_ep_fallback=1) covering integer extrema, full-width 64-bit patterns, scalars, multidirectional broadcasting in both operand orders, empty tensors, and tail sizes 255/256/257/1025 at opsets 18 and 24. Include a strict boolean regression and update only the three CUDA operator-support rows.Motivation and Context
These integer bitwise operators currently lack CUDA kernels and fall back to CPU. This PR adds native CUDA support using the existing elementwise machinery. It is independent of the BitwiseXor work in #33645 and of BitShift: neither implementation is included or required.
Validation
Verified on NVIDIA H200 (physical GPU 4, sm90), CUDA 13.3, cuDNN 9.10.2, Python 3.12, ORT 1.32.0 Release, from base
812043410eebd29c4bdd46b906447e2e5b77f7b2plus this isolated patch. All eight committed source/test files match the compiled-source SHA256 manifest after line-ending normalization.18+, eight-integer-type rows.git diff 812043410eebd29c4bdd46b906447e2e5b77f7b2 HEAD --check: passed..venv\Scripts\git-clang-format.exe --binary .venv\Scripts\clang-format.exe --diff 812043410eebd29c4bdd46b906447e2e5b77f7b2with clang-format 20.1.8: passed, no formatting changes.Exact GPU build and validation commands
Build from the isolated source checkout:
Result: passed. The temporary build directory name reflects reuse of the coordinator's build resources, not inclusion of the XOR patch.
From the build output directory (
build/Release):CUDA_VISIBLE_DEVICES=4 LD_LIBRARY_PATH=/usr/local/cuda/lib64:/usr/lib/python3.12/site-packages/nvidia/cudnn/lib ./onnxruntime_provider_test --gtest_filter='CudaBitwiseOpTest/*.*:CudaBitwiseLogicalTest.*:MathOpTest.BitwiseAnd*:MathOpTest.BitwiseOr*:MathOpTest.BitwiseNot*:MathOpTest.And:MathOpTest.Or:MathOpTest.Not'Result: 34 tests passed, zero skips.
Ad hoc probe from
/tmp/ort-cuda-bitwise-xor-8d05709c/validated-logic(probe script is an external validation artifact, not a repository test):Result: 528/528 bit-identical models, all operator profiles on CUDA, CPU fallback disabled.
Documentation generation from
/tmp/ort-cuda-bitwise-xor-8d05709c, using the preserved validated wheel:Result: passed; the three generated support rows match this PR.
Validated wheel SHA256:
a0c6581f642591cdf1eba0f15b8667721b326490b446495a112d62ab1377ab23.Limits: targeted operator validation only, not the full suite. QUICK_BUILD enabled, contrib/ML ops disabled, and flash/MEA/TRT-fused/XQA attention disabled. No full-model performance, non-sm90 GPU, or cross-platform runtime claims.