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35 changes: 35 additions & 0 deletions arch/arm64/boot/dts/qcom/nord-ride-sx.dts
Original file line number Diff line number Diff line change
Expand Up @@ -707,3 +707,38 @@

status = "okay";
};

&soc {
iommu_test_device {
compatible = "qcom,iommu-debug-test";

usecase0_apps {
compatible = "qcom,iommu-debug-usecase";
iommus = <&apps_smmu_0 0x0001 0x0>;
};

usecase1_apps_fastmap {
compatible = "qcom,iommu-debug-usecase";
iommus = <&apps_smmu_0 0x0001 0x0>;
qcom,iommu-dma = "fastmap";
};

usecase2_apps_atomic {
compatible = "qcom,iommu-debug-usecase";
iommus = <&apps_smmu_0 0x0001 0x0>;
qcom,iommu-dma = "atomic";
};

usecase3_apps_dma {
compatible = "qcom,iommu-debug-usecase";
iommus = <&apps_smmu_0 0x0001 0x0>;
dma-coherent;
};

sec_pix: secure-pixel {
compatible = "qcom,iommu-debug-usecase";
iommus = <&apps_smmu_0 0x0001 0x0>;
qcom,iommu-vmid = <0xa>; /* VMID_CP_PIXEL */
};
};
};
35 changes: 35 additions & 0 deletions arch/arm64/boot/dts/qcom/nord-rrd.dts
Original file line number Diff line number Diff line change
Expand Up @@ -626,3 +626,38 @@

status = "okay";
};

&soc {
iommu_test_device {
compatible = "qcom,iommu-debug-test";

usecase0_apps {
compatible = "qcom,iommu-debug-usecase";
iommus = <&apps_smmu_0 0x0001 0x0>;
};

usecase1_apps_fastmap {
compatible = "qcom,iommu-debug-usecase";
iommus = <&apps_smmu_0 0x0001 0x0>;
qcom,iommu-dma = "fastmap";
};

usecase2_apps_atomic {
compatible = "qcom,iommu-debug-usecase";
iommus = <&apps_smmu_0 0x0001 0x0>;
qcom,iommu-dma = "atomic";
};

usecase3_apps_dma {
compatible = "qcom,iommu-debug-usecase";
iommus = <&apps_smmu_0 0x0001 0x0>;
dma-coherent;
};

sec_pix: secure-pixel {
compatible = "qcom,iommu-debug-usecase";
iommus = <&apps_smmu_0 0x0001 0x0>;
qcom,iommu-vmid = <0xa>; /* VMID_CP_PIXEL */
};
};
};
1 change: 1 addition & 0 deletions arch/arm64/configs/defconfig
Original file line number Diff line number Diff line change
Expand Up @@ -1974,3 +1974,4 @@ CONFIG_CORESIGHT_STM=m
CONFIG_CORESIGHT_CPU_DEBUG=m
CONFIG_CORESIGHT_CTI=m
CONFIG_MEMTEST=y
CONFIG_QCOM_IOMMU_DEBUG=y
3 changes: 3 additions & 0 deletions arch/arm64/configs/qcom.config
Original file line number Diff line number Diff line change
Expand Up @@ -140,3 +140,6 @@ CONFIG_SCMI_QCOM_MEMLAT_DEVFREQ=m
# GPU Virtualization support
CONFIG_DRM_VIRTIO_GPU=m
CONFIG_DRM_VIRTIO_GPU_KMS=m

# QCOM SMMU debug support (required for qcom_smmu_itop_hard)
CONFIG_ARM_SMMU_QCOM_DEBUG=y
9 changes: 9 additions & 0 deletions drivers/iommu/Kconfig
Original file line number Diff line number Diff line change
Expand Up @@ -315,6 +315,15 @@ config APPLE_DART

Say Y here if you are using an Apple SoC.

config QCOM_IOMMU_DEBUG
tristate "IOMMU debugging and testing"
depends on DEBUG_FS
help
This option is used to enable profiling and debugging in
the IOMMU framework code. IOMMU profiling and debugging
can be done through the debugfs nodes which this option
makes available.

config S390_IOMMU
def_bool y if S390 && PCI
depends on S390 && PCI
Expand Down
2 changes: 2 additions & 0 deletions drivers/iommu/Makefile
Original file line number Diff line number Diff line change
Expand Up @@ -38,3 +38,5 @@ obj-$(CONFIG_SPRD_IOMMU) += sprd-iommu.o
obj-$(CONFIG_APPLE_DART) += apple-dart.o
obj-$(CONFIG_VSI_IOMMU) += vsi-iommu.o
obj-$(CONFIG_IOMMU_DEBUG_PAGEALLOC) += iommu-debug-pagealloc.o
obj-$(CONFIG_QCOM_IOMMU_DEBUG) += qcom_iommu_debug.o
qcom_iommu_debug-y += qcom-iommu-debug.o qcom-iommu-debug-user.o
14 changes: 14 additions & 0 deletions drivers/iommu/arm/arm-smmu/arm-smmu-qcom-debug.c
Original file line number Diff line number Diff line change
Expand Up @@ -354,9 +354,23 @@ static phys_addr_t qcom_smmu_iova_to_phys_hard(struct arm_smmu_domain *smmu_doma
frsynra = arm_smmu_gr1_read(smmu, ARM_SMMU_GR1_CBFRSYNRA(idx));
sid = FIELD_GET(ARM_SMMU_CBFRSYNRA_SID, frsynra);

/*
* This is hardcoded because there is junk in ARM_SMMU_CBFRSYNRA_SID.
* This value is specific to target you're checking on.
**/
sid = 0x00E0;
pr_err("Trying for SID: %x\n", sid);
return qcom_iova_to_phys(smmu_domain, iova, sid);
}

phys_addr_t qcom_smmu_itop_hard(struct iommu_domain *dom, dma_addr_t iova)
{
struct arm_smmu_domain *smmu_domain = container_of(dom, struct arm_smmu_domain, domain);

return qcom_smmu_iova_to_phys_hard(smmu_domain, iova);
}
EXPORT_SYMBOL(qcom_smmu_itop_hard);

static phys_addr_t qcom_smmu_verify_fault(struct arm_smmu_domain *smmu_domain, dma_addr_t iova, u32 fsr)
{
struct io_pgtable *iop = io_pgtable_ops_to_pgtable(smmu_domain->pgtbl_ops);
Expand Down
2 changes: 1 addition & 1 deletion drivers/iommu/arm/arm-smmu/arm-smmu.c
Original file line number Diff line number Diff line change
Expand Up @@ -1391,7 +1391,7 @@ static void arm_smmu_iotlb_sync(struct iommu_domain *domain,
arm_smmu_rpm_put(smmu);
}

static phys_addr_t arm_smmu_iova_to_phys_hard(struct iommu_domain *domain,
phys_addr_t arm_smmu_iova_to_phys_hard(struct iommu_domain *domain,
dma_addr_t iova)
{
struct arm_smmu_domain *smmu_domain = to_smmu_domain(domain);
Expand Down
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