Honor declared pad clearance in differential-pair post-processing

[seveibar]

Summary

• Accept an optional minTraceToPadEdgeClearance and propagate it through routing, simplification, length matching, and final copper validation.
• Preserve the legacy trace-width-based margin when callers omit the setting.
• Add the failing SOIC differential-pair geometry from feat: use Pipeline 9 as the default autorouter core#3654 as a regression: the declared 0.1 mm clearance must not be rejected using a 0.15 mm trace-width margin.

Validation

• 82 tests passed (857 assertions), including existing visual snapshots.
• TypeScript and structural checks passed (existing advisory folder warnings).
• Core differential-pair endpoint, skew, and trace DRC assertions pass with this fix and the autorouter forwarding the declared clearance.

Supports tscircuit/core#3654.

[vercel]

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Project	Deployment	Actions	Updated
differential-pairs-solver	Ready	Preview	Sep 5, 2026 6:17am UTC